1 |
/* |
2 |
* PearPC |
3 |
* pci.h |
4 |
* |
5 |
* Copyright (C) 2003 Sebastian Biallas (sb@biallas.net) |
6 |
* |
7 |
* This program is free software; you can redistribute it and/or modify |
8 |
* it under the terms of the GNU General Public License version 2 as |
9 |
* published by the Free Software Foundation. |
10 |
* |
11 |
* This program is distributed in the hope that it will be useful, |
12 |
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
13 |
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
14 |
* GNU General Public License for more details. |
15 |
* |
16 |
* You should have received a copy of the GNU General Public License |
17 |
* along with this program; if not, write to the Free Software |
18 |
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. |
19 |
*/ |
20 |
|
21 |
#ifndef __IO_PCI_H__ |
22 |
#define __IO_PCI_H__ |
23 |
|
24 |
/* Current device listing: |
25 |
* gcard: bus 0, unit 7 |
26 |
* MEMREG0: 0x84000000 +0x01000000 |
27 |
* ide: bus 1, unit 1 |
28 |
* IOREG0: 0x00001c40 +0x00000010 |
29 |
* IOREG1: 0x00001c30 +0x00000010 |
30 |
* ... |
31 |
* IOREG4: 0x00001c00 +0x00000010 |
32 |
* macio: bus 1, unit 5 |
33 |
* MEMREG0: 0x80800000 +0x00080000 |
34 |
* pic: |
35 |
* MEMREG: 0x80800000 +0x00000040 |
36 |
* cuda: |
37 |
* MEMREG: 0x80816000 +0x00018000 |
38 |
* nvram: |
39 |
* MEMREG: 0x80860000 +0x00020000 |
40 |
* usb: bus 1, unit 6 |
41 |
* MEMREG0: 0x80881000 +0x00001000 |
42 |
* eth0: bus 1, unit c |
43 |
* IOREG0: 0x00001000 +0x00000100 |
44 |
* eth1: bus 1, unit d |
45 |
* IOREG0: 0x00001800 +0x00000100 |
46 |
*/ |
47 |
|
48 |
#include "tools/data.h" |
49 |
#include "system/types.h" |
50 |
#include "system/display.h" |
51 |
|
52 |
#define IO_PCI_PA_START 0xfec00000 |
53 |
#define IO_PCI_PA_END 0xfef00000 |
54 |
|
55 |
#define IO_ISA_PA_START 0xfe000000 |
56 |
#define IO_ISA_PA_END 0xfe200000 |
57 |
|
58 |
#define IO_PCI_DEVICE_PA_START 0x80000000 |
59 |
#define IO_PCI_DEVICE_PA_END 0x81000000 |
60 |
|
61 |
extern uint32 gPCI_Data; |
62 |
extern Container *gPCI_Devices; |
63 |
|
64 |
#define PCI_ADDRESS_SPACE_MEM 0 |
65 |
#define PCI_ADDRESS_SPACE_MEM_PREFETCH 8 |
66 |
#define PCI_ADDRESS_SPACE_IO 1 |
67 |
|
68 |
class PCI_Device: public Object { |
69 |
public: |
70 |
uint8 mConfig[64*4]; |
71 |
char *mName; |
72 |
uint8 mBus; |
73 |
uint8 mUnit; |
74 |
uint mIORegsCount; |
75 |
uint mIORegSize[6]; |
76 |
uint mIORegType[6]; |
77 |
|
78 |
uint32 mAddress[6]; |
79 |
uint32 mPort[6]; |
80 |
|
81 |
PCI_Device(const char *name, uint8 bus, uint8 unit); |
82 |
~PCI_Device(); |
83 |
virtual int compareTo(const Object *obj) const; |
84 |
|
85 |
void assignMemAddress(uint r, uint32 address); |
86 |
void assignIOPort(uint r, uint32 port); |
87 |
virtual bool readMem(uint32 address, uint32 &data, uint size); |
88 |
virtual bool readIO(uint32 address, uint32 &data, uint size); |
89 |
virtual bool writeMem(uint32 address, uint32 data, uint size); |
90 |
virtual bool writeIO(uint32 address, uint32 data, uint size); |
91 |
|
92 |
virtual void readConfig(uint reg); |
93 |
virtual bool readDeviceMem(uint r, uint32 address, uint32 &data, uint size); |
94 |
virtual bool readDeviceIO(uint r, uint32 port, uint32 &data, uint size); |
95 |
virtual void writeConfig(uint reg, int offset, int size); |
96 |
virtual bool writeDeviceMem(uint r, uint32 address, uint32 data, uint size); |
97 |
virtual bool writeDeviceIO(uint r, uint32 port, uint32 data, uint size); |
98 |
virtual void setCommand(uint16 command); |
99 |
virtual void setStatus(uint16 status); |
100 |
}; |
101 |
|
102 |
void pci_write(uint32 addr, uint32 data, int size); |
103 |
void pci_read(uint32 addr, uint32 &data, int size); |
104 |
bool isa_write(uint32 addr, uint32 data, int size); |
105 |
bool isa_read(uint32 addr, uint32 &data, int size); |
106 |
bool pci_write_device(uint32 addr, uint32 data, int size); |
107 |
bool pci_read_device(uint32 addr, uint32 &data, int size); |
108 |
|
109 |
void pci_init(); |
110 |
void pci_done(); |
111 |
void pci_init_config(); |
112 |
|
113 |
#endif |
114 |
|