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/* |
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* PearPC |
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* pci.cc |
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* |
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* Copyright (C) 2003 Sebastian Biallas (sb@biallas.net) |
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* |
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* This program is free software; you can redistribute it and/or modify |
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* it under the terms of the GNU General Public License version 2 as |
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* published by the Free Software Foundation. |
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* |
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* This program is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU General Public License for more details. |
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* |
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* You should have received a copy of the GNU General Public License |
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* along with this program; if not, write to the Free Software |
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. |
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*/ |
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|
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#include <cstdlib> |
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#include <cstring> |
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|
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#include "tools/data.h" |
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#include "system/arch/sysendian.h" |
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#include "cpu/cpu.h" |
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#include "cpu/debug.h" |
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#include "cpu/mem.h" |
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#include "debug/tracers.h" |
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#include "pci.h" |
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|
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#define PCI_ADDRESS_ECD(v) ((v) & 0x80000000) |
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#define PCI_ADDRESS_BUS(v) (((v)>>16) & 0xff) |
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#define PCI_ADDRESS_UNIT(v) (((v)>>11) & 0x1f) |
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#define PCI_ADDRESS_FUNCT(v) (((v)>>8) & 7) |
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#define PCI_ADDRESS_REG(v) (((v)) & 0xfc) |
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#define PCI_ADDRESS_TYPE(v) ((v) & 3) |
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|
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uint32 gPCI_Address; |
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uint32 gPCI_Data; |
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static uint32 gPCI_Data_LE; |
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Container *gPCI_Devices; |
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|
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class PCI_Bridge: public PCI_Device { |
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public: |
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PCI_Bridge(const char *aName, uint8 aBus, uint8 aUnit) |
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:PCI_Device(aName, aBus, aUnit) |
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{ |
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mIORegsCount = 2; |
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} |
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|
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}; |
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|
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class PCI_BridgeHost: public PCI_Bridge { |
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public: |
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PCI_BridgeHost(); |
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}; |
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|
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class PCI_BridgeP2P: public PCI_Bridge { |
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public: |
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PCI_BridgeP2P(); |
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}; |
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|
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PCI_Device::PCI_Device(const char *aName, uint8 aBus, uint8 aUnit) |
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:Object() |
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{ |
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mName = strdup(aName); |
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mUnit = aUnit; |
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mBus = aBus; |
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mIORegsCount = 6; |
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memset(&mConfig, 0, sizeof mConfig); |
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memset(&mAddress, 0, sizeof mAddress); |
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memset(&mPort, 0, sizeof mPort); |
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memset(&mIORegType, 0, sizeof mIORegType); |
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memset(&mIORegSize, 0, sizeof mIORegSize); |
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} |
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|
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PCI_Device::~PCI_Device() |
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{ |
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free(mName); |
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} |
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|
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int PCI_Device::compareTo(const Object *obj) const |
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{ |
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int busdelta = (int)mBus - (int)((PCI_Device*)obj)->mBus; |
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if (!busdelta) { |
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return (int)mUnit - (int)((PCI_Device*)obj)->mUnit; |
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} |
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return busdelta; |
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} |
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|
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void PCI_Device::assignMemAddress(uint r, uint32 aAddress) |
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{ |
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IO_PCI_TRACE("assign-address[mem]: %s: %d: %08x\n", mName, r, aAddress); |
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mAddress[r] = aAddress; |
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mConfig[0x4] |= 0x2; // Enable response in memory space |
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mConfig[0x10+4*r] = aAddress | mIORegType[r]; |
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mConfig[0x11+4*r] = aAddress>>8; |
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mConfig[0x12+4*r] = aAddress>>16; |
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mConfig[0x13+4*r] = aAddress>>24; |
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} |
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|
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void PCI_Device::assignIOPort(uint r, uint32 aPort) |
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{ |
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IO_PCI_TRACE("assign-address[io]: %s: %d: %08x\n", mName, r, aPort); |
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mPort[r] = aPort; |
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mConfig[0x4] |= 0x1; // Enable response in io space |
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mConfig[0x10+4*r] = aPort | 1; // Mark as io address |
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mConfig[0x11+4*r] = aPort>>8; |
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mConfig[0x12+4*r] = aPort>>16; |
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mConfig[0x13+4*r] = aPort>>24; |
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} |
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|
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bool PCI_Device::readMem(uint32 aAddress, uint32 &data, uint size) |
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{ |
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for (uint i=0; i < mIORegsCount; i++) { |
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if ((mIORegType[i] & 1) == PCI_ADDRESS_SPACE_MEM |
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&& aAddress >= mAddress[i] && aAddress < (mAddress[i] + mIORegSize[i])) { |
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if (!readDeviceMem(i, aAddress-mAddress[i], data, size)) { |
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IO_PCI_ERR("%s: reg: %d: %08x read unimpl.\n", mName, i, aAddress-mAddress[i]); |
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} |
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return true; |
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} |
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} |
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return false; |
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} |
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|
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bool PCI_Device::readIO(uint32 aPort, uint32 &data, uint size) |
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{ |
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for (uint i=0; i < mIORegsCount; i++) { |
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if (mIORegType[i] == PCI_ADDRESS_SPACE_IO |
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&& aPort >= mPort[i] && aPort < (mPort[i] + mIORegSize[i])) { |
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if (!readDeviceIO(i, aPort-mPort[i], data, size)) { |
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IO_PCI_ERR("%s: reg: %d: %08x read(%d) unimpl.\n", mName, i, aPort-mPort[i], size); |
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} |
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return true; |
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} |
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} |
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return false; |
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} |
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|
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bool PCI_Device::writeMem(uint32 aAddress, uint32 data, uint size) |
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{ |
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for (uint i=0; i < mIORegsCount; i++) { |
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if ((mIORegType[i] & 1) == PCI_ADDRESS_SPACE_MEM |
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&& aAddress >= mAddress[i] && aAddress < (mAddress[i] + mIORegSize[i])) { |
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if (!writeDeviceMem(i, aAddress-mAddress[i], data, size)) { |
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IO_PCI_ERR("%s: reg: %d: %08x write unimpl.\n", mName, i, aAddress-mAddress[i]); |
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} |
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return true; |
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} |
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} |
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return false; |
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} |
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|
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bool PCI_Device::writeIO(uint32 aPort, uint32 data, uint size) |
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{ |
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for (uint i=0; i < mIORegsCount; i++) { |
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if (mIORegType[i] == PCI_ADDRESS_SPACE_IO |
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&& aPort >= mPort[i] && aPort < (mPort[i] + mIORegSize[i])) { |
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if (!writeDeviceIO(i, aPort-mPort[i], data, size)) { |
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IO_PCI_ERR("%s: reg: %d: %08x write(%d) unimpl.\n", mName, i, aPort-mPort[i], size); |
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} |
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return true; |
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} |
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} |
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return false; |
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} |
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|
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bool PCI_Device::readDeviceMem(uint r, uint32 address, uint32 &data, uint size) |
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{ |
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return false; |
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} |
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|
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bool PCI_Device::readDeviceIO(uint r, uint32 io, uint32 &data, uint size) |
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{ |
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return false; |
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} |
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|
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bool PCI_Device::writeDeviceMem(uint r, uint32 address, uint32 data, uint size) |
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{ |
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return false; |
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} |
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|
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bool PCI_Device::writeDeviceIO(uint r, uint32 io, uint32 data, uint size) |
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{ |
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return false; |
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} |
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|
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void PCI_Device::readConfig(uint reg) |
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{ |
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gPCI_Data = ppc_word_from_LE(*(uint32*)&(mConfig[reg])); |
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} |
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|
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void PCI_Device::writeConfig(uint reg, int offset, int size) |
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{ |
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if (reg >= 0x10 && reg < (4*mIORegsCount+0x10)) { |
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uint rreg = (reg-0x10) >> 2; |
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if (mIORegSize[rreg]) { |
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if (gPCI_Data != 0xffffffff && gPCI_Data != 0) { |
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if (mIORegType[rreg]==PCI_ADDRESS_SPACE_MEM) { |
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assignMemAddress(rreg, gPCI_Data & ~0xf); |
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} else { |
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assignIOPort(rreg, gPCI_Data & ~0x3); |
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} |
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} |
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if ((mIORegType[rreg] & 1) == PCI_ADDRESS_SPACE_MEM) { |
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uint32 x = 8; |
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for (int i=2; i<31; i++) { |
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gPCI_Data &= ~x; |
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x <<= 1; |
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if (x >= mIORegSize[rreg]) break; |
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} |
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gPCI_Data &= ~0xf; |
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} else { |
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uint32 x = 2; |
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for (int i=2; i<31; i++) { |
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gPCI_Data &= ~x; |
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x <<= 1; |
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if (x >= mIORegSize[rreg]) break; |
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} |
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gPCI_Data &= ~0x3; |
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} |
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gPCI_Data |= mIORegType[rreg]; |
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} |
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} |
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*(uint32*)&(mConfig[reg]) = ppc_word_to_LE(gPCI_Data); |
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} |
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|
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void PCI_Device::setCommand(uint16 command) |
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{ |
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} |
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|
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void PCI_Device::setStatus(uint16 status) |
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{ |
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} |
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|
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PCI_BridgeP2P::PCI_BridgeP2P() |
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:PCI_Bridge("pci-bridge-p2p", 0x00, 0x0d) |
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{ |
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mConfig[0x00] = 0x11; // vendor ID |
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mConfig[0x01] = 0x10; |
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mConfig[0x02] = 0x26; // unit ID |
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mConfig[0x03] = 0x00; |
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|
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mConfig[0x08] = 0x02; // revision |
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mConfig[0x09] = 0x00; // programming interface code |
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mConfig[0x0a] = 0x04; // pci2pci |
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mConfig[0x0b] = 0x06; // bridge |
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|
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mConfig[0x0e] = 0x01; // header-type |
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|
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mConfig[0x18] = 0x0; // primary bus number |
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mConfig[0x19] = 0x1; // secondary bus number |
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mConfig[0x1a] = 0x1; // highest bus number behind bridge |
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mConfig[0x1c] = 0x10; // i/o base behind bridge |
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mConfig[0x1d] = 0x20; // i/o limit |
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|
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mConfig[0x20] = 0x80; // memory base |
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mConfig[0x21] = 0x80; // memory base |
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mConfig[0x22] = 0x90; // memory limit |
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mConfig[0x23] = 0x80; // memory limit |
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|
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mConfig[0x24] = 0x00; // prefetch memory base |
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mConfig[0x25] = 0x84; // prefetch memory base |
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mConfig[0x26] = 0x00; // prefetch memory limit |
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mConfig[0x27] = 0x85; // prefetch memory limit |
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|
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mConfig[0x32] = 0x00; // upper io limit |
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} |
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|
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PCI_BridgeHost::PCI_BridgeHost() |
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:PCI_Bridge("pci-bridge-host", 0x00, 0x0e) |
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{ |
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mConfig[0x00] = 0x11; // vendor ID |
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mConfig[0x01] = 0x10; |
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mConfig[0x02] = 0x26; // unit ID |
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mConfig[0x03] = 0x00; |
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|
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mConfig[0x08] = 0x00; // revision |
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mConfig[0x09] = 0x01; |
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mConfig[0x0a] = 0x04; // host |
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mConfig[0x0b] = 0x06; // bridge |
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|
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mConfig[0x0e] = 0x01; // header-type |
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|
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mConfig[0x18] = 0x0; // primary bus number |
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mConfig[0x19] = 0x1; // secondary bus number |
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mConfig[0x1a] = 0x0; // highest bus number behind bridge |
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mConfig[0x1c] = 0x0; // i/o behind bridge |
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|
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mConfig[0x20] = 0x0; // memory base |
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mConfig[0x21] = 0x0; // memory base |
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mConfig[0x22] = 0x1; // memory limit |
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mConfig[0x23] = 0x0; // memory limit |
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|
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mConfig[0x24] = 0x0; // prefetch memory base |
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mConfig[0x25] = 0x0; // prefetch memory base |
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mConfig[0x26] = 0x0; // prefetch memory limit |
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mConfig[0x27] = 0x0; // prefetch memory limit |
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} |
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|
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/************************************************************************************** |
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* |
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*/ |
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|
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static void pci_config_read_write(bool write, int offset, int size) |
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{ |
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IO_PCI_TRACE("ecd: %d bus: 0x%02x unit: 0x%02x funct: 0x%02x reg: 0x%02x type: %d\n", |
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PCI_ADDRESS_ECD(gPCI_Address)?1:0, PCI_ADDRESS_BUS(gPCI_Address), |
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PCI_ADDRESS_UNIT(gPCI_Address), PCI_ADDRESS_FUNCT(gPCI_Address), |
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PCI_ADDRESS_REG(gPCI_Address),PCI_ADDRESS_TYPE(gPCI_Address)); |
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|
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if (PCI_ADDRESS_FUNCT(gPCI_Address)) { |
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IO_PCI_ERR("PCI: func != 0\n"); |
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} |
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if (PCI_ADDRESS_TYPE(gPCI_Address)) { |
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IO_PCI_ERR("PCI: type != 0\n"); |
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} |
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if (PCI_ADDRESS_ECD(gPCI_Address)) { |
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PCI_Device empty("", PCI_ADDRESS_BUS(gPCI_Address), PCI_ADDRESS_UNIT(gPCI_Address)); |
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PCI_Device *p = (PCI_Device*)gPCI_Devices->get(gPCI_Devices->find(&empty)); |
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if (!p) { |
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if (!write) gPCI_Data = 0; |
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return; |
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} |
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if (write) { |
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gPCI_Data = ppc_word_from_LE(gPCI_Data_LE); |
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p->writeConfig(PCI_ADDRESS_REG(gPCI_Address), offset, size); |
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} else { |
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p->readConfig(PCI_ADDRESS_REG(gPCI_Address)); |
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gPCI_Data_LE = ppc_word_to_LE(gPCI_Data); |
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} |
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} else { |
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IO_PCI_WARN("PCI: ecd != 1\n"); |
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} |
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} |
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|
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void pci_write(uint32 addr, uint32 data, int size) |
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{ |
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if (addr != IO_PCI_PA_START) IO_PCI_TRACE("write (%d) @%08x: %08x (from %08x, %08x)\n", size, addr, data, ppc_cpu_get_pc(0), ppc_cpu_get_lr(0)); |
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addr -= IO_PCI_PA_START; |
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switch (addr) { |
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case 0: |
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case 0xcf8: |
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if (size != 4) { |
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IO_PCI_ERR("pci bla\n"); |
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} |
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gPCI_Address = data; |
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pci_config_read_write(false, 0, 4); |
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return; |
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case 0x200000: |
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case 0x200cfc: |
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if (size == 1) { |
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void *p = &gPCI_Data_LE; |
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*(uint8 *)p = data; |
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pci_config_read_write(true, 0, 1); |
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return; |
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} |
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if (size == 2) { |
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void *p = &gPCI_Data_LE; |
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*(uint16 *)p = ppc_half_to_LE(data); |
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pci_config_read_write(true, 0, 2); |
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return; |
365 |
} |
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if (size != 4) { |
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IO_PCI_ERR("pci bla\n"); |
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} |
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gPCI_Data_LE = ppc_word_to_LE(data); |
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pci_config_read_write(true, 0, 4); |
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return; |
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case 0x200001: |
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case 0x200cfd: { |
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if (size != 1) { |
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IO_PCI_ERR("pci bla\n"); |
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} |
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char *p = (char*)&gPCI_Data_LE; |
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*(uint8 *)(p+1) = data; |
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pci_config_read_write(true, 1, 1); |
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return; |
381 |
} |
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case 0x200002: |
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case 0x200cfe: { |
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if (size > 2) { |
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IO_PCI_ERR("pci bla\n"); |
386 |
} |
387 |
if (size == 1) { |
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char *p = (char *)&gPCI_Data_LE; |
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*(uint8 *)(p+2) = data; |
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pci_config_read_write(true, 2, 1); |
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return; |
392 |
} |
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char *p = (char *)&gPCI_Data_LE; |
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*(uint16 *)(p+2) = ppc_half_to_LE(data); |
395 |
pci_config_read_write(true, 2, 2); |
396 |
return; |
397 |
} |
398 |
case 0x200003: |
399 |
case 0x200cff: { |
400 |
if (size != 1) { |
401 |
IO_PCI_ERR("pci bla\n"); |
402 |
} |
403 |
char *p = (char *)&gPCI_Data_LE; |
404 |
*(uint8 *)(p+3) = data; |
405 |
pci_config_read_write(true, 3, 1); |
406 |
return; |
407 |
} |
408 |
} |
409 |
SINGLESTEP("unknown service\n"); |
410 |
} |
411 |
|
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void pci_read(uint32 addr, uint32 &data, int size) |
413 |
{ |
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// SINGLESTEP("usdf\n"); |
415 |
if (addr != IO_PCI_PA_START) IO_PCI_TRACE("read (%d) @%08x (from %08x, lr: %08x) -> \n", size, addr, ppc_cpu_get_pc(0), ppc_cpu_get_lr(0)); |
416 |
addr -= IO_PCI_PA_START; |
417 |
switch (addr) { |
418 |
case 0: |
419 |
case 0xcf8: |
420 |
data = gPCI_Address; |
421 |
return; |
422 |
case 0x200000: |
423 |
case 0x200cfc: |
424 |
if (size == 1) { |
425 |
void *p = &gPCI_Data_LE; |
426 |
data = *(uint8 *)p; |
427 |
IO_PCI_TRACE("%02x\n", data); |
428 |
return; |
429 |
} |
430 |
if (size == 2) { |
431 |
void *p = &gPCI_Data_LE; |
432 |
data = ppc_half_from_LE(*(uint16 *)p); |
433 |
IO_PCI_TRACE("%04x\n", data); |
434 |
return; |
435 |
} |
436 |
if (size != 4) { |
437 |
IO_PCI_ERR("pci bla\n"); |
438 |
} |
439 |
data = ppc_word_from_LE(gPCI_Data_LE); |
440 |
IO_PCI_TRACE("%08x\n", data); |
441 |
return; |
442 |
case 0x200001: |
443 |
case 0x200cfd: { |
444 |
if (size != 1) { |
445 |
IO_PCI_ERR("pci bla\n"); |
446 |
} |
447 |
char *p = (char*)&gPCI_Data_LE; |
448 |
data = *(uint8 *)(p+1); |
449 |
IO_PCI_TRACE("%02x\n", data); |
450 |
return; |
451 |
} |
452 |
case 0x200002: |
453 |
case 0x200cfe: { |
454 |
if (size > 2) { |
455 |
IO_PCI_ERR("pci bla\n"); |
456 |
} |
457 |
if (size==1) { |
458 |
char *p = (char*)&gPCI_Data_LE; |
459 |
data = *(uint8 *)(p+2); |
460 |
IO_PCI_TRACE("%02x\n", data); |
461 |
return; |
462 |
} |
463 |
char *p = (char*)&gPCI_Data_LE; |
464 |
data = ppc_half_from_LE(*(uint16 *)(p+2)); |
465 |
IO_PCI_TRACE("%04x\n", data); |
466 |
return; |
467 |
} |
468 |
case 0x200003: |
469 |
case 0x200cff: |
470 |
if (size != 1) { |
471 |
IO_PCI_ERR("pci bla\n"); |
472 |
} |
473 |
char *p = (char*)&gPCI_Data_LE; |
474 |
data = *(uint8 *)(p+3); |
475 |
IO_PCI_TRACE("%02x\n", data); |
476 |
return; |
477 |
} |
478 |
data = 0; |
479 |
SINGLESTEP("%08x unknown service\n", addr); |
480 |
} |
481 |
|
482 |
bool isa_read(uint32 addr, uint32 &data, int size) |
483 |
{ |
484 |
// Translate address into port |
485 |
addr -= IO_ISA_PA_START; |
486 |
ObjHandle oh = gPCI_Devices->findFirst(); |
487 |
while (oh != InvObjHandle) { |
488 |
PCI_Device *pd = (PCI_Device*)gPCI_Devices->get(oh); |
489 |
if (pd->readIO(addr, data, size)) { |
490 |
return true; |
491 |
} |
492 |
oh = gPCI_Devices->findNext(oh); |
493 |
} |
494 |
data = 0; |
495 |
// gSinglestep = true; |
496 |
IO_PCI_WARN("port %08x not registered! (for read)\n", addr); |
497 |
return false; |
498 |
} |
499 |
|
500 |
bool isa_write(uint32 addr, uint32 data, int size) |
501 |
{ |
502 |
// Translate address into port |
503 |
addr -= IO_ISA_PA_START; |
504 |
ObjHandle oh = gPCI_Devices->findFirst(); |
505 |
while (oh != InvObjHandle) { |
506 |
PCI_Device *pd = (PCI_Device*)gPCI_Devices->get(oh); |
507 |
if (pd->writeIO(addr, data, size)) { |
508 |
return true; |
509 |
} |
510 |
oh = gPCI_Devices->findNext(oh); |
511 |
} |
512 |
// gSinglestep = true; |
513 |
IO_PCI_WARN("port %08x not registered! (for write)\n", addr); |
514 |
return false; |
515 |
} |
516 |
|
517 |
bool pci_write_device(uint32 addr, uint32 data, int size) |
518 |
{ |
519 |
IO_PCI_TRACE("write DEVICE (%d) @%08x %08x (from %08x, lr: %08x)\n", size, addr, data, ppc_cpu_get_pc(0), ppc_cpu_get_lr(0)); |
520 |
ObjHandle oh = gPCI_Devices->findFirst(); |
521 |
while (oh != InvObjHandle) { |
522 |
PCI_Device *pd = (PCI_Device*)gPCI_Devices->get(oh); |
523 |
if (pd->writeMem(addr, data, size)) { |
524 |
return true; |
525 |
} |
526 |
oh = gPCI_Devices->findNext(oh); |
527 |
} |
528 |
return false; |
529 |
} |
530 |
|
531 |
bool pci_read_device(uint32 addr, uint32 &data, int size) |
532 |
{ |
533 |
IO_PCI_TRACE("read DEVICE (%d) @%08x (from %08x, lr: %08x)\n", size, addr, ppc_cpu_get_pc(0), ppc_cpu_get_lr(0)); |
534 |
ObjHandle oh = gPCI_Devices->findFirst(); |
535 |
while (oh != InvObjHandle) { |
536 |
PCI_Device *pd = (PCI_Device*)gPCI_Devices->get(oh); |
537 |
if (pd->readMem(addr, data, size)) { |
538 |
IO_PCI_TRACE("->%08x\n", data); |
539 |
return true; |
540 |
} |
541 |
oh = gPCI_Devices->findNext(oh); |
542 |
} |
543 |
data = 0; |
544 |
return false; |
545 |
} |
546 |
|
547 |
// PCI devices |
548 |
#include "io/graphic/gcard.h" |
549 |
#include "io/ide/ide.h" |
550 |
#include "io/macio/macio.h" |
551 |
#include "io/3c90x/3c90x.h" |
552 |
#include "io/rtl8139/rtl8139.h" |
553 |
#include "io/usb/usb.h" |
554 |
#include "io/serial/serial.h" |
555 |
|
556 |
void pci_init() |
557 |
{ |
558 |
gPCI_Devices = new AVLTree(true); |
559 |
gPCI_Devices->insert(new PCI_BridgeP2P()); |
560 |
// gPCI_Devices->insert(new PCI_BridgeHost()); |
561 |
|
562 |
gcard_init(); |
563 |
ide_init(); |
564 |
macio_init(); |
565 |
_3c90x_init(); |
566 |
rtl8139_init(); |
567 |
usb_init(); |
568 |
serial_init(); |
569 |
} |
570 |
|
571 |
void pci_done() |
572 |
{ |
573 |
serial_done(); |
574 |
usb_done(); |
575 |
rtl8139_done(); |
576 |
_3c90x_done(); |
577 |
macio_done(); |
578 |
ide_done(); |
579 |
gcard_done(); |
580 |
|
581 |
delete gPCI_Devices; |
582 |
} |
583 |
|
584 |
void pci_init_config() |
585 |
{ |
586 |
gcard_init_config(); |
587 |
ide_init_config(); |
588 |
macio_init_config(); |
589 |
_3c90x_init_config(); |
590 |
rtl8139_init_config(); |
591 |
usb_init_config(); |
592 |
serial_init_config(); |
593 |
} |