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dpavlin |
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/* |
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* HT Editor |
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* ppcopc.cc |
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* |
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* Copyright (C) 1999-2003 Sebastian Biallas (sb@biallas.net) |
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* Copyright 1994, 1995, 1999, 2000, 2001, 2002 |
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* Free Software Foundation, Inc. |
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* Written by Ian Lance Taylor, Cygnus Support |
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* |
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* This program is free software; you can redistribute it and/or modify |
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* it under the terms of the GNU General Public License version 2 as |
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* published by the Free Software Foundation. |
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* |
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* This program is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU General Public License for more details. |
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* |
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* You should have received a copy of the GNU General Public License |
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* along with this program; if not, write to the Free Software |
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. |
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*/ |
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#ifndef __PPC_OPC_H__ |
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#define __PPC_OPC_H__ |
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#include "system/types.h" |
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/* The opcode table is an array of struct powerpc_opcode. */ |
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struct powerpc_opcode |
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{ |
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/* The opcode name. */ |
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const char *name; |
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/* The opcode itself. Those bits which will be filled in with |
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operands are zeroes. */ |
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uint32 opcode; |
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/* The opcode mask. This is used by the disassembler. This is a |
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mask containing ones indicating those bits which must match the |
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opcode field, and zeroes indicating those bits which need not |
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match (and are presumably filled in by operands). */ |
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uint32 mask; |
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/* One bit flags for the opcode. These are used to indicate which |
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specific processors support the instructions. The defined values |
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are listed below. */ |
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uint32 flags; |
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/* An array of operand codes. Each code is an index into the |
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operand table. They appear in the order which the operands must |
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appear in assembly code, and are terminated by a zero. */ |
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byte operands[8]; |
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}; |
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/* The table itself is sorted by major opcode number, and is otherwise |
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in the order in which the disassembler should consider |
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instructions. */ |
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extern const struct powerpc_opcode powerpc_opcodes[]; |
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extern const int powerpc_num_opcodes; |
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/* Values defined for the flags field of a struct powerpc_opcode. */ |
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/* Opcode is defined for the PowerPC architecture. */ |
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#define PPC_OPCODE_PPC (01) |
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/* Opcode is defined for the POWER (RS/6000) architecture. */ |
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#define PPC_OPCODE_POWER (02) |
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/* Opcode is defined for the POWER2 (Rios 2) architecture. */ |
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#define PPC_OPCODE_POWER2 (04) |
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/* Opcode is only defined on 32 bit architectures. */ |
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#define PPC_OPCODE_32 (010) |
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/* Opcode is only defined on 64 bit architectures. */ |
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#define PPC_OPCODE_64 (020) |
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/* Opcode is supported by the Motorola PowerPC 601 processor. The 601 |
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is assumed to support all PowerPC (PPC_OPCODE_PPC) instructions, |
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but it also supports many additional POWER instructions. */ |
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#define PPC_OPCODE_601 (040) |
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/* Opcode is supported in both the Power and PowerPC architectures |
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(ie, compiler's -mcpu=common or assembler's -mcom). */ |
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#define PPC_OPCODE_COMMON (0100) |
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/* Opcode is supported for any Power or PowerPC platform (this is |
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for the assembler's -many option, and it eliminates duplicates). */ |
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#define PPC_OPCODE_ANY (0200) |
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/* Opcode is supported as part of the 64-bit bridge. */ |
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#define PPC_OPCODE_64_BRIDGE (0400) |
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/* Opcode is supported by Altivec Vector Unit */ |
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#define PPC_OPCODE_ALTIVEC (01000) |
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/* Opcode is supported by PowerPC 403 processor. */ |
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#define PPC_OPCODE_403 (02000) |
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/* Opcode is supported by PowerPC BookE processor. */ |
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#define PPC_OPCODE_BOOKE (04000) |
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/* Opcode is only supported by 64-bit PowerPC BookE processor. */ |
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#define PPC_OPCODE_BOOKE64 (010000) |
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/* Opcode is only supported by Power4 architecture. */ |
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#define PPC_OPCODE_POWER4 (020000) |
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/* Opcode isn't supported by Power4 architecture. */ |
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#define PPC_OPCODE_NOPOWER4 (040000) |
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/* Opcode is only supported by POWERPC Classic architecture. */ |
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#define PPC_OPCODE_CLASSIC (0100000) |
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/* Opcode is only supported by e500x2 Core. */ |
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#define PPC_OPCODE_SPE (0200000) |
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/* Opcode is supported by e500x2 Integer select APU. */ |
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#define PPC_OPCODE_ISEL (0400000) |
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/* Opcode is an e500 SPE floating point instruction. */ |
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#define PPC_OPCODE_EFS (01000000) |
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/* Opcode is supported by branch locking APU. */ |
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#define PPC_OPCODE_BRLOCK (02000000) |
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/* Opcode is supported by performance monitor APU. */ |
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#define PPC_OPCODE_PMR (04000000) |
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/* Opcode is supported by cache locking APU. */ |
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#define PPC_OPCODE_CACHELCK (010000000) |
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/* Opcode is supported by machine check APU. */ |
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#define PPC_OPCODE_RFMCI (020000000) |
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/* A macro to extract the major opcode from an instruction. */ |
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#define PPC_OP(i) (((i) >> 26) & 0x3f) |
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/* The operands table is an array of struct powerpc_operand. */ |
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struct powerpc_operand |
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{ |
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/* The number of bits in the operand. */ |
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byte bits; |
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/* How far the operand is left shifted in the instruction. */ |
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byte shift; |
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/* Extraction function. This is used by the disassembler. To |
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extract this operand type from an instruction, check this field. |
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If it is NULL, compute |
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op = ((i) >> o->shift) & ((1 << o->bits) - 1); |
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if ((o->flags & PPC_OPERAND_SIGNED) != 0 |
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&& (op & (1 << (o->bits - 1))) != 0) |
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op -= 1 << o->bits; |
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(i is the instruction, o is a pointer to this structure, and op |
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is the result; this assumes twos complement arithmetic). |
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If this field is not NULL, then simply call it with the |
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instruction value. It will return the value of the operand. If |
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the INVALID argument is not NULL, *INVALID will be set to |
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non-zero if this operand type can not actually be extracted from |
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this operand (i.e., the instruction does not match). If the |
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operand is valid, *INVALID will not be changed. */ |
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uint32 (*extract)(uint32 instruction, bool *invalid); |
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/* One bit syntax flags. */ |
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uint32 flags; |
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}; |
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/* Elements in the table are retrieved by indexing with values from |
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the operands field of the powerpc_opcodes table. */ |
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extern const struct powerpc_operand powerpc_operands[]; |
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/* Values defined for the flags field of a struct powerpc_operand. */ |
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/* This operand takes signed values. */ |
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#define PPC_OPERAND_SIGNED (01) |
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/* This operand takes signed values, but also accepts a full positive |
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range of values when running in 32 bit mode. That is, if bits is |
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16, it takes any value from -0x8000 to 0xffff. In 64 bit mode, |
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this flag is ignored. */ |
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#define PPC_OPERAND_SIGNOPT (02) |
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/* This operand does not actually exist in the assembler input. This |
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is used to support extended mnemonics such as mr, for which two |
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operands fields are identical. The assembler should call the |
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insert function with any op value. The disassembler should call |
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the extract function, ignore the return value, and check the value |
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placed in the valid argument. */ |
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#define PPC_OPERAND_FAKE (04) |
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/* The next operand should be wrapped in parentheses rather than |
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separated from this one by a comma. This is used for the load and |
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store instructions which want their operands to look like |
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reg,displacement(reg) |
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*/ |
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#define PPC_OPERAND_PARENS (010) |
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/* This operand may use the symbolic names for the CR fields, which |
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are |
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lt 0 gt 1 eq 2 so 3 un 3 |
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cr0 0 cr1 1 cr2 2 cr3 3 |
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cr4 4 cr5 5 cr6 6 cr7 7 |
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These may be combined arithmetically, as in cr2*4+gt. These are |
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only supported on the PowerPC, not the POWER. */ |
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#define PPC_OPERAND_CR (020) |
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/* This operand names a register. The disassembler uses this to print |
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register names with a leading 'r'. */ |
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#define PPC_OPERAND_GPR (040) |
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/* This operand names a floating point register. The disassembler |
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prints these with a leading 'f'. */ |
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#define PPC_OPERAND_FPR (0100) |
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/* This operand is a relative branch displacement. The disassembler |
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prints these symbolically if possible. */ |
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#define PPC_OPERAND_RELATIVE (0200) |
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/* This operand is an absolute branch address. The disassembler |
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prints these symbolically if possible. */ |
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#define PPC_OPERAND_ABSOLUTE (0400) |
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/* This operand is optional, and is zero if omitted. This is used for |
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the optional BF and L fields in the comparison instructions. The |
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assembler must count the number of operands remaining on the line, |
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and the number of operands remaining for the opcode, and decide |
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whether this operand is present or not. The disassembler should |
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print this operand out only if it is not zero. */ |
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#define PPC_OPERAND_OPTIONAL (01000) |
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/* This flag is only used with PPC_OPERAND_OPTIONAL. If this operand |
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is omitted, then for the next operand use this operand value plus |
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1, ignoring the next operand field for the opcode. This wretched |
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hack is needed because the Power rotate instructions can take |
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either 4 or 5 operands. The disassembler should print this operand |
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out regardless of the PPC_OPERAND_OPTIONAL field. */ |
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#define PPC_OPERAND_NEXT (02000) |
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/* This operand should be regarded as a negative number for the |
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purposes of overflow checking (i.e., the normal most negative |
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number is disallowed and one more than the normal most positive |
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number is allowed). This flag will only be set for a signed |
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operand. */ |
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#define PPC_OPERAND_NEGATIVE (04000) |
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/* This operand names a vector unit register. The disassembler |
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prints these with a leading 'v'. */ |
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#define PPC_OPERAND_VR (010000) |
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/* This operand is for the DS field in a DS form instruction. */ |
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#define PPC_OPERAND_DS (020000) |
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#endif |