Contents of /upstream/0.4.4/src/cpus/README_DYNTRANS

$Id: README_DYNTRANS,v 1.13 2007/02/11 10:47:30 debug Exp $

This README is old. Hm.


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Dyntrans TODO:

  x)  Make sure that all of these could work, at least in theory:

                        Instruction                     Word            Delay
        Arch.:          length:                         size:           slot:
        ------          -------                         -----           -----
        Alpha           32-bit                          64              no
        ARM             32-bit, 16-bit (Thumb)          32              no
        AVR             16-bit + variable               8               no
        AVR32           16-bit + variable               32              ?
        F-CPU           ?                               ?               ?
        H8              16-bit                          8/16            no
        HPPA            32-bit                          64/32           yes
        i960            32-bit + variable               32              ?
        IA64            128-bit                         64              no
        M68K            16-bit + variable               32              no
        M88K            32-bit (+var?)                  32              ?
        MIPS            32-bit, 16-bit (MIPS16)         64/32           yes
        OpenRISC        ?                               ?               ?
        PC532           ?                               32 (?)          ?
        POWER/PPC       32-bit                          64/32           no
        SH              32-bit, 16-bit (SHcompact)      64/32           yes(*)
        SPARC           32-bit                          64/32           yes
        Transputer      8-bit                           32/16           no
        x86             8-bit + variable                64/32/16        no
        VAX             8-bit + variable                32              no

        (*) Delay slot in SHcompact?


1	$Id: README_DYNTRANS,v 1.13 2007/02/11 10:47:30 debug Exp $
2
3	This README is old. Hm.
4
5
6	---------------------
7
8	Dyntrans TODO:
9
10	x) Make sure that all of these could work, at least in theory:
11
12	Instruction Word Delay
13	Arch.: length: size: slot:
14	------ ------- ----- -----
15	Alpha 32-bit 64 no
16	ARM 32-bit, 16-bit (Thumb) 32 no
17	AVR 16-bit + variable 8 no
18	AVR32 16-bit + variable 32 ?
19	F-CPU ? ? ?
20	H8 16-bit 8/16 no
21	HPPA 32-bit 64/32 yes
22	i960 32-bit + variable 32 ?
23	IA64 128-bit 64 no
24	M68K 16-bit + variable 32 no
25	M88K 32-bit (+var?) 32 ?
26	MIPS 32-bit, 16-bit (MIPS16) 64/32 yes
27	OpenRISC ? ? ?
28	PC532 ? 32 (?) ?
29	POWER/PPC 32-bit 64/32 no
30	SH 32-bit, 16-bit (SHcompact) 64/32 yes(*)
31	SPARC 32-bit 64/32 yes
32	Transputer 8-bit 32/16 no
33	x86 8-bit + variable 64/32/16 no
34	VAX 8-bit + variable 32 no
35
36	(*) Delay slot in SHcompact?
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38