This is repository of my old source code which isn't updated any more. Go to git.rot13.org for current projects!
Log of /upstream/0.4.4.1/demos
Directory Listing
Revision
37 -
Directory Listing
Modified
Mon Oct 8 16:21:43 2007 UTC
(16 years, 9 months ago)
by
dpavlin
0.4.4.1
Revision
34 -
Directory Listing
Modified
Mon Oct 8 16:21:17 2007 UTC
(16 years, 9 months ago)
by
dpavlin
Original Path:
trunk/demos
++ trunk/HISTORY (local)
$Id: HISTORY,v 1.1480 2007/02/19 01:34:42 debug Exp $
20061029 Changing usleep(1) calls in the debugger to usleep(10000)
20061107 Adding a new disk image option (-d o...) which sets the ISO9660
filesystem base offset; also making some other hacks to allow
NetBSD/dreamcast and homebrew demos/games to boot directly
from a filesystem image.
Moving Dreamcast-specific stuff in the documentation to its
own page (dreamcast.html).
Adding a border to the Dreamcast PVR framebuffer.
20061108 Adding a -T command line option (again?), for halting the
emulator on unimplemented memory accesses.
20061109 Continuing on various SH4 and Dreamcast related things.
The emulator should now halt on more unimplemented device
accesses, instead of just printing a warning, forcing me to
actually implement missing stuff :)
20061111 Continuing on SH4 and Dreamcast stuff.
Adding a bogus Landisk (SH4) machine mode.
20061112 Implementing some parts of the Dreamcast GDROM device. With
some ugly hacks, NetBSD can (barely) mount an ISO image.
20061113 NetBSD/dreamcast now starts booting from the Live CD image,
but crashes randomly quite early on in the boot process.
20061122 Beginning on a skeleton interrupt.h and interrupt.c for the
new interrupt subsystem.
20061124 Continuing on the new interrupt system; taking the first steps
to attempt to connect CPUs (SuperH and MIPS) and devices
(dev_cons and SH4 timer interrupts) to it. Many things will
probably break from now on.
20061125 Converting dev_ns16550, dev_8253 to the new interrupt system.
Attempting to begin to convert the ISA bus.
20061130 Incorporating a patch from Brian Foley for the configure
script, which checks for X11 libs in /usr/X11R6/lib64 (which
is used on some Linux systems).
20061227 Adding a note in the man page about booting from Dreamcast
CDROM images (i.e. that no external kernel is needed).
20061229 Continuing on the interrupt system rewrite: beginning to
convert more devices, adding abort() calls for legacy interrupt
system calls so that everything now _has_ to be rewritten!
Almost all machine modes are now completely broken.
20061230 More progress on removing old interrupt code, mostly related
to the ISA bus + devices, the LCA bus (on AlphaBook1), and
the Footbridge bus (for CATS). And some minor PCI stuff.
Connecting the ARM cpu to the new interrupt system.
The CATS, NetWinder, and QEMU_MIPS machine modes now work with
the new interrupt system :)
20061231 Connecting PowerPC CPUs to the new interrupt system.
Making PReP machines (IBM 6050) work again.
Beginning to convert the GT PCI controller (for e.g. Malta
and Cobalt emulation). Some things work, but not everything.
Updating Copyright notices for 2007.
20070101 Converting dev_kn02 from legacy style to devinit; the 3max
machine mode now works with the new interrupt system :-]
20070105 Beginning to convert the SGI O2 machine to the new interrupt
system; finally converting O2 (IP32) devices to devinit, etc.
20070106 Continuing on the interrupt system redesign/rewrite; KN01
(PMAX), KN230, and Dreamcast ASIC interrupts should work again,
moving out stuff from machine.h and devices.h into the
corresponding devices, beginning the rewrite of i80321
interrupts, etc.
20070107 Beginning on the rewrite of Eagle interrupt stuff (PReP, etc).
20070117 Beginning the rewrite of Algor (V3) interrupts (finally
changing dev_v3 into devinit style).
20070118 Removing the "bus" registry concept from machine.h, because
it was practically meaningless.
Continuing on the rewrite of Algor V3 ISA interrupts.
20070121 More work on Algor interrupts; they are now working again,
well enough to run NetBSD/algor. :-)
20070122 Converting VR41xx (HPCmips) interrupts. NetBSD/hpcmips
can be installed using the new interrupt system :-)
20070123 Making the testmips mode work with the new interrupt system.
20070127 Beginning to convert DEC5800 devices to devinit, and to the
new interrupt system.
Converting Playstation 2 devices to devinit, and converting
the interrupt system. Also fixing a severe bug: the interrupt
mask register on Playstation 2 is bitwise _toggled_ on writes.
20070128 Removing the dummy NetGear machine mode and the 8250 device
(which was only used by the NetGear machine).
Beginning to convert the MacPPC GC (Grand Central) interrupt
controller to the new interrupt system.
Converting Jazz interrupts (PICA61 etc.) to the new interrupt
system. NetBSD/arc can be installed again :-)
Fixing the JAZZ timer (hardcoding it at 100 Hz, works with
NetBSD and it is better than a completely dummy timer as it
was before).
Converting dev_mp to the new interrupt system, although I
haven't had time to actually test it yet.
Completely removing src/machines/interrupts.c, cpu_interrupt
and cpu_interrupt_ack in src/cpu.c, and
src/include/machine_interrupts.h! Adding fatal error messages
+ abort() in the few places that are left to fix.
Converting dev_z8530 to the new interrupt system.
FINALLY removing the md_int struct completely from the
machine struct.
SH4 fixes (adding a PADDR invalidation in the ITLB replacement
code in memory_sh.c); the NetBSD/dreamcast LiveCD now runs
all the way to the login prompt, and can be interacted with :-)
Converting the CPC700 controller (PCI and interrupt controller
for PM/PPC) to the new interrupt system.
20070129 Fixing MACE ISA interrupts (SGI IP32 emulation). Both NetBSD/
sgimips' and OpenBSD/sgi's ramdisk kernels can now be
interacted with again.
20070130 Moving out the MIPS multi_lw and _sw instruction combinations
so that they are auto-generated at compile time instead.
20070131 Adding detection of amd64/x86_64 hosts in the configure script,
for doing initial experiments (again :-) with native code
generation.
Adding a -k command line option to set the size of the dyntrans
cache, and a -B command line option to disable native code
generation, even if GXemul was compiled with support for
native code generation for the specific host CPU architecture.
20070201 Experimenting with a skeleton for native code generation.
Changing the default behaviour, so that native code generation
is now disabled by default, and has to be enabled by using
-b on the command line.
20070202 Continuing the native code generation experiments.
Making PCI interrupts work for Footbridge again.
20070203 More native code generation experiments.
Removing most of the native code generation experimental code,
it does not make sense to include any quick hacks like this.
Minor cleanup/removal of some more legacy MIPS interrupt code.
20070204 Making i80321 interrupts work again (for NetBSD/evbarm etc.),
and fixing the timer at 100 Hz.
20070206 Experimenting with removing the wdc interrupt slowness hack.
20070207 Lowering the number of dyntrans TLB entries for MIPS from
192 to 128, resulting in a minor speed improvement.
Minor optimization to the code invalidation routine in
cpu_dyntrans.c.
20070208 Increasing (experimentally) the nr of dyntrans instructions per
loop from 60 to 120.
20070210 Commenting out (experimentally) the dyntrans_device_danger
detection in memory_rw.c.
Changing the testmips and baremips machines to use a revision 2
MIPS64 CPU by default, instead of revision 1.
Removing the dummy i960, IA64, x86, AVR32, and HP PA-RISC
files, the PC bios emulation, and the Olivetti M700 (ARC) and
db64360 emulation modes.
20070211 Adding an "mp" demo to the demos directory, which tests the
SMP functionality of the testmips machine.
Fixing PReP interrupts some more. NetBSD/prep now boots again.
20070216 Adding a "nop workaround" for booting Mach/PMAX to the
documentation; thanks to Artur Bujdoso for the values.
Converting more of the MacPPC interrupt stuff to the new
system.
Beginning to convert BeBox interrupts to the new system.
PPC603e should NOT have the PPC_NO_DEC flag! Removing it.
Correcting BeBox clock speed (it was set to 100 in the NetBSD
bootinfo block, but should be 33000000/4), allowing NetBSD
to start without using the (incorrect) PPC_NO_DEC hack.
20070217 Implementing (slow) AltiVec vector loads and stores, allowing
NetBSD/macppc to finally boot using the GENERIC kernel :-)
Updating the documentation with install instructions for
NetBSD/macppc.
20070218-19 Regression testing for the release.
============== RELEASE 0.4.4 ==============
Revision
32 -
Directory Listing
Modified
Mon Oct 8 16:20:58 2007 UTC
(16 years, 9 months ago)
by
dpavlin
Original Path:
trunk/demos
++ trunk/HISTORY (local)
$Id: HISTORY,v 1.1421 2006/11/06 05:32:37 debug Exp $
20060816 Adding a framework for emulated/virtual timers (src/timer.c),
using only setitimer().
Rewriting the mc146818 to use the new timer framework.
20060817 Adding a call to gettimeofday() every now and then (once every
second, at the moment) to resynch the timer if it drifts.
Beginning to convert the ISA timer interrupt mechanism (8253
and 8259) to use the new timer framework.
Removing the -I command line option.
20060819 Adding the -I command line option again, with new semantics.
Working on Footbridge timer interrupts; NetBSD/NetWinder and
NetBSD/CATS now run at correct speed, but unfortunately with
HUGE delays during bootup.
20060821 Some minor m68k updates. Adding the first instruction: nop. :)
Minor Alpha emulation updates.
20060822 Adding a FreeBSD development specific YAMON environment
variable ("khz") (as suggested by Bruce M. Simpson).
Moving YAMON environment variable initialization from
machine_evbmips.c into promemul/yamon.c, and adding some more
variables.
Continuing on the LCA PCI bus controller (for Alpha machines).
20060823 Continuing on the timer stuff: experimenting with MIPS count/
compare interrupts connected to the timer framework.
20060825 Adding bogus SCSI commands 0x51 (SCSICDROM_READ_DISCINFO) and
0x52 (SCSICDROM_READ_TRACKINFO) to the SCSI emulation layer,
to allow NetBSD/pmax 4.0_BETA to be installed from CDROM.
Minor updates to the LCA PCI controller.
20060827 Implementing a CHIP8 cpu mode, and a corresponding CHIP8
machine, for fun. Disassembly support for all instructions,
and most of the common instructions have been implemented: mvi,
mov_imm, add_imm, jmp, rand, cls, sprite, skeq_imm, jsr,
skne_imm, bcd, rts, ldr, str, mov, or, and, xor, add, sub,
font, ssound, sdelay, gdelay, bogus skup/skpr, skeq, skne.
20060828 Beginning to convert the CHIP8 cpu in the CHIP8 machine to a
(more correct) RCA 180x cpu. (Disassembly for all 1802
instructions has been implemented, but no execution yet, and
no 1805 extended instructions.)
20060829 Minor Alpha emulation updates.
20060830 Beginning to experiment a little with PCI IDE for SGI O2.
Fixing the cursor key mappings for MobilePro 770 emulation.
Fixing the LK201 warning caused by recent NetBSD/pmax.
The MIPS R41xx standby, suspend, and hibernate instructions now
behave like the RM52xx/MIPS32/MIPS64 wait instruction.
Fixing dev_wdc so it calculates correct (64-bit) offsets before
giving them to diskimage_access().
20060831 Continuing on Alpha emulation (OSF1 PALcode).
20060901 Minor Alpha updates; beginning on virtual memory pagetables.
Removed the limit for max nr of devices (in preparation for
allowing devices' base addresses to be changed during runtime).
Adding a hack for MIPS [d]mfc0 select 0 (except the count
register), so that the coproc register is simply copied.
The MIPS suspend instruction now exits the emulator, instead
of being treated as a wait instruction (this causes NetBSD/
hpcmips to get correct 'halt' behavior).
The VR41xx RTC now returns correct time.
Connecting the VR41xx timer to the timer framework (fixed at
128 Hz, for now).
Continuing on SPARC emulation, adding more instructions:
restore, ba_xcc, ble. The rectangle drawing demo works :)
Removing the last traces of the old ENABLE_CACHE_EMULATION
MIPS stuff (not usable with dyntrans anyway).
20060902 Splitting up src/net.c into several smaller files in its own
subdirectory (src/net/).
20060903 Cleanup of the files in src/net/, to make them less ugly.
20060904 Continuing on the 'settings' subsystem.
Minor progress on the SPARC emulation mode.
20060905 Cleanup of various things, and connecting the settings
infrastructure to various subsystems (emul, machine, cpu, etc).
Changing the lk201 mouse update routine to not rely on any
emulated hardware framebuffer cursor coordinates, but instead
always do (semi-usable) relative movements.
20060906 Continuing on the lk201 mouse stuff. Mouse behaviour with
multiple framebuffers (which was working in Ultrix) is now
semi-broken (but it still works, in a way).
Moving the documentation about networking into its own file
(networking.html), and refreshing it a bit. Adding an example
of how to use ethernet frame direct-access (udp_snoop).
20060907 Continuing on the settings infrastructure.
20060908 Minor updates to SH emulation: for 32-bit emulation: delay
slots and the 'jsr @Rn' instruction. I'm putting 64-bit SH5 on
ice, for now.
20060909-10 Implementing some more 32-bit SH instructions. Removing the
64-bit mode completely. Enough has now been implemented to run
the rectangle drawing demo. :-)
20060912 Adding more SH instructions.
20060916 Continuing on SH emulation (some more instructions: div0u,
div1, rotcl/rotcr, more mov instructions, dt, braf, sets, sett,
tst_imm, dmuls.l, subc, ldc_rm_vbr, movt, clrt, clrs, clrmac).
Continuing on the settings subsystem (beginning on reading/
writing settings, removing bugs, and connecting more cpus to
the framework).
20060919 More work on SH emulation; adding an ldc banked instruction,
and attaching a 640x480 framebuffer to the Dreamcast machine
mode (NetBSD/dreamcast prints the NetBSD copyright banner :-),
and then panics).
20060920 Continuing on the settings subsystem.
20060921 Fixing the Footbridge timer stuff so that NetBSD/cats and
NetBSD/netwinder boot up without the delays.
20060922 Temporarily hardcoding MIPS timer interrupt to 100 Hz. With
'wait' support disabled, NetBSD/malta and Linux/malta run at
correct speed.
20060923 Connecting dev_gt to the timer framework, so that NetBSD/cobalt
runs at correct speed.
Moving SH4-specific memory mapped registers into its own
device (dev_sh4.c).
Running with -N now prints "idling" instead of bogus nr of
instrs/second (which isn't valid anyway) while idling.
20060924 Algor emulation should now run at correct speed.
Adding disassembly support for some MIPS64 revision 2
instructions: ext, dext, dextm, dextu.
20060926 The timer framework now works also when the MIPS wait
instruction is used.
20060928 Re-implementing checks for coprocessor availability for MIPS
cop0 instructions. (Thanks to Carl van Schaik for noticing the
lack of cop0 availability checks.)
20060929 Implementing an instruction combination hack which treats
NetBSD/pmax' idle loop as a wait-like instruction.
20060930 The ENTRYHI_R_MASK was missing in (at least) memory_mips_v2p.c,
causing TLB lookups to sometimes succeed when they should have
failed. (A big thank you to Juli Mallett for noticing the
problem.)
Adding disassembly support for more MIPS64 revision 2 opcodes
(seb, seh, wsbh, jalr.hb, jr.hb, synci, ins, dins, dinsu,
dinsm, dsbh, dshd, ror, dror, rorv, drorv, dror32). Also
implementing seb, seh, dsbh, dshd, and wsbh.
Implementing an instruction combination hack for Linux/pmax'
idle loop, similar to the NetBSD/pmax case.
20061001 Changing the NetBSD/sgimips install instructions to extract
files from an iso image, instead of downloading them via ftp.
20061002 More-than-31-bit userland addresses in memory_mips_v2p.c were
not actually working; applying a fix from Carl van Schaik to
enable them to work + making some other updates (adding kuseg
support).
Fixing hpcmips (vr41xx) timer initialization.
Experimenting with O(n)->O(1) reduction in the MIPS TLB lookup
loop. Seems to work both for R3000 and non-R3000.
20061003 Continuing a little on SH emulation (adding more control
registers; mini-cleanup of memory_sh.c).
20061004 Beginning on a dev_rtc, a clock/timer device for the test
machines; also adding a demo, and some documentation.
Fixing a bug in SH "mov.w @(disp,pc),Rn" (the result wasn't
sign-extended), and adding the addc and ldtlb instructions.
20061005 Contining on SH emulation: virtual to physical address
translation, and a skeleton exception mechanism.
20061006 Adding more SH instructions (various loads and stores, rte,
negc, muls.w, various privileged register-move instructions).
20061007 More SH instructions: various move instructions, trapa, div0s,
float, fdiv, ftrc.
Continuing on dev_rtc; removing the rtc demo.
20061008 Adding a dummy Dreamcast PROM module. (Homebrew Dreamcast
programs using KOS libs need this.)
Adding more SH instructions: "stc vbr,rn", rotl, rotr, fsca,
fmul, fadd, various floating-point moves, etc. A 256-byte
demo for Dreamcast runs :-)
20061012 Adding the SH "lds Rm,pr" and bsr instructions.
20061013 More SH instructions: "sts fpscr,rn", tas.b, and some more
floating point instructions, cmp/str, and more moves.
Adding a dummy dev_pvr (Dreamcast graphics controller).
20061014 Generalizing the expression evaluator (used in the built-in
debugger) to support parentheses and +-*/%^&|.
20061015 Removing the experimental tlb index hint code in
mips_memory_v2p.c, since it didn't really have any effect.
20061017 Minor SH updates; adding the "sts pr,Rn", fcmp/gt, fneg,
frchg, and some other instructions. Fixing missing sign-
extension in an 8-bit load instruction.
20061019 Adding a simple dev_dreamcast_rtc.
Implementing memory-mapped access to the SH ITLB/UTLB arrays.
20061021 Continuing on various SH and Dreamcast things: sh4 timers,
debug messages for dev_pvr, fixing some virtual address
translation bugs, adding the bsrf instruction.
The NetBSD/dreamcast GENERIC_MD kernel now reaches userland :)
Adding a dummy dev_dreamcast_asic.c (not really useful yet).
Implementing simple support for Store Queues.
Beginning on the PVR Tile Accelerator.
20061022 Generalizing the PVR framebuffer to support off-screen drawing,
multiple bit-depths, etc. (A small speed penalty, but most
likely worth it.)
Adding more SH instructions (mulu.w, fcmp/eq, fsub, fmac,
fschg, and some more); correcting bugs in "fsca" and "float".
20061024 Adding the SH ftrv (matrix * vector) instruction. Marcus
Comstedt's "tatest" example runs :) (wireframe only).
Correcting disassembly for SH floating point instructions that
use the xd* registers.
Adding the SH fsts instruction.
In memory_device_dyntrans_access(), only the currently used
range is now invalidated, and not the entire device range.
20061025 Adding a dummy AVR32 cpu mode skeleton.
20061026 Various Dreamcast updates; beginning on a Maple bus controller.
20061027 Continuing on the Maple bus. A bogus Controller, Keyboard, and
Mouse can now be detected by NetBSD and KOS homebrew programs.
Cleaning up the SH4 Timer Management Unit, and beginning on
SH4 interrupts.
Implementing the Dreamcast SYSASIC.
20061028 Continuing on the SYSASIC.
Adding the SH fsqrt instruction.
memory_sh.c now actually scans the ITLB.
Fixing a bug in dev_sh4.c, related to associative writes into
the memory-mapped UTLB array. NetBSD/dreamcast now reaches
userland stably, and prints the "Terminal type?" message :-]
Implementing enough of the Dreamcast keyboard to make NetBSD
accept it for input.
Enabling SuperH for stable (non-development) builds.
Adding NetBSD/dreamcast to the documentation, although it
doesn't support root-on-nfs yet.
20061029 Changing usleep(1) calls in the debugger to to usleep(10000)
(according to Brian Foley, this makes GXemul run better on
MacOS X).
Making the Maple "Controller" do something (enough to barely
interact with dcircus.elf).
20061030-31 Some progress on the PVR. More test programs start running (but
with strange output).
Various other SH4-related updates.
20061102 Various Dreamcast and SH4 updates; more KOS demos run now.
20061104 Adding a skeleton dev_mb8696x.c (the Dreamcast's LAN adapter).
20061105 Continuing on the MB8696x; NetBSD/dreamcast detects it as mbe0.
Testing for the release.
============== RELEASE 0.4.3 ==============
Revision
28 -
Directory Listing
Modified
Mon Oct 8 16:20:26 2007 UTC
(16 years, 9 months ago)
by
dpavlin
Original Path:
trunk/demos
++ trunk/HISTORY (local)
$Id: HISTORY,v 1.1298 2006/07/22 11:27:46 debug Exp $
20060626 Continuing on SPARC emulation (beginning on the 'save'
instruction, register windows, etc).
20060629 Planning statistics gathering (new -s command line option),
and renaming speed_tricks to allow_instruction_combinations.
20060630 Some minor manual page updates.
Various cleanups.
Implementing the -s command line option.
20060701 FINALLY found the bug which prevented Linux and Ultrix from
running without the ugly hack in the R2000/R3000 cache isol
code; it was the phystranslation hint array which was buggy.
Removing the phystranslation hint code completely, for now.
20060702 Minor dyntrans cleanups; invalidation of physpages now only
invalidate those parts of a page that have actually been
translated. (32 parts per page.)
Some MIPS non-R3000 speed fixes.
Experimenting with MIPS instruction combination for some
addiu+bne+sw loops, and sw+sw+sw.
Adding support (again) for larger-than-4KB pages in MIPS tlbw*.
Continuing on SPARC emulation: adding load/store instructions.
20060704 Fixing a virtual vs physical page shift bug in the new tlbw*
implementation. Problem noticed by Jakub Jermar. (Many thanks.)
Moving rfe and eret to cpu_mips_instr.c, since that is the
only place that uses them nowadays.
20060705 Removing the BSD license from the "testmachine" include files,
placing them in the public domain instead; this enables the
testmachine stuff to be used from projects which are
incompatible with the BSD license for some reason.
20060707 Adding instruction combinations for the R2000/R3000 L1
I-cache invalidation code used by NetBSD/pmax 3.0, lui+addiu,
various branches followed by addiu or nop, and jr ra followed
by addiu. The time it takes to perform a full NetBSD/pmax R3000
install on the laptop has dropped from 573 seconds to 539. :-)
20060708 Adding a framebuffer controller device (dev_fbctrl), which so
far can be used to change the fb resolution during runtime, but
in the future will also be useful for accelerated block fill/
copy, and possibly also simplified character output.
Adding an instruction combination for NetBSD/pmax' strlen.
20060709 Minor fixes: reading raw files in src/file.c wasn't memblock
aligned, removing buggy multi_sw MIPS instruction combination,
etc.
20060711 Adding a machine_qemu.c, which contains a "qemu_mips" machine.
(It mimics QEMU's MIPS machine mode, so that a test kernel
made for QEMU_MIPS also can run in GXemul... at least to some
extent.) Adding a short section about how to run this mode to
doc/guestoses.html.
20060714 Misc. minor code cleanups.
20060715 Applying a patch which adds getchar() to promemul/yamon.c
(from Oleksandr Tymoshenko).
Adding yamon.h from NetBSD, and rewriting yamon.c to use it
(instead of ugly hardcoded numbers) + some cleanup.
20060716 Found and fixed the bug which broke single-stepping of 64-bit
programs between 0.4.0 and 0.4.0.1 (caused by too quick
refactoring and no testing). Hopefully this fix will not
break too many other things.
20060718 Continuing on the 8253 PIT; it now works with Linux/QEMU_MIPS.
Re-adding the sw+sw+sw instr comb (the problem was that I had
ignored endian issues); however, it doesn't seem to give any
big performance gain.
20060720 Adding a dummy Transputer mode (T414, T800 etc) skeleton (only
the 'j' and 'ldc' instructions are implemented so far). :-}
20060721 Adding gtreg.h from NetBSD, updating dev_gt.c to use it, plus
misc. other updates to get Linux 2.6 for evbmips/malta working
(thanks to Alec Voropay for the details).
FINALLY found and fixed the bug which made tlbw* for non-R3000
buggy; it was a reference count problem in the dyntrans core.
20060722 Testing stuff; things seem stable enough for a new release.
============== RELEASE 0.4.1 ==============
Revision
24 -
Directory Listing
Added
Mon Oct 8 16:19:56 2007 UTC
(16 years, 9 months ago)
by
dpavlin
Original Path:
trunk/demos
++ trunk/HISTORY (local)
$Id: HISTORY,v 1.1256 2006/06/23 20:43:44 debug Exp $
20060219 Various minor updates. Removing the old MIPS16 skeleton code,
because it will need to be rewritten for dyntrans anyway.
20060220-22 Removing the non-working dyntrans backend support.
Continuing on the 64-bit dyntrans virtual memory generalization.
20060223 More work on the 64-bit vm generalization.
20060225 Beginning on MIPS dyntrans load/store instructions.
Minor PPC updates (64-bit load/store, etc).
Fixes for the variable-instruction-length framework, some
minor AVR updates (a simple Hello World program works!).
Beginning on a skeleton for automatically generating documen-
tation (for devices etc.).
20060226 PPC updates (adding some more 64-bit instructions, etc).
AVR updates (more instructions).
FINALLY found and fixed the zs bug, making NetBSD/macppc
accept the serial console.
20060301 Adding more AVR instructions.
20060304 Continuing on AVR-related stuff. Beginning on a framework for
cycle-accurate device emulation. Adding an experimental "PAL
TV" device (just a dummy so far).
20060305 Adding more AVR instructions.
Adding a dummy epcom serial controller (for TS7200 emulation).
20060310 Removing the emul() command from configuration files, so only
net() and machine() are supported.
Minor progress on the MIPS dyntrans rewrite.
20060311 Continuing on the MIPS dyntrans rewrite (adding more
instructions, etc).
20060315 Adding more instructions (sllv, srav, srlv, bgtz[l], blez[l],
beql, bnel, slti[u], various loads and stores).
20060316 Removing the ALWAYS_SIGNEXTEND_32 option, since it was rarely
used.
Adding more MIPS dyntrans instructions, and fixing bugs.
20060318 Implementing fast loads/stores for MIPS dyntrans (big/little
endian, 32-bit and 64-bit modes).
20060320 Making MIPS dyntrans the default configure option; use
"--enable-oldmips" to use the old bintrans system.
Adding MIPS dyntrans dmult[u]; minor updates.
20060322 Continuing... adding some more instructions.
Adding a simple skeleton for demangling C++ "_ZN" symbols.
20060323 Moving src/debugger.c into a new directory (src/debugger/).
20060324 Fixing the hack used to load PPC ELFs (useful for relocated
Linux/ppc kernels), and adding a dummy G3 machine mode.
20060325-26 Beginning to experiment with GDB remote serial protocol
connections; adding a -G command line option for selecting
which TCP port to listen to.
20060330 Beginning a major cleanup to replace things like "0x%016llx"
with more correct "0x%016"PRIx64, etc.
Continuing on the GDB remote serial protocol support.
20060331 More cleanup, and some minor GDB remote progress.
20060402 Adding a hack to the configure script, to allow compilation
on systems that lack PRIx64 etc.
20060406 Removing the temporary FreeBSD/arm hack in dev_ns16550.c and
replacing it with a better fix from Olivier Houchard.
20060407 A remote debugger (gdb or ddd) can now start and stop the
emulator using the GDB remote serial protocol, and registers
and memory can be read. MIPS only for now.
20060408 More GDB progress: single-stepping also works, and also adding
support for ARM, PowerPC, and Alpha targets.
Continuing on the delay-slot-across-page-boundary issue.
20060412 Minor update: beginning to add support for the SPARC target
to the remote GDB functionality.
20060414 Various MIPS updates: adding more instructions for dyntrans
(eret, add), and making some exceptions work. Fixing a bug
in dmult[u].
Implementing the first SPARC instructions (sethi, or).
20060415 Adding "magic trap" instructions so that PROM calls can be
software emulated in MIPS dyntrans.
Adding more MIPS dyntrans instructions (ddiv, dadd) and
fixing another bug in dmult.
20060416 More MIPS dyntrans progress: adding [d]addi, movn, movz, dsllv,
rfi, an ugly hack for supporting R2000/R3000 style faked caches,
preliminary interrupt support, and various other updates and
bugfixes.
20060417 Adding more SPARC instructions (add, sub, sll[x], sra[x],
srl[x]), and useful SPARC header definitions.
Adding the first (trivial) x86/AMD64 dyntrans instructions (nop,
cli/sti, stc/clc, std/cld, simple mov, inc ax). Various other
x86 updates related to variable instruction length stuff.
Adding unaligned loads/stores to the MIPS dyntrans mode (but
still using the pre-dyntrans (slow) imlementation).
20060419 Fixing a MIPS dyntrans exception-in-delay-slot bug.
Removing the old "show opcode statistics" functionality, since
it wasn't really useful and isn't implemented for dyntrans.
Single-stepping (or running with instruction trace) now looks
ok with dyntrans with delay-slot architectures.
20060420 Minor hacks (removing the -B command line option when compiled
for non-bintrans, and some other very minor updates).
Adding (slow) MIPS dyntrans load-linked/store-conditional.
20060422 Applying fixes for bugs discovered by Nils Weller's nwcc
(static DEC memmap => now per machine, and adding an extern
keyword in cpu_arm_instr.c).
Finally found one of the MIPS dyntrans bugs that I've been
looking for (copy/paste spelling error BIG vs LITTLE endian in
cpu_mips_instr_loadstore.c for 16-bit fast stores).
FINALLY found the major MIPS dyntrans bug: slti vs sltiu
signed/unsigned code in cpu_mips_instr.c. :-)
Adding more MIPS dyntrans instructions (lwc1, swc1, bgezal[l],
ctc1, tlt[u], tge[u], tne, beginning on rdhwr).
NetBSD/hpcmips can now reach userland when using dyntrans :-)
Adding some more x86 dyntrans instructions.
Finally removed the old Alpha-specific virtual memory code,
and replaced it with the generic 64-bit version.
Beginning to add disassembly support for SPECIAL3 MIPS opcodes.
20060423 Continuing on the delay-slot-across-page-boundary issue;
adding an end_of_page2 ic slot (like I had planned before, but
had removed for some reason).
Adding a quick-and-dirty fallback to legacy coprocessor 1
code (i.e. skipping dyntrans implementation for now).
NetBSD/hpcmips and NetBSD/pmax (when running on an emulated
R4400) can now be installed and run. :-) (Many bugs left
to fix, though.)
Adding more MIPS dyntrans instructions: madd[u], msub[u].
Cleaning up the SPECIAL2 vs R5900/TX79/C790 "MMI" opcode
maps somewhat (disassembly and dyntrans instruction decoding).
20060424 Adding an isa_revision field to mips_cpu_types.h, and making
sure that SPECIAL3 opcodes cause Reserved Instruction
exceptions on MIPS32/64 revisions lower than 2.
Adding the SPARC 'ba', 'call', 'jmpl/retl', 'and', and 'xor'
instructions.
20060425 Removing the -m command line option ("run at most x
instructions") and -T ("single_step_on_bad_addr"), because
they never worked correctly with dyntrans anyway.
Freshening up the man page.
20060428 Adding more MIPS dyntrans instructions: bltzal[l], idle.
Enabling MIPS dyntrans compare interrupts.
20060429 FINALLY found the weird dyntrans bug, causing NetBSD etc. to
behave strangely: some floating point code (conditional
coprocessor branches) could not be reused from the old
non-dyntrans code. The "quick-and-dirty fallback" only appeared
to work. Fixing by implementing bc1* for MIPS dyntrans.
More MIPS instructions: [d]sub, sdc1, ldc1, dmtc1, dmfc1, cfc0.
Freshening up MIPS floating point disassembly appearance.
20060430 Continuing on C790/R5900/TX79 disassembly; implementing 128-bit
"por" and "pextlw".
20060504 Disabling -u (userland emulation) unless compiled as unstable
development version.
Beginning on freshening up the testmachine include files,
to make it easier to reuse those files (placing them in
src/include/testmachine/), and beginning on a set of "demos"
or "tutorials" for the testmachine functionality.
Minor updates to the MIPS GDB remote protocol stub.
Refreshing doc/experiments.html and gdb_remote.html.
Enabling Alpha emulation in the stable release configuration,
even though no guest OSes for Alpha can run yet.
20060505 Adding a generic 'settings' object, which will contain
references to settable variables (which will later be possible
to access using the debugger).
20060506 Updating dev_disk and corresponding demo/documentation (and
switching from SCSI to IDE disk types, so it actually works
with current test machines :-).
20060510 Adding a -D_LARGEFILE_SOURCE hack for 64-bit Linux hosts,
so that fseeko() doesn't give a warning.
Updating the section about how dyntrans works (the "runnable
IR") in doc/intro.html.
Instruction updates (some x64=1 checks, some more R5900
dyntrans stuff: better mul/mult separation from MIPS32/64,
adding ei and di).
Updating MIPS cpuregs.h to a newer one (from NetBSD).
Adding more MIPS dyntrans instructions: deret, ehb.
20060514 Adding disassembly and beginning implementation of SPARC wr
and wrpr instructions.
20060515 Adding a SUN SPARC machine mode, with dummy SS20 and Ultra1
machines. Adding the 32-bit "rd psr" instruction.
20060517 Disassembly support for the general SPARC rd instruction.
Partial implementation of the cmp (subcc) instruction.
Some other minor updates (making sure that R5900 processors
start up with the EIE bit enabled, otherwise Linux/playstation2
receives no interrupts).
20060519 Minor MIPS updates/cleanups.
20060521 Moving the MeshCube machine into evbmips; this seems to work
reasonably well with a snapshot of a NetBSD MeshCube kernel.
Cleanup/fix of MIPS config0 register initialization.
20060529 Minor MIPS fixes, including a sign-extension fix to the
unaligned load/store code, which makes NetBSD/pmax on R3000
work better with dyntrans. (Ultrix and Linux/DECstation still
don't work, though.)
20060530 Minor updates to the Alpha machine mode: adding an AlphaBook
mode, an LCA bus (forwarding accesses to an ISA bus), etc.
20060531 Applying a bugfix for the MIPS dyntrans sc[d] instruction from
Ondrej Palkovsky. (Many thanks.)
20060601 Minifix to allow ARM immediate msr instruction to not give
an error for some valid values.
More Alpha updates.
20060602 Some minor Alpha updates.
20060603 Adding the Alpha cmpbge instruction. NetBSD/alpha prints its
first boot messages :-) on an emulated Alphabook 1.
20060612 Minor updates; adding a dev_ether.h include file for the
testmachine ether device. Continuing the hunt for the dyntrans
bug which makes Linux and Ultrix on DECstation behave
strangely... FINALLY found it! It seems to be related to
invalidation of the translation cache, on tlbw{r,i}. There
also seems to be some remaining interrupt-related problems.
20060614 Correcting the implementation of ldc1/sdc1 for MIPS dyntrans
(so that it uses 16 32-bit registers if the FR bit in the
status register is not set).
20060616 REMOVING BINTRANS COMPLETELY!
Removing the old MIPS interpretation mode.
Removing the MFHILO_DELAY and instruction delay stuff, because
they wouldn't work with dyntrans anyway.
20060617 Some documentation updates (adding "NetBSD-archive" to some
URLs, and new Debian/DECstation installation screenshots).
Removing the "tracenull" and "enable-caches" configure options.
Improving MIPS dyntrans performance somewhat (only invalidate
translations if necessary, on writes to the entryhi register,
instead of doing it for all cop0 writes).
20060618 More cleanup after the removal of the old MIPS emulation.
Trying to fix the MIPS dyntrans performance bugs/bottlenecks;
only semi-successful so far (for R3000).
20060620 Minor update to allow clean compilation again on Tru64/Alpha.
20060622 MIPS cleanup and fixes (removing the pc_last stuff, which
doesn't make sense with dyntrans anyway, and fixing a cross-
page-delay-slot-with-exception case in end_of_page).
Removing the old max_random_cycles_per_chunk stuff, and the
concept of cycles vs instructions for MIPS emulation.
FINALLY found and fixed the bug which caused NetBSD/pmax
clocks to behave strangely (it was a load to the zero register,
which was treated as a NOP; now it is treated as a load to a
dummy scratch register).
20060623 Increasing the dyntrans chunk size back to
N_SAFE_DYNTRANS_LIMIT, instead of N_SAFE_DYNTRANS_LIMIT/2.
Preparing for a quick release, even though there are known
bugs, and performance for non-R3000 MIPS emulation is very
poor. :-/
Reverting to half the dyntrans chunk size again, because
NetBSD/cats seemed less stable with full size chunks. :(
NetBSD/sgimips 3.0 can now run :-) (With release 0.3.8, only
NetBSD/sgimips 2.1 worked, not 3.0.)
============== RELEASE 0.4.0 ==============