src/machines/machine_qemu.c

/*
 *  Copyright (C) 2006  Anders Gavare.  All rights reserved.
 *
 *  Redistribution and use in source and binary forms, with or without
 *  modification, are permitted provided that the following conditions are met:
 *
 *  1. Redistributions of source code must retain the above copyright
 *     notice, this list of conditions and the following disclaimer.
 *  2. Redistributions in binary form must reproduce the above copyright  
 *     notice, this list of conditions and the following disclaimer in the 
 *     documentation and/or other materials provided with the distribution.
 *  3. The name of the author may not be used to endorse or promote products
 *     derived from this software without specific prior written permission.
 *
 *  THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
 *  ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 *  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 *  ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE   
 *  FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 *  DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 *  OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 *  HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 *  LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 *  OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 *  SUCH DAMAGE.
 *   
 *
 *  $Id: machine_qemu.c,v 1.4 2006/08/12 19:31:36 debug Exp $
 *
 *  This file contains semi-bogus machine descriptions for experimental
 *  machines, mimicing those emulated by Fabrice Bellard's QEMU.
 *
 *  See e.g. http://fabrice.bellard.free.fr/qemu/mips-test-0.1.tar.gz
 *  (available from http://fabrice.bellard.free.fr/qemu/download.html).
 */

#include <stdio.h>
#include <string.h>

#include "bus_isa.h"
#include "cpu.h"
#include "device.h"
#include "devices.h"
#include "machine.h"
#include "machine_interrupts.h"
#include "memory.h"
#include "misc.h"


MACHINE_SETUP(qemu_mips)
{
        machine->machine_name = "QEMU MIPS";
        cpu->byte_order = EMUL_BIG_ENDIAN;

        /*  An ISA bus, I/O ports at 0x14000000, memory at 0x10000000...  */
        bus_isa_init(machine, BUS_ISA_IDE0 | BUS_ISA_IDE1,
            0x14000000ULL, 0x10000000ULL, 8, 24);

        /*  ... and an ISA interrupt controller, connected to MIPS irq 2:  */
        machine->md_interrupt = isa8_interrupt;
        machine->isa_pic_data.native_irq = 2;

        if (!machine->prom_emulation)
                return;

        /*
         *  Registers at startup do not seem to be defined in QEMU, but
         *  bootargs and memory size are placed just below 16 MB.
         *
         *  Remember to start the emulator with options, e.g.:
         *
         *      -o "console=ttyS0 root=/dev/ram rd_start=0x80800000
         *              rd_size=10000000 init=/bin/sh"
         */

        store_string(cpu, (int32_t)(0x80000000 + 16*1048576 - 256),
            machine->boot_string_argument);
        store_32bit_word(cpu, (int32_t)(0x80000000 + 16*1048576 - 260),
            0x12345678);
        store_32bit_word(cpu, (int32_t)(0x80000000 + 16*1048576 - 264),
            machine->physical_ram_in_mb * 1048576);
}


MACHINE_DEFAULT_CPU(qemu_mips)
{
        /*  QEMU emulates a MIPS32 rev 1, so 4Kc will do just fine.  */
        machine->cpu_name = strdup("4Kc");
}


MACHINE_DEFAULT_RAM(qemu_mips)
{       
        machine->physical_ram_in_mb = 64;
}


MACHINE_REGISTER(qemu_mips)
{
        MR_DEFAULT(qemu_mips, "QEMU MIPS", ARCH_MIPS, MACHINE_QEMU_MIPS);
        me->set_default_ram = machine_default_ram_qemu_mips;
        machine_entry_add_alias(me, "qemu_mips");
}

1	/*
2	* Copyright (C) 2006 Anders Gavare. All rights reserved.
3	*
4	* Redistribution and use in source and binary forms, with or without
5	* modification, are permitted provided that the following conditions are met:
6	*
7	* 1. Redistributions of source code must retain the above copyright
8	* notice, this list of conditions and the following disclaimer.
9	* 2. Redistributions in binary form must reproduce the above copyright
10	* notice, this list of conditions and the following disclaimer in the
11	* documentation and/or other materials provided with the distribution.
12	* 3. The name of the author may not be used to endorse or promote products
13	* derived from this software without specific prior written permission.
14	*
15	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16	* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18	* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21	* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22	* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23	* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24	* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25	* SUCH DAMAGE.
26	*
27	*
28	* $Id: machine_qemu.c,v 1.4 2006/08/12 19:31:36 debug Exp $
29	*
30	* This file contains semi-bogus machine descriptions for experimental
31	* machines, mimicing those emulated by Fabrice Bellard's QEMU.
32	*
33	* See e.g. http://fabrice.bellard.free.fr/qemu/mips-test-0.1.tar.gz
34	* (available from http://fabrice.bellard.free.fr/qemu/download.html).
35	*/
36
37	#include <stdio.h>
38	#include <string.h>
39
40	#include "bus_isa.h"
41	#include "cpu.h"
42	#include "device.h"
43	#include "devices.h"
44	#include "machine.h"
45	#include "machine_interrupts.h"
46	#include "memory.h"
47	#include "misc.h"
48
49
50	MACHINE_SETUP(qemu_mips)
51	{
52	machine->machine_name = "QEMU MIPS";
53	cpu->byte_order = EMUL_BIG_ENDIAN;
54
55	/* An ISA bus, I/O ports at 0x14000000, memory at 0x10000000... */
56	bus_isa_init(machine, BUS_ISA_IDE0 \| BUS_ISA_IDE1,
57	0x14000000ULL, 0x10000000ULL, 8, 24);
58
59	/* ... and an ISA interrupt controller, connected to MIPS irq 2: */
60	machine->md_interrupt = isa8_interrupt;
61	machine->isa_pic_data.native_irq = 2;
62
63	if (!machine->prom_emulation)
64	return;
65
66	/*
67	* Registers at startup do not seem to be defined in QEMU, but
68	* bootargs and memory size are placed just below 16 MB.
69	*
70	* Remember to start the emulator with options, e.g.:
71	*
72	* -o "console=ttyS0 root=/dev/ram rd_start=0x80800000
73	* rd_size=10000000 init=/bin/sh"
74	*/
75
76	store_string(cpu, (int32_t)(0x80000000 + 16*1048576 - 256),
77	machine->boot_string_argument);
78	store_32bit_word(cpu, (int32_t)(0x80000000 + 16*1048576 - 260),
79	0x12345678);
80	store_32bit_word(cpu, (int32_t)(0x80000000 + 16*1048576 - 264),
81	machine->physical_ram_in_mb * 1048576);
82	}
83
84
85	MACHINE_DEFAULT_CPU(qemu_mips)
86	{
87	/* QEMU emulates a MIPS32 rev 1, so 4Kc will do just fine. */
88	machine->cpu_name = strdup("4Kc");
89	}
90
91
92	MACHINE_DEFAULT_RAM(qemu_mips)
93	{
94	machine->physical_ram_in_mb = 64;
95	}
96
97
98	MACHINE_REGISTER(qemu_mips)
99	{
100	MR_DEFAULT(qemu_mips, "QEMU MIPS", ARCH_MIPS, MACHINE_QEMU_MIPS);
101	me->set_default_ram = machine_default_ram_qemu_mips;
102	machine_entry_add_alias(me, "qemu_mips");
103	}
104