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dpavlin |
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/* |
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* Copyright (C) 2006 Anders Gavare. All rights reserved. |
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* |
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* Redistribution and use in source and binary forms, with or without |
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* modification, are permitted provided that the following conditions are met: |
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* |
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* 1. Redistributions of source code must retain the above copyright |
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* notice, this list of conditions and the following disclaimer. |
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* 2. Redistributions in binary form must reproduce the above copyright |
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* notice, this list of conditions and the following disclaimer in the |
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* documentation and/or other materials provided with the distribution. |
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* 3. The name of the author may not be used to endorse or promote products |
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* derived from this software without specific prior written permission. |
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* |
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND |
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE |
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS |
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) |
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY |
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF |
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* SUCH DAMAGE. |
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* |
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* |
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* $Id: dev_avr.c,v 1.4 2006/03/05 16:20:24 debug Exp $ |
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* |
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* AVR I/O and register area. |
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* |
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* NOTE: The dyntrans system usually translates in/out instructions so that |
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* cpu->cd.avr.xxx is accessed directly (where xxx is the right i/o register). |
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* This device is only here in case these addresses are reached using load/ |
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* stores to low memory addresses. |
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*/ |
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#include <stdio.h> |
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#include <stdlib.h> |
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#include <string.h> |
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#include "cpu.h" |
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#include "device.h" |
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#include "devices.h" |
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#include "machine.h" |
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#include "memory.h" |
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#include "misc.h" |
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/* #define debug fatal */ |
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struct avr_data { |
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int dummy; |
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}; |
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DEVICE_ACCESS(avr) |
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{ |
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uint64_t idata = 0, odata = 0; |
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/* struct avr_data *d = extra; */ |
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if (writeflag == MEM_WRITE) |
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idata = memory_readmax64(cpu, data, len); |
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switch (relative_addr) { |
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case 0x11: /* ddrd */ |
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if (writeflag == MEM_WRITE) |
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cpu->cd.avr.ddrd = idata; |
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else |
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odata = cpu->cd.avr.ddrd; |
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break; |
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case 0x12: /* portd */ |
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if (writeflag == MEM_WRITE) |
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cpu->cd.avr.portd_write = idata; |
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else |
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odata = cpu->cd.avr.portd_read; |
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break; |
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case 0x14: /* ddrc */ |
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if (writeflag == MEM_WRITE) |
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cpu->cd.avr.ddrc = idata; |
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else |
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odata = cpu->cd.avr.ddrc; |
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break; |
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case 0x15: /* portc */ |
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if (writeflag == MEM_WRITE) |
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cpu->cd.avr.portc_write = idata; |
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else |
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odata = cpu->cd.avr.portc_read; |
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break; |
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case 0x17: /* ddrb */ |
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if (writeflag == MEM_WRITE) |
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cpu->cd.avr.ddrb = idata; |
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else |
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odata = cpu->cd.avr.ddrb; |
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break; |
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case 0x1a: /* ddrc */ |
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if (writeflag == MEM_WRITE) |
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cpu->cd.avr.ddra = idata; |
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else |
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odata = cpu->cd.avr.ddra; |
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break; |
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case 0x3d: /* spl */ |
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if (writeflag == MEM_WRITE) { |
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cpu->cd.avr.sp &= 0xff00; |
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cpu->cd.avr.sp |= (idata & 0xff); |
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} else { |
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odata = cpu->cd.avr.sp & 0xff; |
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} |
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break; |
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case 0x3e: /* sph */ |
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if (writeflag == MEM_WRITE) { |
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cpu->cd.avr.sp &= 0xff; |
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cpu->cd.avr.sp |= ((idata & 0xff) << 8); |
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} else { |
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odata = (cpu->cd.avr.sp >> 8) & 0xff; |
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} |
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break; |
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default:debug("AVR: addr=0x%02x, len=%i, idata=%i\n", |
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(int)relative_addr, (int)len, (int)idata); |
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} |
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if (writeflag == MEM_READ) |
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memory_writemax64(cpu, data, len, odata); |
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return 1; |
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} |
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DEVINIT(avr) |
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{ |
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struct avr_data *d; |
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d = malloc(sizeof(struct avr_data)); |
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if (d == NULL) { |
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fprintf(stderr, "out of memory\n"); |
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exit(1); |
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} |
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memset(d, 0, sizeof(struct avr_data)); |
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memory_device_register(devinit->machine->memory, devinit->name, |
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devinit->addr, 0x60, dev_avr_access, d, DM_DEFAULT, NULL); |
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return 1; |
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} |
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