/[gxemul]/upstream/0.4.2/src/cpus/generate_arm_dpi.c
This is repository of my old source code which isn't updated any more. Go to git.rot13.org for current projects!
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Contents of /upstream/0.4.2/src/cpus/generate_arm_dpi.c

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Revision 31 - (show annotations)
Mon Oct 8 16:20:48 2007 UTC (16 years, 8 months ago) by dpavlin
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File size: 5112 byte(s)
0.4.2
1 /*
2 * Copyright (C) 2005 Anders Gavare. All rights reserved.
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 *
7 * 1. Redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer.
9 * 2. Redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution.
12 * 3. The name of the author may not be used to endorse or promote products
13 * derived from this software without specific prior written permission.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 *
27 *
28 * $Id: generate_arm_dpi.c,v 1.5 2005/12/26 12:32:10 debug Exp $
29 */
30
31 #include <stdio.h>
32
33 char *cond[16] = {
34 "eq", "ne", "cs", "cc", "mi", "pl", "vs", "vc",
35 "hi", "ls", "ge", "lt", "gt", "le", "", "" };
36
37 char *op[16] = {
38 "and", "eor", "sub", "rsb", "add", "adc", "sbc", "rsc",
39 "tst", "teq", "cmp", "cmn", "orr", "mov", "bic", "mvn" };
40
41
42 static char *uppercase(char *l)
43 {
44 static char staticbuf[1000];
45 size_t i = 0;
46
47 while (*l && i < sizeof(staticbuf)) {
48 char u = *l++;
49 if (u >= 'a' && u <= 'z')
50 u -= 32;
51 staticbuf[i++] = u;
52 }
53 if (i == sizeof(staticbuf))
54 i--;
55 staticbuf[i] = 0;
56 return staticbuf;
57 }
58
59
60 int main(int argc, char *argv[])
61 {
62 int n, a, reg, pc, s, c;
63
64 printf("\n/* AUTOMATICALLY GENERATED! Do not edit. */\n\n");
65 printf("#include <stdio.h>\n#include <stdlib.h>\n"
66 "#include \"cpu.h\"\n"
67 "#include \"misc.h\"\n"
68 "#define DYNTRANS_PC_TO_POINTERS arm_pc_to_pointers\n"
69 "#include \"quick_pc_to_pointers.h\"\n"
70 "#define reg(x) (*((uint32_t *)(x)))\n");
71 printf("extern void arm_instr_nop(struct cpu *, "
72 "struct arm_instr_call *);\n");
73 printf("extern void arm_instr_invalid(struct cpu *, "
74 "struct arm_instr_call *);\n");
75 printf("extern void arm_pc_to_pointers(struct cpu *);\n");
76
77 for (reg=0; reg<=2; reg++)
78 for (pc=0; pc<=1; pc++)
79 for (s=0; s<=1; s++)
80 for (a=0; a<16; a++) {
81 if (a >= 8 && a <= 11 && s == 0)
82 continue;
83 if (reg == 2 && pc)
84 continue;
85 printf("#define A__NAME arm_instr_%s%s%s%s\n",
86 op[a], s? "s" : "", pc? "_pc" : "", reg?
87 (reg==2? "_regshort" : "_reg") : "");
88
89 for (c=0; c<14; c++)
90 printf("#define A__NAME__%s arm_instr_%s%s%s%s__%s\n",
91 cond[c], op[a], s? "s" : "", pc? "_pc" : "",
92 reg? (reg==2? "_regshort" : "_reg") : "", cond[c]);
93 if (s) printf("#define A__S\n");
94 switch (reg) {
95 case 1: printf("#define A__REG\n"); break;
96 case 2: printf("#define A__REGSHORT\n"); break;
97 }
98 if (pc) printf("#define A__PC\n");
99 printf("#define A__%s\n", uppercase(op[a]));
100 printf("#include \"cpu_arm_instr_dpi.c\"\n");
101 printf("#undef A__%s\n", uppercase(op[a]));
102 if (s) printf("#undef A__S\n");
103 switch (reg) {
104 case 1: printf("#undef A__REG\n"); break;
105 case 2: printf("#undef A__REGSHORT\n"); break;
106 }
107 if (pc) printf("#undef A__PC\n");
108 for (c=0; c<14; c++)
109 printf("#undef A__NAME__%s\n", cond[c]);
110 printf("#undef A__NAME\n");
111 }
112
113 printf("\n\tvoid (*arm_dpi_instr[2 * 2 * 2 * 16 * 16])(struct cpu *,\n"
114 "\t\tstruct arm_instr_call *) = {\n");
115 n = 0;
116 for (reg=0; reg<=1; reg++)
117 for (pc=0; pc<=1; pc++)
118 for (s=0; s<=1; s++)
119 for (a=0; a<16; a++)
120 for (c=0; c<16; c++) {
121 if (c == 15)
122 printf("\tarm_instr_nop");
123 else if (a >= 8 && a <= 11 && s == 0)
124 printf("\tarm_instr_invalid");
125 else
126 printf("\tarm_instr_%s%s%s%s%s%s",
127 op[a], s? "s" : "", pc? "_pc" : "",
128 reg? "_reg" : "",
129 c!=14? "__" : "", cond[c]);
130 n++;
131 if (n != 2 * 2 * 2 * 16 * 16)
132 printf(",");
133 printf("\n");
134 }
135
136 printf("};\n\n");
137
138 printf("\n\tvoid (*arm_dpi_instr_regshort[2 * 16 * 16])(struct cpu *,\n"
139 "\t\tstruct arm_instr_call *) = {\n");
140 n = 0;
141 for (s=0; s<=1; s++)
142 for (a=0; a<16; a++)
143 for (c=0; c<16; c++) {
144 if (c == 15)
145 printf("\tarm_instr_nop");
146 else if (a >= 8 && a <= 11 && s == 0)
147 printf("\tarm_instr_invalid");
148 else
149 printf("\tarm_instr_%s%s_regshort%s%s",
150 op[a], s? "s" : "",
151 c!=14? "__" : "", cond[c]);
152 n++;
153 if (n != 2 * 16 * 16)
154 printf(",");
155 printf("\n");
156 }
157
158 printf("};\n\n");
159
160 return 0;
161 }
162

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