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/* |
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* Copyright (C) 2005-2006 Anders Gavare. All rights reserved. |
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* |
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* Redistribution and use in source and binary forms, with or without |
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* modification, are permitted provided that the following conditions are met: |
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* |
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* 1. Redistributions of source code must retain the above copyright |
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* notice, this list of conditions and the following disclaimer. |
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* 2. Redistributions in binary form must reproduce the above copyright |
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* notice, this list of conditions and the following disclaimer in the |
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* documentation and/or other materials provided with the distribution. |
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* 3. The name of the author may not be used to endorse or promote products |
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* derived from this software without specific prior written permission. |
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* |
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND |
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE |
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS |
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) |
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY |
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF |
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* SUCH DAMAGE. |
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* |
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* |
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* $Id: generate_arm_loadstore.c,v 1.6 2006/02/16 19:49:04 debug Exp $ |
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*/ |
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|
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#include <stdio.h> |
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|
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char *cond[16] = { |
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"eq", "ne", "cs", "cc", "mi", "pl", "vs", "vc", |
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"hi", "ls", "ge", "lt", "gt", "le", "", "" }; |
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|
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int main(int argc, char *argv[]) |
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{ |
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int l, b, w, h, s, u, p, reg, c, n; |
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|
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printf("\n/* AUTOMATICALLY GENERATED! Do not edit. */\n\n"); |
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printf("#include <stdio.h>\n#include <stdlib.h>\n" |
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"#include \"cpu.h\"\n" |
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"#include \"machine.h\"\n" |
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"#include \"memory.h\"\n" |
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"#include \"misc.h\"\n" |
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"#define DYNTRANS_PC_TO_POINTERS arm_pc_to_pointers\n" |
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"#include \"quick_pc_to_pointers.h\"\n" |
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"#define reg(x) (*((uint32_t *)(x)))\n"); |
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printf("extern void arm_instr_nop(struct cpu *, " |
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"struct arm_instr_call *);\n"); |
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printf("extern void arm_instr_invalid(struct cpu *, " |
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"struct arm_instr_call *);\n"); |
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printf("extern void arm_pc_to_pointers(struct cpu *);\n"); |
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|
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for (reg=0; reg<=1; reg++) |
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for (p=0; p<=1; p++) |
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for (u=0; u<=1; u++) |
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for (b=0; b<=1; b++) |
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for (w=0; w<=1; w++) |
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for (l=0; l<=1; l++) { |
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printf("#define A__NAME__general arm_instr_%s_" |
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"%s_%s_%s_%s_%s__general\n", |
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l?"load":"store", w? "w1" : "w0", |
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b? "byte" : "word", u? "u1" : "u0", |
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p? "p1" : "p0", reg? "reg" : "imm"); |
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|
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printf("#define A__NAME arm_instr_%s_%s_%s_%s_%s_%s\n", |
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l? "load" : "store", w? "w1" : "w0", |
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b? "byte" : "word", u? "u1" : "u0", |
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p? "p1" : "p0", reg? "reg" : "imm"); |
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for (c=0; c<14; c++) |
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printf("#define A__NAME__%s arm_instr_%s_" |
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"%s_%s_%s_%s_%s__%s\n", |
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cond[c], l?"load":"store", w? "w1" : "w0", |
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b? "byte" : "word", u? "u1" : "u0", |
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p? "p1" : "p0", reg? "reg" : "imm",cond[c]); |
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|
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printf("#define A__NAME_PC arm_instr_%s_%s_%s_%s_" |
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"%s_%s_pc\n", l? "load" : "store", w? "w1" : "w0", |
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b? "byte" : "word", u? "u1" : "u0", |
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p? "p1" : "p0", reg? "reg" : "imm"); |
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for (c=0; c<14; c++) |
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printf("#define A__NAME_PC__%s arm_instr_%s_" |
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"%s_%s_%s_%s_%s_pc__%s\n", |
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cond[c], l?"load":"store", w? "w1" : "w0", |
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b? "byte" : "word", u? "u1" : "u0", |
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p? "p1" : "p0", reg? "reg" : "imm",cond[c]); |
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|
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if (l) printf("#define A__L\n"); |
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if (w) printf("#define A__W\n"); |
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if (b) printf("#define A__B\n"); |
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if (u) printf("#define A__U\n"); |
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if (p) printf("#define A__P\n"); |
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if (reg)printf("#define A__REG\n"); |
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printf("#include \"cpu_arm_instr_loadstore.c\"\n"); |
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if (l) printf("#undef A__L\n"); |
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if (w) printf("#undef A__W\n"); |
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if (b) printf("#undef A__B\n"); |
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if (u) printf("#undef A__U\n"); |
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if (p) printf("#undef A__P\n"); |
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if (reg)printf("#undef A__REG\n"); |
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for (c=0; c<14; c++) |
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printf("#undef A__NAME__%s\n", cond[c]); |
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for (c=0; c<14; c++) |
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printf("#undef A__NAME_PC__%s\n", cond[c]); |
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printf("#undef A__NAME__general\n"); |
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printf("#undef A__NAME_PC\n"); |
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printf("#undef A__NAME\n"); |
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} |
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|
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printf("\n\tvoid (*arm_load_store_instr[1024])(struct cpu *,\n" |
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"\t\tstruct arm_instr_call *) = {\n"); |
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n = 0; |
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for (reg=0; reg<=1; reg++) |
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for (p=0; p<=1; p++) |
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for (u=0; u<=1; u++) |
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for (b=0; b<=1; b++) |
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for (w=0; w<=1; w++) |
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for (l=0; l<=1; l++) |
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for (c=0; c<16; c++) { |
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if (c == 15) |
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printf("\tarm_instr_nop"); |
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else |
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printf("\tarm_instr_%s_%s_%s_%s_%s_%s%s%s", |
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l? "load" : "store", |
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w? "w1" : "w0", |
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b? "byte" : "word", |
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u? "u1" : "u0", |
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p? "p1" : "p0", |
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reg? "reg" : "imm", |
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c!=14? "__" : "", cond[c]); |
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n++; |
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if (n!=2*2*2*2*2*2*16) |
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printf(","); |
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printf("\n"); |
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} |
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|
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printf("};\n\n"); |
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|
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/* Load/store with the pc register: */ |
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printf("\n\tvoid (*arm_load_store_instr_pc[1024])(struct cpu *,\n" |
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"\t\tstruct arm_instr_call *) = {\n"); |
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n = 0; |
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for (reg=0; reg<=1; reg++) |
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for (p=0; p<=1; p++) |
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for (u=0; u<=1; u++) |
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for (b=0; b<=1; b++) |
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for (w=0; w<=1; w++) |
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for (l=0; l<=1; l++) |
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for (c=0; c<16; c++) { |
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if (c == 15) |
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printf("\tarm_instr_nop"); |
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else |
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printf("\tarm_instr_%s_%s_%s_%s_%s_%s_pc%s%s", |
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l? "load" : "store", |
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w? "w1" : "w0", |
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b? "byte" : "word", |
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u? "u1" : "u0", |
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p? "p1" : "p0", |
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reg? "reg" : "imm", |
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c!=14? "__" : "", cond[c]); |
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n++; |
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if (n!=2*2*2*2*2*2*16) |
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printf(","); |
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printf("\n"); |
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} |
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|
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printf("};\n\n"); |
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|
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|
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|
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/* "Addressing mode 3": */ |
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|
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for (reg=0; reg<=1; reg++) |
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for (p=0; p<=1; p++) |
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for (u=0; u<=1; u++) |
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for (h=0; h<=1; h++) |
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for (w=0; w<=1; w++) |
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for (s=0; s<=1; s++) |
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for (l=0; l<=1; l++) { |
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if (s==0 && h==0) |
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continue; |
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/* l=0, s=1, h=0 means LDRD */ |
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/* l=0, s=1, h=1 means STRD */ |
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|
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printf("#define A__NAME__general arm_instr_%s_" |
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"%s_%s_%s_%s_%s_%s__general\n", |
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l?"load":"store", w? "w1" : "w0", |
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s? "signed" : "unsigned", |
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h? "halfword" : "byte", u? "u1" : "u0", |
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p? "p1" : "p0", reg? "reg" : "imm"); |
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|
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printf("#define A__NAME arm_instr_%s_%s_%s_%s_" |
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"%s_%s_%s\n", l? "load" : "store", w? "w1" : "w0", |
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s? "signed" : "unsigned", |
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h? "halfword" : "byte", u? "u1" : "u0", |
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p? "p1" : "p0", reg? "reg" : "imm"); |
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for (c=0; c<14; c++) |
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printf("#define A__NAME__%s arm_instr_%s_" |
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"%s_%s_%s_%s_%s_%s__%s\n", |
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cond[c], l?"load":"store", w? "w1" : "w0", |
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s? "signed" : "unsigned", |
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h? "halfword" : "byte", u? "u1" : "u0", |
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p? "p1" : "p0", reg? "reg" : "imm",cond[c]); |
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|
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printf("#define A__NAME_PC arm_instr_%s_%s_%s_%s_%s_" |
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"%s_%s_pc\n", l? "load" : "store", w? "w1" : "w0", |
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s? "signed" : "unsigned", |
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h? "halfword" : "byte", u? "u1" : "u0", |
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p? "p1" : "p0", reg? "reg" : "imm"); |
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for (c=0; c<14; c++) |
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printf("#define A__NAME_PC__%s arm_instr_%s_" |
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"%s_%s_%s_%s_%s_%s_pc__%s\n", |
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cond[c], l?"load":"store", w? "w1" : "w0", |
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s? "signed" : "unsigned", |
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h? "halfword" : "byte", u? "u1" : "u0", |
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p? "p1" : "p0", reg? "reg" : "imm",cond[c]); |
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|
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if (s) printf("#define A__SIGNED\n"); |
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if (l) printf("#define A__L\n"); |
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if (w) printf("#define A__W\n"); |
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if (h) printf("#define A__H\n"); |
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else printf("#define A__B\n"); |
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if (u) printf("#define A__U\n"); |
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if (p) printf("#define A__P\n"); |
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if (reg)printf("#define A__REG\n"); |
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printf("#include \"cpu_arm_instr_loadstore.c\"\n"); |
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if (s) printf("#undef A__SIGNED\n"); |
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if (l) printf("#undef A__L\n"); |
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if (w) printf("#undef A__W\n"); |
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if (h) printf("#undef A__H\n"); |
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else printf("#undef A__B\n"); |
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if (u) printf("#undef A__U\n"); |
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if (p) printf("#undef A__P\n"); |
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if (reg)printf("#undef A__REG\n"); |
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for (c=0; c<14; c++) |
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printf("#undef A__NAME__%s\n", cond[c]); |
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for (c=0; c<14; c++) |
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printf("#undef A__NAME_PC__%s\n", cond[c]); |
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printf("#undef A__NAME__general\n"); |
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printf("#undef A__NAME_PC\n"); |
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printf("#undef A__NAME\n"); |
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} |
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|
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printf("\n\tvoid (*arm_load_store_instr_3[2048])(struct cpu *,\n" |
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"\t\tstruct arm_instr_call *) = {\n"); |
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n = 0; |
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for (reg=0; reg<=1; reg++) |
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for (p=0; p<=1; p++) |
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for (u=0; u<=1; u++) |
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for (h=0; h<=1; h++) |
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for (w=0; w<=1; w++) |
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for (s=0; s<=1; s++) |
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for (l=0; l<=1; l++) |
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for (c=0; c<16; c++) { |
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if (c == 15) |
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printf("\tarm_instr_nop"); |
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else if (s==0 && h==0) |
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printf("\tarm_instr_invalid"); |
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else |
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printf("\tarm_instr_%s_%s_%s_%s_%s_%s_%s%s%s", |
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l? "load" : "store", |
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w? "w1" : "w0", |
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s? "signed" : "unsigned", |
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h? "halfword" : "byte", |
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u? "u1" : "u0", p? "p1" : "p0", |
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reg? "reg" : "imm", |
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c!=14? "__" : "", cond[c]); |
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n++; |
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if (n!=2*2*2*2*2*2*2*16) |
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printf(","); |
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printf("\n"); |
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} |
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|
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printf("};\n\n"); |
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|
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/* Load/store with the pc register: */ |
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printf("\n\tvoid (*arm_load_store_instr_3_pc[2048])(struct cpu *,\n" |
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"\t\tstruct arm_instr_call *) = {\n"); |
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n = 0; |
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for (reg=0; reg<=1; reg++) |
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for (p=0; p<=1; p++) |
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for (u=0; u<=1; u++) |
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for (h=0; h<=1; h++) |
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for (w=0; w<=1; w++) |
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for (s=0; s<=1; s++) |
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for (l=0; l<=1; l++) |
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for (c=0; c<16; c++) { |
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if (c == 15) |
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printf("\tarm_instr_nop"); |
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else if (s==0 && h==0) |
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printf("\tarm_instr_invalid"); |
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else |
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printf("\tarm_instr_%s_%s_%s_%s_%s_%s_" |
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"%s_pc%s%s", l? "load" : "store", |
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w? "w1" : "w0", |
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s? "signed" : "unsigned", |
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h? "halfword" : "byte", |
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u? "u1" : "u0", p? "p1" : "p0", |
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reg? "reg" : "imm", |
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c!=14? "__" : "", cond[c]); |
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n++; |
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if (n!=2*2*2*2*2*2*2*16) |
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printf(","); |
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printf("\n"); |
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} |
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|
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printf("};\n\n"); |
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|
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|
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return 0; |
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} |
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