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/* |
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* Copyright (C) 2005-2006 Anders Gavare. All rights reserved. |
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* |
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* Redistribution and use in source and binary forms, with or without |
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* modification, are permitted provided that the following conditions are met: |
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* |
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* 1. Redistributions of source code must retain the above copyright |
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* notice, this list of conditions and the following disclaimer. |
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* 2. Redistributions in binary form must reproduce the above copyright |
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* notice, this list of conditions and the following disclaimer in the |
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* documentation and/or other materials provided with the distribution. |
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* 3. The name of the author may not be used to endorse or promote products |
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* derived from this software without specific prior written permission. |
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* |
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND |
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE |
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS |
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) |
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY |
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF |
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* SUCH DAMAGE. |
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* |
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* |
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* $Id: cpu_ia64.c,v 1.11 2006/06/16 18:31:25 debug Exp $ |
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* |
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* IA64 CPU emulation. |
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* |
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* TODO: Everything. |
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*/ |
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|
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#include <stdio.h> |
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#include <stdlib.h> |
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#include <string.h> |
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#include <ctype.h> |
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|
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#include "cpu.h" |
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#include "machine.h" |
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#include "memory.h" |
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#include "misc.h" |
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#include "symbol.h" |
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|
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#include "tmp_ia64_head.c" |
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|
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|
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/* |
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* ia64_cpu_new(): |
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* |
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* Create a new IA64 CPU object by filling the CPU struct. |
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* Return 1 on success, 0 if cpu_type_name isn't a valid IA64 processor. |
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*/ |
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int ia64_cpu_new(struct cpu *cpu, struct memory *mem, |
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struct machine *machine, int cpu_id, char *cpu_type_name) |
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{ |
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if (strcasecmp(cpu_type_name, "IA64") != 0) |
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return 0; |
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|
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cpu->memory_rw = ia64_memory_rw; |
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cpu->update_translation_table = ia64_update_translation_table; |
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cpu->invalidate_translation_caches = |
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ia64_invalidate_translation_caches; |
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cpu->invalidate_code_translation = ia64_invalidate_code_translation; |
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cpu->is_32bit = 0; |
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|
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/* Only show name and caches etc for CPU nr 0: */ |
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if (cpu_id == 0) { |
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debug("%s", cpu->name); |
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} |
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|
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ia64_init_64bit_dummy_tables(cpu); |
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|
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return 1; |
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} |
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|
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|
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/* |
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* ia64_cpu_dumpinfo(): |
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*/ |
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void ia64_cpu_dumpinfo(struct cpu *cpu) |
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{ |
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/* TODO */ |
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debug("\n"); |
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} |
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|
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|
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/* |
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* ia64_cpu_list_available_types(): |
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* |
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* Print a list of available IA64 CPU types. |
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*/ |
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void ia64_cpu_list_available_types(void) |
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{ |
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/* TODO */ |
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|
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debug("IA64\n"); |
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} |
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|
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|
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/* |
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* ia64_cpu_register_match(): |
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*/ |
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void ia64_cpu_register_match(struct machine *m, char *name, |
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int writeflag, uint64_t *valuep, int *match_register) |
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{ |
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int cpunr = 0; |
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|
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/* CPU number: */ |
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|
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/* TODO */ |
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|
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if (strcasecmp(name, "pc") == 0) { |
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if (writeflag) { |
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m->cpus[cpunr]->pc = *valuep; |
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} else |
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*valuep = m->cpus[cpunr]->pc; |
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*match_register = 1; |
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} |
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|
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/* TODO */ |
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} |
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|
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|
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/* |
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* ia64_cpu_register_dump(): |
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* |
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* Dump cpu registers in a relatively readable format. |
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* |
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* gprs: set to non-zero to dump GPRs and some special-purpose registers. |
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* coprocs: set bit 0..3 to dump registers in coproc 0..3. |
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*/ |
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void ia64_cpu_register_dump(struct cpu *cpu, int gprs, int coprocs) |
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{ |
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char *symbol; |
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uint64_t offset; |
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int x = cpu->cpu_id; |
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|
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if (gprs) { |
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symbol = get_symbol_name(&cpu->machine->symbol_context, |
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cpu->pc, &offset); |
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debug("cpu%i:\t pc = 0x%016"PRIx64, x, (uint64_t)cpu->pc); |
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debug(" <%s>\n", symbol != NULL? symbol : " no symbol "); |
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|
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/* TODO */ |
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} |
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} |
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|
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|
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/* |
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* mips_cpu_tlbdump(): |
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* |
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* Called from the debugger to dump the TLB in a readable format. |
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* x is the cpu number to dump, or -1 to dump all CPUs. |
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* |
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* If rawflag is nonzero, then the TLB contents isn't formated nicely, |
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* just dumped. |
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*/ |
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void ia64_cpu_tlbdump(struct machine *m, int x, int rawflag) |
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{ |
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} |
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|
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|
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/* |
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* ia64_cpu_gdb_stub(): |
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* |
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* Execute a "remote GDB" command. Returns a newly allocated response string |
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* on success, NULL on failure. |
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*/ |
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char *ia64_cpu_gdb_stub(struct cpu *cpu, char *cmd) |
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{ |
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fatal("ia64_cpu_gdb_stub(): TODO\n"); |
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return NULL; |
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} |
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|
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|
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/* |
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* ia64_cpu_interrupt(): |
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*/ |
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int ia64_cpu_interrupt(struct cpu *cpu, uint64_t irq_nr) |
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{ |
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fatal("ia64_cpu_interrupt(): TODO\n"); |
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return 0; |
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} |
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|
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|
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/* |
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* ia64_cpu_interrupt_ack(): |
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*/ |
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int ia64_cpu_interrupt_ack(struct cpu *cpu, uint64_t irq_nr) |
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{ |
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/* fatal("ia64_cpu_interrupt_ack(): TODO\n"); */ |
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return 0; |
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} |
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|
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|
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/* |
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* ia64_cpu_disassemble_instr(): |
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* |
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* Convert an instruction word into human readable format, for instruction |
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* tracing. |
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* |
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* If running is 1, cpu->pc should be the address of the instruction. |
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* |
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* If running is 0, things that depend on the runtime environment (eg. |
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* register contents) will not be shown, and addr will be used instead of |
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* cpu->pc for relative addresses. |
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*/ |
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int ia64_cpu_disassemble_instr(struct cpu *cpu, unsigned char *ib, |
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int running, uint64_t dumpaddr) |
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{ |
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uint64_t offset; |
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char *symbol; |
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|
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if (running) |
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dumpaddr = cpu->pc; |
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|
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symbol = get_symbol_name(&cpu->machine->symbol_context, |
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dumpaddr, &offset); |
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if (symbol != NULL && offset == 0) |
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debug("<%s>\n", symbol); |
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|
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if (cpu->machine->ncpus > 1 && running) |
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debug("cpu%i:\t", cpu->cpu_id); |
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|
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debug("%016"PRIx64": ", (uint64_t) dumpaddr); |
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|
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debug("TODO\n"); |
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|
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/* iw = ib[0] + (ib[1]<<8) + (ib[2]<<16) + (ib[3]<<24); */ |
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|
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return 16; |
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} |
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|
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|
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#include "tmp_ia64_tail.c" |
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