1 |
/* |
2 |
* Copyright (C) 2005-2006 Anders Gavare. All rights reserved. |
3 |
* |
4 |
* Redistribution and use in source and binary forms, with or without |
5 |
* modification, are permitted provided that the following conditions are met: |
6 |
* |
7 |
* 1. Redistributions of source code must retain the above copyright |
8 |
* notice, this list of conditions and the following disclaimer. |
9 |
* 2. Redistributions in binary form must reproduce the above copyright |
10 |
* notice, this list of conditions and the following disclaimer in the |
11 |
* documentation and/or other materials provided with the distribution. |
12 |
* 3. The name of the author may not be used to endorse or promote products |
13 |
* derived from this software without specific prior written permission. |
14 |
* |
15 |
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND |
16 |
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
17 |
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
18 |
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE |
19 |
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
20 |
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS |
21 |
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) |
22 |
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
23 |
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY |
24 |
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF |
25 |
* SUCH DAMAGE. |
26 |
* |
27 |
* |
28 |
* $Id: machine_test.c,v 1.14 2006/06/24 10:19:19 debug Exp $ |
29 |
* |
30 |
* Various "test" machines (bare machines with just a CPU, or a bare machine |
31 |
* plus some experimental devices). |
32 |
*/ |
33 |
|
34 |
#include <stdio.h> |
35 |
#include <string.h> |
36 |
|
37 |
#include "cpu.h" |
38 |
#include "device.h" |
39 |
#include "devices.h" |
40 |
#include "machine.h" |
41 |
#include "memory.h" |
42 |
#include "misc.h" |
43 |
|
44 |
#include "testmachine/dev_cons.h" |
45 |
#include "testmachine/dev_disk.h" |
46 |
#include "testmachine/dev_ether.h" |
47 |
#include "testmachine/dev_fb.h" |
48 |
#include "testmachine/dev_mp.h" |
49 |
|
50 |
|
51 |
static void default_test(struct machine *machine, struct cpu *cpu) |
52 |
{ |
53 |
char tmpstr[1000]; |
54 |
|
55 |
snprintf(tmpstr, sizeof(tmpstr), "cons addr=0x%"PRIx64" irq=0", |
56 |
(uint64_t) DEV_CONS_ADDRESS); |
57 |
machine->main_console_handle = (size_t)device_add(machine, tmpstr); |
58 |
|
59 |
snprintf(tmpstr, sizeof(tmpstr), "mp addr=0x%"PRIx64, |
60 |
(uint64_t) DEV_MP_ADDRESS); |
61 |
device_add(machine, tmpstr); |
62 |
|
63 |
dev_fb_init(machine, machine->memory, DEV_FB_ADDRESS, VFB_GENERIC, |
64 |
640,480, 640,480, 24, "generic"); |
65 |
|
66 |
snprintf(tmpstr, sizeof(tmpstr), "disk addr=0x%"PRIx64, |
67 |
(uint64_t) DEV_DISK_ADDRESS); |
68 |
device_add(machine, tmpstr); |
69 |
|
70 |
snprintf(tmpstr, sizeof(tmpstr), "ether addr=0x%"PRIx64" irq=0", |
71 |
(uint64_t) DEV_ETHER_ADDRESS); |
72 |
device_add(machine, tmpstr); |
73 |
} |
74 |
|
75 |
|
76 |
MACHINE_SETUP(barealpha) |
77 |
{ |
78 |
machine->machine_name = "Generic \"bare\" Alpha machine"; |
79 |
machine->stable = 1; |
80 |
} |
81 |
|
82 |
|
83 |
MACHINE_SETUP(testalpha) |
84 |
{ |
85 |
machine->machine_name = "Alpha test machine"; |
86 |
machine->stable = 1; |
87 |
|
88 |
/* TODO: interrupt for Alpha? */ |
89 |
|
90 |
default_test(machine, cpu); |
91 |
} |
92 |
|
93 |
|
94 |
MACHINE_DEFAULT_CPU(barealpha) |
95 |
{ |
96 |
machine->cpu_name = strdup("21264"); |
97 |
} |
98 |
|
99 |
|
100 |
MACHINE_DEFAULT_CPU(testalpha) |
101 |
{ |
102 |
machine->cpu_name = strdup("21264"); |
103 |
} |
104 |
|
105 |
|
106 |
MACHINE_REGISTER(barealpha) |
107 |
{ |
108 |
MR_DEFAULT(barealpha, "Generic \"bare\" Alpha machine", |
109 |
ARCH_ALPHA, MACHINE_BAREALPHA); |
110 |
|
111 |
machine_entry_add_alias(me, "barealpha"); |
112 |
} |
113 |
|
114 |
|
115 |
MACHINE_REGISTER(testalpha) |
116 |
{ |
117 |
MR_DEFAULT(testalpha, "Test-machine for Alpha", |
118 |
ARCH_ALPHA, MACHINE_TESTALPHA); |
119 |
|
120 |
machine_entry_add_alias(me, "testalpha"); |
121 |
} |
122 |
|
123 |
|
124 |
MACHINE_SETUP(barearm) |
125 |
{ |
126 |
machine->machine_name = "Generic \"bare\" ARM machine"; |
127 |
machine->stable = 1; |
128 |
} |
129 |
|
130 |
|
131 |
MACHINE_SETUP(testarm) |
132 |
{ |
133 |
machine->machine_name = "ARM test machine"; |
134 |
machine->stable = 1; |
135 |
|
136 |
/* TODO: interrupt for ARM? */ |
137 |
|
138 |
default_test(machine, cpu); |
139 |
|
140 |
/* |
141 |
* Place a tiny stub at end of memory, and set the link register to |
142 |
* point to it. This stub halts the machine (making it easy to try |
143 |
* out simple stand-alone C functions). |
144 |
*/ |
145 |
cpu->cd.arm.r[ARM_SP] = machine->physical_ram_in_mb * 1048576 - 4096; |
146 |
cpu->cd.arm.r[ARM_LR] = cpu->cd.arm.r[ARM_SP] + 32; |
147 |
store_32bit_word(cpu, cpu->cd.arm.r[ARM_LR] + 0, 0xe3a00201); |
148 |
store_32bit_word(cpu, cpu->cd.arm.r[ARM_LR] + 4, 0xe5c00010); |
149 |
store_32bit_word(cpu, cpu->cd.arm.r[ARM_LR] + 8, 0xeafffffe); |
150 |
} |
151 |
|
152 |
|
153 |
MACHINE_DEFAULT_CPU(barearm) |
154 |
{ |
155 |
machine->cpu_name = strdup("SA1110"); |
156 |
} |
157 |
|
158 |
|
159 |
MACHINE_DEFAULT_CPU(testarm) |
160 |
{ |
161 |
machine->cpu_name = strdup("SA1110"); |
162 |
} |
163 |
|
164 |
|
165 |
MACHINE_REGISTER(barearm) |
166 |
{ |
167 |
MR_DEFAULT(barearm, "Generic \"bare\" ARM machine", |
168 |
ARCH_ARM, MACHINE_BAREARM); |
169 |
|
170 |
machine_entry_add_alias(me, "barearm"); |
171 |
} |
172 |
|
173 |
|
174 |
MACHINE_REGISTER(testarm) |
175 |
{ |
176 |
MR_DEFAULT(testarm, "Test-machine for ARM", ARCH_ARM, MACHINE_TESTARM); |
177 |
|
178 |
machine_entry_add_alias(me, "testarm"); |
179 |
} |
180 |
|
181 |
|
182 |
|
183 |
MACHINE_SETUP(barehppa) |
184 |
{ |
185 |
machine->machine_name = "Generic \"bare\" HPPA machine"; |
186 |
machine->stable = 1; |
187 |
} |
188 |
|
189 |
|
190 |
MACHINE_SETUP(testhppa) |
191 |
{ |
192 |
machine->machine_name = "HPPA test machine"; |
193 |
machine->stable = 1; |
194 |
|
195 |
/* TODO: interrupt for HPPA? */ |
196 |
|
197 |
default_test(machine, cpu); |
198 |
} |
199 |
|
200 |
|
201 |
MACHINE_DEFAULT_CPU(barehppa) |
202 |
{ |
203 |
machine->cpu_name = strdup("HPPA"); |
204 |
} |
205 |
|
206 |
|
207 |
MACHINE_DEFAULT_CPU(testhppa) |
208 |
{ |
209 |
machine->cpu_name = strdup("HPPA"); |
210 |
} |
211 |
|
212 |
|
213 |
MACHINE_REGISTER(barehppa) |
214 |
{ |
215 |
MR_DEFAULT(barehppa, "Generic \"bare\" HPPA machine", |
216 |
ARCH_HPPA, MACHINE_BAREHPPA); |
217 |
|
218 |
machine_entry_add_alias(me, "barehppa"); |
219 |
} |
220 |
|
221 |
|
222 |
MACHINE_REGISTER(testhppa) |
223 |
{ |
224 |
MR_DEFAULT(testhppa, "Test-machine for HPPA", |
225 |
ARCH_HPPA, MACHINE_TESTHPPA); |
226 |
|
227 |
machine_entry_add_alias(me, "testhppa"); |
228 |
} |
229 |
|
230 |
|
231 |
MACHINE_SETUP(barei960) |
232 |
{ |
233 |
machine->machine_name = "Generic \"bare\" i960 machine"; |
234 |
machine->stable = 1; |
235 |
} |
236 |
|
237 |
|
238 |
MACHINE_SETUP(testi960) |
239 |
{ |
240 |
machine->machine_name = "i960 test machine"; |
241 |
machine->stable = 1; |
242 |
|
243 |
/* TODO: interrupt for i960? */ |
244 |
|
245 |
default_test(machine, cpu); |
246 |
} |
247 |
|
248 |
|
249 |
MACHINE_DEFAULT_CPU(barei960) |
250 |
{ |
251 |
machine->cpu_name = strdup("i960"); |
252 |
} |
253 |
|
254 |
|
255 |
MACHINE_DEFAULT_CPU(testi960) |
256 |
{ |
257 |
machine->cpu_name = strdup("i960"); |
258 |
} |
259 |
|
260 |
|
261 |
MACHINE_REGISTER(barei960) |
262 |
{ |
263 |
MR_DEFAULT(barei960, "Generic \"bare\" i960 machine", |
264 |
ARCH_I960, MACHINE_BAREI960); |
265 |
|
266 |
machine_entry_add_alias(me, "barei960"); |
267 |
} |
268 |
|
269 |
|
270 |
MACHINE_REGISTER(testi960) |
271 |
{ |
272 |
MR_DEFAULT(testi960, "Test-machine for i960", |
273 |
ARCH_I960, MACHINE_TESTI960); |
274 |
|
275 |
machine_entry_add_alias(me, "testi960"); |
276 |
} |
277 |
|
278 |
|
279 |
MACHINE_SETUP(bareia64) |
280 |
{ |
281 |
machine->machine_name = "Generic \"bare\" IA64 machine"; |
282 |
machine->stable = 1; |
283 |
} |
284 |
|
285 |
|
286 |
MACHINE_SETUP(testia64) |
287 |
{ |
288 |
machine->machine_name = "IA64 test machine"; |
289 |
machine->stable = 1; |
290 |
|
291 |
/* TODO: interrupt for IA64? */ |
292 |
|
293 |
default_test(machine, cpu); |
294 |
} |
295 |
|
296 |
|
297 |
MACHINE_DEFAULT_CPU(bareia64) |
298 |
{ |
299 |
machine->cpu_name = strdup("IA64"); |
300 |
} |
301 |
|
302 |
|
303 |
MACHINE_DEFAULT_CPU(testia64) |
304 |
{ |
305 |
machine->cpu_name = strdup("IA64"); |
306 |
} |
307 |
|
308 |
|
309 |
MACHINE_REGISTER(bareia64) |
310 |
{ |
311 |
MR_DEFAULT(bareia64, "Generic \"bare\" IA64 machine", |
312 |
ARCH_IA64, MACHINE_BAREIA64); |
313 |
|
314 |
machine_entry_add_alias(me, "bareia64"); |
315 |
} |
316 |
|
317 |
|
318 |
MACHINE_REGISTER(testia64) |
319 |
{ |
320 |
MR_DEFAULT(testia64, "Test-machine for IA64", |
321 |
ARCH_IA64, MACHINE_TESTIA64); |
322 |
|
323 |
machine_entry_add_alias(me, "testia64"); |
324 |
} |
325 |
|
326 |
|
327 |
MACHINE_SETUP(barem68k) |
328 |
{ |
329 |
machine->machine_name = "Generic \"bare\" M68K machine"; |
330 |
machine->stable = 1; |
331 |
} |
332 |
|
333 |
|
334 |
MACHINE_SETUP(testm68k) |
335 |
{ |
336 |
machine->machine_name = "M68K test machine"; |
337 |
machine->stable = 1; |
338 |
|
339 |
/* TODO: interrupt for M68K? */ |
340 |
|
341 |
default_test(machine, cpu); |
342 |
} |
343 |
|
344 |
|
345 |
MACHINE_DEFAULT_CPU(barem68k) |
346 |
{ |
347 |
machine->cpu_name = strdup("68020"); |
348 |
} |
349 |
|
350 |
|
351 |
MACHINE_DEFAULT_CPU(testm68k) |
352 |
{ |
353 |
machine->cpu_name = strdup("68020"); |
354 |
} |
355 |
|
356 |
|
357 |
MACHINE_REGISTER(barem68k) |
358 |
{ |
359 |
MR_DEFAULT(barem68k, "Generic \"bare\" M68K machine", |
360 |
ARCH_M68K, MACHINE_BAREM68K); |
361 |
|
362 |
machine_entry_add_alias(me, "barem68k"); |
363 |
} |
364 |
|
365 |
|
366 |
MACHINE_REGISTER(testm68k) |
367 |
{ |
368 |
MR_DEFAULT(testm68k, "Test-machine for M68K", |
369 |
ARCH_M68K, MACHINE_TESTM68K); |
370 |
|
371 |
machine_entry_add_alias(me, "testm68k"); |
372 |
} |
373 |
|
374 |
|
375 |
MACHINE_SETUP(baremips) |
376 |
{ |
377 |
machine->machine_name = "Generic \"bare\" MIPS machine"; |
378 |
machine->stable = 1; |
379 |
cpu->byte_order = EMUL_BIG_ENDIAN; |
380 |
} |
381 |
|
382 |
|
383 |
MACHINE_SETUP(testmips) |
384 |
{ |
385 |
/* |
386 |
* A MIPS test machine (which happens to work with the |
387 |
* code in my master's thesis). :-) |
388 |
* |
389 |
* IRQ map: |
390 |
* 7 CPU counter |
391 |
* 6 SMP IPIs |
392 |
* 5 not used yet |
393 |
* 4 not used yet |
394 |
* 3 ethernet |
395 |
* 2 serial console |
396 |
*/ |
397 |
|
398 |
char tmpstr[1000]; |
399 |
|
400 |
machine->machine_name = "MIPS test machine"; |
401 |
machine->stable = 1; |
402 |
cpu->byte_order = EMUL_BIG_ENDIAN; |
403 |
|
404 |
snprintf(tmpstr, sizeof(tmpstr), "cons addr=0x%"PRIx64" irq=2", |
405 |
(uint64_t) DEV_CONS_ADDRESS); |
406 |
machine->main_console_handle = (size_t)device_add(machine, tmpstr); |
407 |
|
408 |
snprintf(tmpstr, sizeof(tmpstr), "mp addr=0x%"PRIx64, |
409 |
(uint64_t) DEV_MP_ADDRESS); |
410 |
device_add(machine, tmpstr); |
411 |
|
412 |
dev_fb_init(machine, machine->memory, DEV_FB_ADDRESS, VFB_GENERIC, |
413 |
640,480, 640,480, 24, "testmips generic"); |
414 |
|
415 |
snprintf(tmpstr, sizeof(tmpstr), "disk addr=0x%"PRIx64, |
416 |
(uint64_t) DEV_DISK_ADDRESS); |
417 |
device_add(machine, tmpstr); |
418 |
|
419 |
snprintf(tmpstr, sizeof(tmpstr), "ether addr=0x%"PRIx64" irq=3", |
420 |
(uint64_t) DEV_ETHER_ADDRESS); |
421 |
device_add(machine, tmpstr); |
422 |
} |
423 |
|
424 |
|
425 |
MACHINE_DEFAULT_CPU(baremips) |
426 |
{ |
427 |
machine->cpu_name = strdup("5Kc"); |
428 |
} |
429 |
|
430 |
|
431 |
MACHINE_DEFAULT_CPU(testmips) |
432 |
{ |
433 |
machine->cpu_name = strdup("5Kc"); |
434 |
} |
435 |
|
436 |
|
437 |
MACHINE_REGISTER(baremips) |
438 |
{ |
439 |
MR_DEFAULT(baremips, "Generic \"bare\" MIPS machine", |
440 |
ARCH_MIPS, MACHINE_BAREMIPS); |
441 |
|
442 |
machine_entry_add_alias(me, "baremips"); |
443 |
} |
444 |
|
445 |
|
446 |
MACHINE_REGISTER(testmips) |
447 |
{ |
448 |
MR_DEFAULT(testmips, "Test-machine for MIPS", |
449 |
ARCH_MIPS, MACHINE_TESTMIPS); |
450 |
|
451 |
machine_entry_add_alias(me, "testmips"); |
452 |
} |
453 |
|
454 |
|
455 |
MACHINE_SETUP(bareppc) |
456 |
{ |
457 |
machine->machine_name = "Generic \"bare\" PPC machine"; |
458 |
machine->stable = 1; |
459 |
} |
460 |
|
461 |
|
462 |
MACHINE_SETUP(testppc) |
463 |
{ |
464 |
machine->machine_name = "PPC test machine"; |
465 |
machine->stable = 1; |
466 |
|
467 |
/* TODO: interrupt for PPC? */ |
468 |
|
469 |
default_test(machine, cpu); |
470 |
} |
471 |
|
472 |
|
473 |
MACHINE_DEFAULT_CPU(bareppc) |
474 |
{ |
475 |
machine->cpu_name = strdup("PPC970"); |
476 |
} |
477 |
|
478 |
|
479 |
MACHINE_DEFAULT_CPU(testppc) |
480 |
{ |
481 |
machine->cpu_name = strdup("PPC970"); |
482 |
} |
483 |
|
484 |
|
485 |
MACHINE_REGISTER(bareppc) |
486 |
{ |
487 |
MR_DEFAULT(bareppc, "Generic \"bare\" PPC machine", |
488 |
ARCH_PPC, MACHINE_BAREPPC); |
489 |
|
490 |
machine_entry_add_alias(me, "bareppc"); |
491 |
} |
492 |
|
493 |
|
494 |
MACHINE_REGISTER(testppc) |
495 |
{ |
496 |
MR_DEFAULT(testppc, "Test-machine for PPC", ARCH_PPC, MACHINE_TESTPPC); |
497 |
|
498 |
machine_entry_add_alias(me, "testppc"); |
499 |
} |
500 |
|
501 |
|
502 |
MACHINE_SETUP(baresh) |
503 |
{ |
504 |
machine->machine_name = "Generic \"bare\" SH machine"; |
505 |
machine->stable = 1; |
506 |
} |
507 |
|
508 |
|
509 |
MACHINE_SETUP(testsh) |
510 |
{ |
511 |
machine->machine_name = "SH test machine"; |
512 |
machine->stable = 1; |
513 |
|
514 |
/* TODO: interrupt for SH? */ |
515 |
|
516 |
default_test(machine, cpu); |
517 |
} |
518 |
|
519 |
|
520 |
MACHINE_DEFAULT_CPU(baresh) |
521 |
{ |
522 |
machine->cpu_name = strdup("SH"); |
523 |
} |
524 |
|
525 |
|
526 |
MACHINE_DEFAULT_CPU(testsh) |
527 |
{ |
528 |
machine->cpu_name = strdup("SH"); |
529 |
} |
530 |
|
531 |
|
532 |
MACHINE_REGISTER(baresh) |
533 |
{ |
534 |
MR_DEFAULT(baresh, "Generic \"bare\" SH machine", |
535 |
ARCH_SH, MACHINE_BARESH); |
536 |
|
537 |
machine_entry_add_alias(me, "baresh"); |
538 |
} |
539 |
|
540 |
|
541 |
MACHINE_REGISTER(testsh) |
542 |
{ |
543 |
MR_DEFAULT(testsh, "Test-machine for SH", ARCH_SH, MACHINE_TESTSH); |
544 |
|
545 |
machine_entry_add_alias(me, "testsh"); |
546 |
} |
547 |
|
548 |
|
549 |
MACHINE_SETUP(baresparc) |
550 |
{ |
551 |
machine->machine_name = "Generic \"bare\" SPARC machine"; |
552 |
machine->stable = 1; |
553 |
} |
554 |
|
555 |
|
556 |
MACHINE_SETUP(testsparc) |
557 |
{ |
558 |
machine->machine_name = "SPARC test machine"; |
559 |
machine->stable = 1; |
560 |
|
561 |
/* TODO: interrupt for SPARC? */ |
562 |
|
563 |
default_test(machine, cpu); |
564 |
} |
565 |
|
566 |
|
567 |
MACHINE_DEFAULT_CPU(baresparc) |
568 |
{ |
569 |
machine->cpu_name = strdup("UltraSPARC"); |
570 |
} |
571 |
|
572 |
|
573 |
MACHINE_DEFAULT_CPU(testsparc) |
574 |
{ |
575 |
machine->cpu_name = strdup("UltraSPARC"); |
576 |
} |
577 |
|
578 |
|
579 |
MACHINE_REGISTER(baresparc) |
580 |
{ |
581 |
MR_DEFAULT(baresparc, "Generic \"bare\" SPARC machine", |
582 |
ARCH_SPARC, MACHINE_BARESPARC); |
583 |
|
584 |
machine_entry_add_alias(me, "baresparc"); |
585 |
} |
586 |
|
587 |
|
588 |
MACHINE_REGISTER(testsparc) |
589 |
{ |
590 |
MR_DEFAULT(testsparc, "Test-machine for SPARC", |
591 |
ARCH_SPARC, MACHINE_TESTSPARC); |
592 |
|
593 |
machine_entry_add_alias(me, "testsparc"); |
594 |
} |
595 |
|