src/devices/dev_sgi_ip19.c

/*
 *  Copyright (C) 2004-2006  Anders Gavare.  All rights reserved.
 *
 *  Redistribution and use in source and binary forms, with or without
 *  modification, are permitted provided that the following conditions are met:
 *
 *  1. Redistributions of source code must retain the above copyright
 *     notice, this list of conditions and the following disclaimer.
 *  2. Redistributions in binary form must reproduce the above copyright  
 *     notice, this list of conditions and the following disclaimer in the 
 *     documentation and/or other materials provided with the distribution.
 *  3. The name of the author may not be used to endorse or promote products
 *     derived from this software without specific prior written permission.
 *
 *  THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
 *  ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 *  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 *  ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE   
 *  FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 *  DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 *  OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 *  HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 *  LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 *  OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 *  SUCH DAMAGE.
 *   
 *
 *  $Id: dev_sgi_ip19.c,v 1.17 2006/02/09 20:02:59 debug Exp $
 *  
 *  SGI IP19 (and IP25) stuff.  The stuff in here is mostly guesswork.
 */

#include <stdio.h>
#include <stdlib.h>
#include <string.h>

#include "cpu.h"
#include "device.h"
#include "machine.h"
#include "memory.h"
#include "misc.h"


#define DEV_SGI_IP19_LENGTH     0x100000

struct sgi_ip19_data {
        uint64_t        cycle_counter;
};


/*
 *  dev_sgi_ip19_access():
 */
DEVICE_ACCESS(sgi_ip19)
{
        struct sgi_ip19_data *d = (struct sgi_ip19_data *) extra;
        uint64_t idata = 0, odata = 0;
        int regnr;

        if (writeflag == MEM_WRITE)
                idata = memory_readmax64(cpu, data, len);

        regnr = relative_addr / sizeof(uint32_t);

        switch (relative_addr) {
        case 0x08:      /*  cpu id  */
                if (writeflag == MEM_WRITE) {
                        debug("[ sgi_ip19: unimplemented write to address "
                            "0x%x (cpu id), data=0x%08x ]\n", (int)
                            relative_addr, (int)idata);
                } else {
                        odata = cpu->cpu_id;    /*  ?  TODO  */
                }
                break;
        case 0x200:     /*  cpu available mask?  */
                if (writeflag == MEM_WRITE) {
                        debug("[ sgi_ip19: unimplemented write to address "
                            "0x%x (cpu available mask), data=0x%08x ]\n",
                            (int)relative_addr, (int)idata);
                } else {
                        /*  Max 16 cpus?  */
                        odata = ((1 << cpu->machine->ncpus) - 1) << 16;
                }
                break;
        case 0x20000:   /*  cycle counter or clock  */
                if (writeflag == MEM_WRITE) {
                        debug("[ sgi_ip19: unimplemented write to address "
                            "0x%x (cycle counter), data=0x%08x ]\n",
                            (int)relative_addr, (int)idata);
                } else {
                        d->cycle_counter += 100;
                        odata = d->cycle_counter;
                }

                break;
        default:
                if (writeflag == MEM_WRITE) {
                        debug("[ sgi_ip19: unimplemented write to address "
                            "0x%x, data=0x%08x ]\n", (int)relative_addr,
                            (int)idata);
                } else {
                        debug("[ sgi_ip19: unimplemented read from address "
                            "0x%x: 0x%08x ]\n", (int)relative_addr, (int)odata);
                }
        }

        if (writeflag == MEM_READ)
                memory_writemax64(cpu, data, len, odata);

        return 1;
}


DEVINIT(sgi_ip19)
{
        struct sgi_ip19_data *d = malloc(sizeof(struct sgi_ip19_data));
        if (d == NULL) {
                fprintf(stderr, "out of memory\n");
                exit(1);
        }
        memset(d, 0, sizeof(struct sgi_ip19_data));

        memory_device_register(devinit->machine->memory, devinit->name,
            devinit->addr, DEV_SGI_IP19_LENGTH,
            dev_sgi_ip19_access, (void *)d, DM_DEFAULT, NULL);

        return 1;
}

1	/*
2	* Copyright (C) 2004-2006 Anders Gavare. All rights reserved.
3	*
4	* Redistribution and use in source and binary forms, with or without
5	* modification, are permitted provided that the following conditions are met:
6	*
7	* 1. Redistributions of source code must retain the above copyright
8	* notice, this list of conditions and the following disclaimer.
9	* 2. Redistributions in binary form must reproduce the above copyright
10	* notice, this list of conditions and the following disclaimer in the
11	* documentation and/or other materials provided with the distribution.
12	* 3. The name of the author may not be used to endorse or promote products
13	* derived from this software without specific prior written permission.
14	*
15	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16	* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18	* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21	* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22	* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23	* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24	* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25	* SUCH DAMAGE.
26	*
27	*
28	* $Id: dev_sgi_ip19.c,v 1.17 2006/02/09 20:02:59 debug Exp $
29	*
30	* SGI IP19 (and IP25) stuff. The stuff in here is mostly guesswork.
31	*/
32
33	#include <stdio.h>
34	#include <stdlib.h>
35	#include <string.h>
36
37	#include "cpu.h"
38	#include "device.h"
39	#include "machine.h"
40	#include "memory.h"
41	#include "misc.h"
42
43
44	#define DEV_SGI_IP19_LENGTH 0x100000
45
46	struct sgi_ip19_data {
47	uint64_t cycle_counter;
48	};
49
50
51	/*
52	* dev_sgi_ip19_access():
53	*/
54	DEVICE_ACCESS(sgi_ip19)
55	{
56	struct sgi_ip19_data d = (struct sgi_ip19_data ) extra;
57	uint64_t idata = 0, odata = 0;
58	int regnr;
59
60	if (writeflag == MEM_WRITE)
61	idata = memory_readmax64(cpu, data, len);
62
63	regnr = relative_addr / sizeof(uint32_t);
64
65	switch (relative_addr) {
66	case 0x08: /* cpu id */
67	if (writeflag == MEM_WRITE) {
68	debug("[ sgi_ip19: unimplemented write to address "
69	"0x%x (cpu id), data=0x%08x ]\n", (int)
70	relative_addr, (int)idata);
71	} else {
72	odata = cpu->cpu_id; /* ? TODO */
73	}
74	break;
75	case 0x200: /* cpu available mask? */
76	if (writeflag == MEM_WRITE) {
77	debug("[ sgi_ip19: unimplemented write to address "
78	"0x%x (cpu available mask), data=0x%08x ]\n",
79	(int)relative_addr, (int)idata);
80	} else {
81	/* Max 16 cpus? */
82	odata = ((1 << cpu->machine->ncpus) - 1) << 16;
83	}
84	break;
85	case 0x20000: /* cycle counter or clock */
86	if (writeflag == MEM_WRITE) {
87	debug("[ sgi_ip19: unimplemented write to address "
88	"0x%x (cycle counter), data=0x%08x ]\n",
89	(int)relative_addr, (int)idata);
90	} else {
91	d->cycle_counter += 100;
92	odata = d->cycle_counter;
93	}
94
95	break;
96	default:
97	if (writeflag == MEM_WRITE) {
98	debug("[ sgi_ip19: unimplemented write to address "
99	"0x%x, data=0x%08x ]\n", (int)relative_addr,
100	(int)idata);
101	} else {
102	debug("[ sgi_ip19: unimplemented read from address "
103	"0x%x: 0x%08x ]\n", (int)relative_addr, (int)odata);
104	}
105	}
106
107	if (writeflag == MEM_READ)
108	memory_writemax64(cpu, data, len, odata);
109
110	return 1;
111	}
112
113
114	DEVINIT(sgi_ip19)
115	{
116	struct sgi_ip19_data *d = malloc(sizeof(struct sgi_ip19_data));
117	if (d == NULL) {
118	fprintf(stderr, "out of memory\n");
119	exit(1);
120	}
121	memset(d, 0, sizeof(struct sgi_ip19_data));
122
123	memory_device_register(devinit->machine->memory, devinit->name,
124	devinit->addr, DEV_SGI_IP19_LENGTH,
125	dev_sgi_ip19_access, (void *)d, DM_DEFAULT, NULL);
126
127	return 1;
128	}
129