src/include/cpu_m68k.h

#ifndef CPU_M68K_H
#define CPU_M68K_H

/*
 *  Copyright (C) 2005  Anders Gavare.  All rights reserved.
 *
 *  Redistribution and use in source and binary forms, with or without
 *  modification, are permitted provided that the following conditions are met:
 *
 *  1. Redistributions of source code must retain the above copyright
 *     notice, this list of conditions and the following disclaimer.
 *  2. Redistributions in binary form must reproduce the above copyright  
 *     notice, this list of conditions and the following disclaimer in the 
 *     documentation and/or other materials provided with the distribution.
 *  3. The name of the author may not be used to endorse or promote products
 *     derived from this software without specific prior written permission.
 *
 *  THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
 *  ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 *  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 *  ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE   
 *  FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 *  DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 *  OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 *  HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 *  LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 *  OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 *  SUCH DAMAGE.
 *
 *
 *  $Id: cpu_m68k.h,v 1.9 2005/11/16 21:15:19 debug Exp $
 */

#include "misc.h"


struct cpu_family;

#define N_M68K_DREGS            8
#define N_M68K_AREGS            8

#define M68K_N_IC_ARGS                  3
#define M68K_INSTR_ALIGNMENT_SHIFT      1
#define M68K_IC_ENTRIES_SHIFT           11
#define M68K_IC_ENTRIES_PER_PAGE        (1 << M68K_IC_ENTRIES_SHIFT)
#define M68K_PC_TO_IC_ENTRY(a)          (((a)>>M68K_INSTR_ALIGNMENT_SHIFT) \
                                        & (M68K_IC_ENTRIES_PER_PAGE-1))
#define M68K_ADDR_TO_PAGENR(a)          ((a) >> (M68K_IC_ENTRIES_SHIFT \
                                        + M68K_INSTR_ALIGNMENT_SHIFT))

struct m68k_instr_call {
        void    (*f)(struct cpu *, struct m68k_instr_call *);
        int     len;
        size_t  arg[M68K_N_IC_ARGS];
};

/*  Translation cache struct for each physical page:  */
struct m68k_tc_physpage {
        struct m68k_instr_call ics[M68K_IC_ENTRIES_PER_PAGE + 1];
        uint32_t        next_ofs;       /*  or 0 for end of chain  */
        uint32_t        physaddr;
        int             flags;
};


#define M68K_N_VPH_ENTRIES      1048576

#define M68K_MAX_VPH_TLB_ENTRIES                256
struct m68k_vpg_tlb_entry {
        uint8_t         valid;
        uint8_t         writeflag;
        uint32_t        vaddr_page;
        uint32_t        paddr_page;
        unsigned char   *host_page;
};


struct m68k_cpu {
        /*
         *  General Purpose Registers:
         */

        uint32_t                d[N_M68K_DREGS];
        uint32_t                a[N_M68K_AREGS];


        /*
         *  Instruction translation cache:
         */

        /*  cur_ic_page is a pointer to an array of M68K_IC_ENTRIES_PER_PAGE
            instruction call entries. next_ic points to the next such
            call to be executed.  */
        struct m68k_tc_physpage *cur_physpage;
        struct m68k_instr_call  *cur_ic_page;
        struct m68k_instr_call  *next_ic;

        void                    (*combination_check)(struct cpu *,
                                    struct m68k_instr_call *, int low_addr);

        /*
         *  Virtual -> physical -> host address translation:
         *
         *  host_load and host_store point to arrays of M68K_N_VPH_ENTRIES
         *  pointers (to host pages); phys_addr points to an array of
         *  M68K_N_VPH_ENTRIES uint32_t.
         */

        struct m68k_vpg_tlb_entry       vph_tlb_entry[M68K_MAX_VPH_TLB_ENTRIES];
        unsigned char                   *host_load[M68K_N_VPH_ENTRIES];
        unsigned char                   *host_store[M68K_N_VPH_ENTRIES];
        uint32_t                        phys_addr[M68K_N_VPH_ENTRIES];
        struct m68k_tc_physpage         *phys_page[M68K_N_VPH_ENTRIES];

        uint32_t                        phystranslation[M68K_N_VPH_ENTRIES/32];
        int16_t                         vaddr_to_tlbindex[M68K_N_VPH_ENTRIES];
};


/*  cpu_m68k.c:  */
void m68k_update_translation_table(struct cpu *cpu, uint64_t vaddr_page,
        unsigned char *host_page, int writeflag, uint64_t paddr_page);
void m68k_invalidate_translation_caches(struct cpu *cpu, uint64_t, int);
void m68k_invalidate_code_translation(struct cpu *cpu, uint64_t, int);
int m68k_memory_rw(struct cpu *cpu, struct memory *mem, uint64_t vaddr,
        unsigned char *data, size_t len, int writeflag, int cache_flags);
int m68k_cpu_family_init(struct cpu_family *);


#endif  /*  CPU_M68K_H  */
1	#ifndef CPU_M68K_H
2	#define CPU_M68K_H
3
4	/*
5	* Copyright (C) 2005 Anders Gavare. All rights reserved.
6	*
7	* Redistribution and use in source and binary forms, with or without
8	* modification, are permitted provided that the following conditions are met:
9	*
10	* 1. Redistributions of source code must retain the above copyright
11	* notice, this list of conditions and the following disclaimer.
12	* 2. Redistributions in binary form must reproduce the above copyright
13	* notice, this list of conditions and the following disclaimer in the
14	* documentation and/or other materials provided with the distribution.
15	* 3. The name of the author may not be used to endorse or promote products
16	* derived from this software without specific prior written permission.
17	*
18	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
19	* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21	* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
22	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24	* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25	* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26	* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27	* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28	* SUCH DAMAGE.
29	*
30	*
31	* $Id: cpu_m68k.h,v 1.9 2005/11/16 21:15:19 debug Exp $
32	*/
33
34	#include "misc.h"
35
36
37	struct cpu_family;
38
39	#define N_M68K_DREGS 8
40	#define N_M68K_AREGS 8
41
42	#define M68K_N_IC_ARGS 3
43	#define M68K_INSTR_ALIGNMENT_SHIFT 1
44	#define M68K_IC_ENTRIES_SHIFT 11
45	#define M68K_IC_ENTRIES_PER_PAGE (1 << M68K_IC_ENTRIES_SHIFT)
46	#define M68K_PC_TO_IC_ENTRY(a) (((a)>>M68K_INSTR_ALIGNMENT_SHIFT) \
47	& (M68K_IC_ENTRIES_PER_PAGE-1))
48	#define M68K_ADDR_TO_PAGENR(a) ((a) >> (M68K_IC_ENTRIES_SHIFT \
49	+ M68K_INSTR_ALIGNMENT_SHIFT))
50
51	struct m68k_instr_call {
52	void (f)(struct cpu , struct m68k_instr_call *);
53	int len;
54	size_t arg[M68K_N_IC_ARGS];
55	};
56
57	/* Translation cache struct for each physical page: */
58	struct m68k_tc_physpage {
59	struct m68k_instr_call ics[M68K_IC_ENTRIES_PER_PAGE + 1];
60	uint32_t next_ofs; /* or 0 for end of chain */
61	uint32_t physaddr;
62	int flags;
63	};
64
65
66	#define M68K_N_VPH_ENTRIES 1048576
67
68	#define M68K_MAX_VPH_TLB_ENTRIES 256
69	struct m68k_vpg_tlb_entry {
70	uint8_t valid;
71	uint8_t writeflag;
72	uint32_t vaddr_page;
73	uint32_t paddr_page;
74	unsigned char *host_page;
75	};
76
77
78	struct m68k_cpu {
79	/*
80	* General Purpose Registers:
81	*/
82
83	uint32_t d[N_M68K_DREGS];
84	uint32_t a[N_M68K_AREGS];
85
86
87	/*
88	* Instruction translation cache:
89	*/
90
91	/* cur_ic_page is a pointer to an array of M68K_IC_ENTRIES_PER_PAGE
92	instruction call entries. next_ic points to the next such
93	call to be executed. */
94	struct m68k_tc_physpage *cur_physpage;
95	struct m68k_instr_call *cur_ic_page;
96	struct m68k_instr_call *next_ic;
97
98	void (combination_check)(struct cpu ,
99	struct m68k_instr_call *, int low_addr);
100
101	/*
102	* Virtual -> physical -> host address translation:
103	*
104	* host_load and host_store point to arrays of M68K_N_VPH_ENTRIES
105	* pointers (to host pages); phys_addr points to an array of
106	* M68K_N_VPH_ENTRIES uint32_t.
107	*/
108
109	struct m68k_vpg_tlb_entry vph_tlb_entry[M68K_MAX_VPH_TLB_ENTRIES];
110	unsigned char *host_load[M68K_N_VPH_ENTRIES];
111	unsigned char *host_store[M68K_N_VPH_ENTRIES];
112	uint32_t phys_addr[M68K_N_VPH_ENTRIES];
113	struct m68k_tc_physpage *phys_page[M68K_N_VPH_ENTRIES];
114
115	uint32_t phystranslation[M68K_N_VPH_ENTRIES/32];
116	int16_t vaddr_to_tlbindex[M68K_N_VPH_ENTRIES];
117	};
118
119
120	/* cpu_m68k.c: */
121	void m68k_update_translation_table(struct cpu *cpu, uint64_t vaddr_page,
122	unsigned char *host_page, int writeflag, uint64_t paddr_page);
123	void m68k_invalidate_translation_caches(struct cpu *cpu, uint64_t, int);
124	void m68k_invalidate_code_translation(struct cpu *cpu, uint64_t, int);
125	int m68k_memory_rw(struct cpu cpu, struct memory mem, uint64_t vaddr,
126	unsigned char *data, size_t len, int writeflag, int cache_flags);
127	int m68k_cpu_family_init(struct cpu_family *);
128
129
130	#endif /* CPU_M68K_H */