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#ifndef CPU_AVR_H |
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#define CPU_AVR_H |
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|
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/* |
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* Copyright (C) 2005 Anders Gavare. All rights reserved. |
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* |
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* Redistribution and use in source and binary forms, with or without |
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* modification, are permitted provided that the following conditions are met: |
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* |
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* 1. Redistributions of source code must retain the above copyright |
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* notice, this list of conditions and the following disclaimer. |
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* 2. Redistributions in binary form must reproduce the above copyright |
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* notice, this list of conditions and the following disclaimer in the |
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* documentation and/or other materials provided with the distribution. |
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* 3. The name of the author may not be used to endorse or promote products |
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* derived from this software without specific prior written permission. |
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* |
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND |
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE |
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS |
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) |
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY |
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF |
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* SUCH DAMAGE. |
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* |
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* |
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* $Id: cpu_avr.h,v 1.10 2005/11/16 21:15:19 debug Exp $ |
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*/ |
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|
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#include "misc.h" |
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|
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|
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struct cpu_family; |
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|
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#define N_AVR_REGS 32 |
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|
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#define AVR_N_IC_ARGS 2 |
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#define AVR_INSTR_ALIGNMENT_SHIFT 1 |
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#define AVR_IC_ENTRIES_SHIFT 11 |
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#define AVR_IC_ENTRIES_PER_PAGE (1 << AVR_IC_ENTRIES_SHIFT) |
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#define AVR_PC_TO_IC_ENTRY(a) (((a)>>AVR_INSTR_ALIGNMENT_SHIFT) \ |
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& (AVR_IC_ENTRIES_PER_PAGE-1)) |
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#define AVR_ADDR_TO_PAGENR(a) ((a) >> (AVR_IC_ENTRIES_SHIFT \ |
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+ AVR_INSTR_ALIGNMENT_SHIFT)) |
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|
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struct avr_instr_call { |
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void (*f)(struct cpu *, struct avr_instr_call *); |
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int len; |
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size_t arg[AVR_N_IC_ARGS]; |
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}; |
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|
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/* Translation cache struct for each physical page: */ |
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struct avr_tc_physpage { |
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struct avr_instr_call ics[AVR_IC_ENTRIES_PER_PAGE + 1]; |
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uint32_t next_ofs; /* or 0 for end of chain */ |
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uint32_t physaddr; |
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int flags; |
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}; |
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|
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|
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#define AVR_N_VPH_ENTRIES 1048576 |
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|
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#define AVR_MAX_VPH_TLB_ENTRIES 256 |
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struct avr_vpg_tlb_entry { |
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unsigned char valid; |
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unsigned char writeflag; |
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uint32_t vaddr_page; |
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uint32_t paddr_page; |
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unsigned char *host_page; |
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}; |
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|
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|
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#define SREG_NAMES "cznvshti" |
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|
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#define AVR_SREG_C 0x01 /* Carry flag */ |
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#define AVR_SREG_Z 0x02 /* Zero flag */ |
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#define AVR_SREG_N 0x04 /* Negative flag */ |
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#define AVR_SREG_V 0x08 /* Overflow flag */ |
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#define AVR_SREG_S 0x10 /* Signed test */ |
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#define AVR_SREG_H 0x20 /* Half carry flag */ |
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#define AVR_SREG_T 0x40 /* Transfer bit */ |
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#define AVR_SREG_I 0x80 /* Interrupt enable/disable */ |
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|
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|
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struct avr_cpu { |
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uint32_t pc_mask; |
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|
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/* |
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* General Purpose Registers: |
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*/ |
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uint8_t r[N_AVR_REGS]; |
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|
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/* Status register: */ |
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uint8_t sreg; |
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|
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/* |
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* In order to keep an accurate cycle count, this variable should be |
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* increased for those instructions that take longer than 1 cycle to |
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* execute. The total number of executed cycles is extra_cycles PLUS |
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* the number of executed instructions. |
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*/ |
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int64_t extra_cycles; |
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|
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|
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/* |
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* Instruction translation cache: |
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*/ |
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|
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/* cur_ic_page is a pointer to an array of AVR_IC_ENTRIES_PER_PAGE |
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instruction call entries. next_ic points to the next such |
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call to be executed. */ |
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struct avr_tc_physpage *cur_physpage; |
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struct avr_instr_call *cur_ic_page; |
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struct avr_instr_call *next_ic; |
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|
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void (*combination_check)(struct cpu *, |
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struct avr_instr_call *, int low_addr); |
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|
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/* |
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* Virtual -> physical -> host address translation: |
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* |
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* host_load and host_store point to arrays of AVR_N_VPH_ENTRIES |
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* pointers (to host pages); phys_addr points to an array of |
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* AVR_N_VPH_ENTRIES uint32_t. |
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*/ |
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|
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struct avr_vpg_tlb_entry vph_tlb_entry[AVR_MAX_VPH_TLB_ENTRIES]; |
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unsigned char *host_load[AVR_N_VPH_ENTRIES]; |
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unsigned char *host_store[AVR_N_VPH_ENTRIES]; |
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uint32_t phys_addr[AVR_N_VPH_ENTRIES]; |
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struct avr_tc_physpage *phys_page[AVR_N_VPH_ENTRIES]; |
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|
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uint32_t phystranslation[AVR_N_VPH_ENTRIES/32]; |
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uint8_t vaddr_to_tlbindex[AVR_N_VPH_ENTRIES]; |
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}; |
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|
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|
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/* cpu_avr.c: */ |
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void avr_update_translation_table(struct cpu *cpu, uint64_t vaddr_page, |
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unsigned char *host_page, int writeflag, uint64_t paddr_page); |
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void avr_invalidate_translation_caches(struct cpu *cpu, uint64_t, int); |
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void avr_invalidate_code_translation(struct cpu *cpu, uint64_t, int); |
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int avr_memory_rw(struct cpu *cpu, struct memory *mem, uint64_t vaddr, |
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unsigned char *data, size_t len, int writeflag, int cache_flags); |
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int avr_cpu_family_init(struct cpu_family *); |
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|
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|
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#endif /* CPU_AVR_H */ |