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/* |
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* Copyright (C) 2005 Anders Gavare. All rights reserved. |
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* |
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* Redistribution and use in source and binary forms, with or without |
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* modification, are permitted provided that the following conditions are met: |
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* |
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* 1. Redistributions of source code must retain the above copyright |
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* notice, this list of conditions and the following disclaimer. |
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* 2. Redistributions in binary form must reproduce the above copyright |
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* notice, this list of conditions and the following disclaimer in the |
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* documentation and/or other materials provided with the distribution. |
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* 3. The name of the author may not be used to endorse or promote products |
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* derived from this software without specific prior written permission. |
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* |
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND |
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE |
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS |
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) |
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY |
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF |
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* SUCH DAMAGE. |
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* |
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* |
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* $Id: cpu_run.c,v 1.9 2005/08/03 20:42:43 debug Exp $ |
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* |
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* Included from cpu_mips.c, cpu_ppc.c etc. (The reason for this is that |
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* the call to a specific cpu's routine that runs one instruction will |
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* be inlined from here.) |
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*/ |
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|
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#include "console.h" |
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#include "debugger.h" |
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|
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|
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static int instrs_per_cycle(struct cpu *cpu) { |
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#ifdef CPU_RUN_MIPS |
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return cpu->cd.mips.cpu_type.instrs_per_cycle; |
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#else /* PPC or undefined */ |
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return 1; |
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#endif |
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} |
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|
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|
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/* |
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* CPU_RUN(): |
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* |
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* Run instructions on all CPUs in this machine, for a "medium duration" |
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* (or until all CPUs have halted). |
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* |
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* Return value is 1 if anything happened, 0 if all CPUs are stopped. |
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*/ |
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int CPU_RUN(struct emul *emul, struct machine *machine) |
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{ |
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struct cpu **cpus = machine->cpus; |
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int ncpus = machine->ncpus; |
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int64_t max_instructions_cached = machine->max_instructions; |
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int64_t max_random_cycles_per_chunk_cached = |
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machine->max_random_cycles_per_chunk; |
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int64_t ncycles_chunk_end; |
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int running, rounds; |
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|
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/* The main loop: */ |
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running = 1; |
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rounds = 0; |
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while (running || single_step) { |
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ncycles_chunk_end = machine->ncycles + (1 << 17); |
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|
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machine->a_few_instrs = machine->a_few_cycles * |
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instrs_per_cycle(cpus[0]); |
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|
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/* Do a chunk of cycles: */ |
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do { |
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int i, j, te, cpu0instrs, a_few_instrs2; |
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|
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running = 0; |
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cpu0instrs = 0; |
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|
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/* |
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* Run instructions from each CPU: |
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*/ |
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|
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/* Is any cpu alive? */ |
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for (i=0; i<ncpus; i++) |
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if (cpus[i]->running) |
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running = 1; |
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|
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if (single_step) { |
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if (single_step == 1) { |
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/* |
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* TODO: (Important!) |
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* |
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* If these are enabled, and focus is |
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* shifted to another machine in the |
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* debugger, then the wrong machine |
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* gets its variables restored! |
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*/ |
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old_instruction_trace = |
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machine->instruction_trace; |
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old_quiet_mode = quiet_mode; |
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old_show_trace_tree = |
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machine->show_trace_tree; |
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machine->instruction_trace = 1; |
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machine->show_trace_tree = 1; |
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quiet_mode = 0; |
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single_step = 2; |
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} |
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|
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for (j=0; j<instrs_per_cycle(cpus[0]); j++) { |
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if (single_step) |
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debugger(); |
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for (i=0; i<ncpus; i++) |
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if (cpus[i]->running) { |
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int instrs_run = |
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CPU_RINSTR(emul, |
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cpus[i]); |
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if (i == 0) |
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cpu0instrs += |
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instrs_run; |
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} |
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} |
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} else if (max_random_cycles_per_chunk_cached > 0) { |
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for (i=0; i<ncpus; i++) |
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if (cpus[i]->running && !single_step) { |
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a_few_instrs2 = machine-> |
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a_few_cycles; |
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if (a_few_instrs2 >= |
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max_random_cycles_per_chunk_cached) |
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a_few_instrs2 = max_random_cycles_per_chunk_cached; |
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j = (random() % a_few_instrs2) + 1; |
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j *= instrs_per_cycle(cpus[i]); |
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while (j-- >= 1 && cpus[i]->running) { |
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int instrs_run = CPU_RINSTR(emul, cpus[i]); |
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if (i == 0) |
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cpu0instrs += instrs_run; |
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if (single_step) |
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break; |
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} |
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} |
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} else { |
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/* CPU 0 is special, cpu0instr must be updated. */ |
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for (j=0; j<machine->a_few_instrs; ) { |
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int instrs_run; |
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if (!cpus[0]->running || single_step) |
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break; |
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do { |
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instrs_run = |
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CPU_RINSTR(emul, cpus[0]); |
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if (instrs_run == 0 || |
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single_step) { |
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j = machine->a_few_instrs; |
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break; |
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} |
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} while (instrs_run == 0); |
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j += instrs_run; |
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cpu0instrs += instrs_run; |
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} |
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|
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/* CPU 1 and up: */ |
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for (i=1; i<ncpus; i++) { |
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a_few_instrs2 = machine->a_few_cycles * |
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instrs_per_cycle(cpus[i]); |
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for (j=0; j<a_few_instrs2; ) |
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if (cpus[i]->running) { |
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int instrs_run = 0; |
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while (!instrs_run) { |
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instrs_run = CPU_RINSTR(emul, cpus[i]); |
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if (instrs_run == 0 || |
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single_step) { |
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j = a_few_instrs2; |
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break; |
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} |
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} |
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j += instrs_run; |
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} else |
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break; |
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} |
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} |
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|
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/* |
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* Hardware 'ticks': (clocks, interrupt sources...) |
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* |
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* Here, cpu0instrs is the number of instructions |
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* executed on cpu0. (TODO: don't use cpu 0 for this, |
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* use some kind of "mainbus" instead.) Hardware |
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* ticks are not per instruction, but per cycle, |
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* so we divide by the number of |
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* instructions_per_cycle for cpu0. |
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* |
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* TODO: This doesn't work in a machine with, say, |
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* a mixture of R3000, R4000, and R10000 CPUs, if |
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* there ever was such a thing. |
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* |
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* TODO 2: A small bug occurs if cpu0instrs isn't |
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* evenly divisible by instrs_per_cycle. We then |
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* cause hardware ticks a fraction of a cycle too |
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* often. |
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*/ |
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i = instrs_per_cycle(cpus[0]); |
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switch (i) { |
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case 1: break; |
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case 2: cpu0instrs >>= 1; break; |
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case 4: cpu0instrs >>= 2; break; |
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default: |
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cpu0instrs /= i; |
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} |
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|
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for (te=0; te<machine->n_tick_entries; te++) { |
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machine->ticks_till_next[te] -= cpu0instrs; |
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|
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if (machine->ticks_till_next[te] <= 0) { |
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while (machine->ticks_till_next[te] <= 0) |
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machine->ticks_till_next[te] += |
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machine->ticks_reset_value[te]; |
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machine->tick_func[te](cpus[0], machine->tick_extra[te]); |
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} |
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} |
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|
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/* Any CPU dead? */ |
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for (i=0; i<ncpus; i++) { |
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if (cpus[i]->dead && |
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machine->exit_without_entering_debugger == 0) |
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single_step = 1; |
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} |
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|
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machine->ncycles += cpu0instrs; |
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} while (running && (machine->ncycles < ncycles_chunk_end)); |
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|
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/* If we've done buffered console output, |
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the flush stdout every now and then: */ |
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if (machine->ncycles > machine->ncycles_flush + (1<<17)) { |
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console_flush(); |
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machine->ncycles_flush = machine->ncycles; |
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} |
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|
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if (machine->ncycles > machine->ncycles_show + (1<<25)) { |
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machine->ncycles_since_gettimeofday += |
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(machine->ncycles - machine->ncycles_show); |
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cpu_show_cycles(machine, 0); |
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machine->ncycles_show = machine->ncycles; |
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} |
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|
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if (max_instructions_cached != 0 && |
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machine->ncycles >= max_instructions_cached) |
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running = 0; |
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|
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/* Let's allow other machines to run. */ |
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rounds ++; |
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if (rounds > 2) |
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break; |
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} |
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|
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return running; |
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} |
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