0.3.1/devices/pci_vt82c586.c

/*
 *  Copyright (C) 2004  Anders Gavare.  All rights reserved.
 *
 *  Redistribution and use in source and binary forms, with or without
 *  modification, are permitted provided that the following conditions are met:
 *
 *  1. Redistributions of source code must retain the above copyright
 *     notice, this list of conditions and the following disclaimer.
 *  2. Redistributions in binary form must reproduce the above copyright  
 *     notice, this list of conditions and the following disclaimer in the 
 *     documentation and/or other materials provided with the distribution.
 *  3. The name of the author may not be used to endorse or promote products
 *     derived from this software without specific prior written permission.
 *
 *  THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
 *  ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 *  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 *  ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE   
 *  FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 *  DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 *  OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 *  HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 *  LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 *  OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 *  SUCH DAMAGE.
 *   
 *
 *  $Id: pci_vt82c586.c,v 1.12 2005/02/26 18:00:38 debug Exp $
 *
 *  VIATECH VT82C586 devices:
 *
 *      vt82c586_isa    PCI->ISA bridge
 *      vt82c586_ide    IDE controller
 *
 *  TODO:  This more or less just a dummy device, so far.
 */

#include <stdio.h>
#include <stdlib.h>
#include <string.h>

#include "memory.h"
#include "misc.h"
#include "devices.h"
#include "bus_pci.h"


#define PCI_VENDOR_VIATECH                0x1106  /* VIA Technologies */
#define PCI_PRODUCT_VIATECH_VT82C586_IDE  0x1571  /* VT82C586 (Apollo VP)
                                                     IDE Controller */
#define PCI_PRODUCT_VIATECH_VT82C586_ISA  0x0586  /* VT82C586 (Apollo VP)
                                                     PCI-ISA Bridge */


/*
 *  pci_vt82c586_isa_rr():
 */
uint32_t pci_vt82c586_isa_rr(int reg)
{
        /*  NetBSD reads from 0x04, 0x08, 0x3c, 0x0c, 0x2c during init  */

        switch (reg) {
        case 0x00:
                return PCI_VENDOR_VIATECH +
                    (PCI_PRODUCT_VIATECH_VT82C586_ISA << 16);
        case 0x04:
                return 0xffffffff;      /*  ???  */
        case 0x08:
                /*  Revision 37 or 39  */
                return PCI_CLASS_CODE(PCI_CLASS_BRIDGE,
                    PCI_SUBCLASS_BRIDGE_ISA, 0) + 39;
        case 0x0c:
                /*  Bit 7 of Header-type byte ==> multi-function device  */
                return 0x00800000;
        default:
                return 0;
        }
}


/*
 *  pci_vt82c586_isa_init():
 */
void pci_vt82c586_isa_init(struct machine *machine, struct memory *mem)
{
}


/*
 *  pci_vt82c586_ide_rr():
 */
uint32_t pci_vt82c586_ide_rr(int reg)
{
        /*  NetBSD reads from 0x04, 0x08, 0x3c, 0x0c, 0x2c during init  */

        switch (reg) {
        case 0x00:
                return PCI_VENDOR_VIATECH +
                    (PCI_PRODUCT_VIATECH_VT82C586_IDE << 16);
        case 0x04:
                return 0xffffffff;      /*  ???  */
        case 0x08:
                /*  Possibly not correct:  */
                return PCI_CLASS_CODE(PCI_CLASS_MASS_STORAGE,
                    PCI_SUBCLASS_MASS_STORAGE_IDE, 0) + 0x01;
        case 0x40:      /*  APO_IDECONF  */
                /*  channel 0 and 1 enabled  */
                return 0x00000003;
        default:
                return 0;
        }
}


/*
 *  pci_vt82c586_ide_init():
 */
void pci_vt82c586_ide_init(struct machine *machine, struct memory *mem)
{
        /*
         *  TODO:  what about these base addresses and interrupt
         * numbers? They work for Cobalt...   7 = PCI interrupt?? (TODO)
         */
        dev_wdc_init(machine, mem, 0x100001f0, 6, 0);   /*  primary  */
        dev_wdc_init(machine, mem, 0x10000170, 6, 2);   /*  secondary  */
}

1	/*
2	* Copyright (C) 2004 Anders Gavare. All rights reserved.
3	*
4	* Redistribution and use in source and binary forms, with or without
5	* modification, are permitted provided that the following conditions are met:
6	*
7	* 1. Redistributions of source code must retain the above copyright
8	* notice, this list of conditions and the following disclaimer.
9	* 2. Redistributions in binary form must reproduce the above copyright
10	* notice, this list of conditions and the following disclaimer in the
11	* documentation and/or other materials provided with the distribution.
12	* 3. The name of the author may not be used to endorse or promote products
13	* derived from this software without specific prior written permission.
14	*
15	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16	* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18	* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21	* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22	* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23	* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24	* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25	* SUCH DAMAGE.
26	*
27	*
28	* $Id: pci_vt82c586.c,v 1.12 2005/02/26 18:00:38 debug Exp $
29	*
30	* VIATECH VT82C586 devices:
31	*
32	* vt82c586_isa PCI->ISA bridge
33	* vt82c586_ide IDE controller
34	*
35	* TODO: This more or less just a dummy device, so far.
36	*/
37
38	#include <stdio.h>
39	#include <stdlib.h>
40	#include <string.h>
41
42	#include "memory.h"
43	#include "misc.h"
44	#include "devices.h"
45	#include "bus_pci.h"
46
47
48	#define PCI_VENDOR_VIATECH 0x1106 /* VIA Technologies */
49	#define PCI_PRODUCT_VIATECH_VT82C586_IDE 0x1571 /* VT82C586 (Apollo VP)
50	IDE Controller */
51	#define PCI_PRODUCT_VIATECH_VT82C586_ISA 0x0586 /* VT82C586 (Apollo VP)
52	PCI-ISA Bridge */
53
54
55	/*
56	* pci_vt82c586_isa_rr():
57	*/
58	uint32_t pci_vt82c586_isa_rr(int reg)
59	{
60	/* NetBSD reads from 0x04, 0x08, 0x3c, 0x0c, 0x2c during init */
61
62	switch (reg) {
63	case 0x00:
64	return PCI_VENDOR_VIATECH +
65	(PCI_PRODUCT_VIATECH_VT82C586_ISA << 16);
66	case 0x04:
67	return 0xffffffff; /* ??? */
68	case 0x08:
69	/* Revision 37 or 39 */
70	return PCI_CLASS_CODE(PCI_CLASS_BRIDGE,
71	PCI_SUBCLASS_BRIDGE_ISA, 0) + 39;
72	case 0x0c:
73	/* Bit 7 of Header-type byte ==> multi-function device */
74	return 0x00800000;
75	default:
76	return 0;
77	}
78	}
79
80
81	/*
82	* pci_vt82c586_isa_init():
83	*/
84	void pci_vt82c586_isa_init(struct machine machine, struct memory mem)
85	{
86	}
87
88
89	/*
90	* pci_vt82c586_ide_rr():
91	*/
92	uint32_t pci_vt82c586_ide_rr(int reg)
93	{
94	/* NetBSD reads from 0x04, 0x08, 0x3c, 0x0c, 0x2c during init */
95
96	switch (reg) {
97	case 0x00:
98	return PCI_VENDOR_VIATECH +
99	(PCI_PRODUCT_VIATECH_VT82C586_IDE << 16);
100	case 0x04:
101	return 0xffffffff; /* ??? */
102	case 0x08:
103	/* Possibly not correct: */
104	return PCI_CLASS_CODE(PCI_CLASS_MASS_STORAGE,
105	PCI_SUBCLASS_MASS_STORAGE_IDE, 0) + 0x01;
106	case 0x40: /* APO_IDECONF */
107	/* channel 0 and 1 enabled */
108	return 0x00000003;
109	default:
110	return 0;
111	}
112	}
113
114
115	/*
116	* pci_vt82c586_ide_init():
117	*/
118	void pci_vt82c586_ide_init(struct machine machine, struct memory mem)
119	{
120	/*
121	* TODO: what about these base addresses and interrupt
122	* numbers? They work for Cobalt... 7 = PCI interrupt?? (TODO)
123	*/
124	dev_wdc_init(machine, mem, 0x100001f0, 6, 0); /* primary */
125	dev_wdc_init(machine, mem, 0x10000170, 6, 2); /* secondary */
126	}
127