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/* |
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* Copyright (C) 2004-2005 Anders Gavare. All rights reserved. |
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* |
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* Redistribution and use in source and binary forms, with or without |
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* modification, are permitted provided that the following conditions are met: |
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* |
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* 1. Redistributions of source code must retain the above copyright |
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* notice, this list of conditions and the following disclaimer. |
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* 2. Redistributions in binary form must reproduce the above copyright |
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* notice, this list of conditions and the following disclaimer in the |
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* documentation and/or other materials provided with the distribution. |
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* 3. The name of the author may not be used to endorse or promote products |
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* derived from this software without specific prior written permission. |
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* |
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND |
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE |
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS |
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) |
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY |
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF |
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* SUCH DAMAGE. |
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* |
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* |
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* $Id: dev_sgi_ip30.c,v 1.17 2005/02/25 06:14:30 debug Exp $ |
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* |
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* SGI IP30 stuff. |
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* |
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* This is just comprised of hardcoded guesses so far. (Ugly.) |
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*/ |
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|
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#include <stdio.h> |
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#include <stdlib.h> |
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#include <string.h> |
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|
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#include "cpu.h" |
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#include "devices.h" |
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#include "machine.h" |
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#include "memory.h" |
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#include "misc.h" |
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|
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|
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void dev_sgi_ip30_tick(struct cpu *cpu, void *extra) |
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{ |
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struct sgi_ip30_data *d = extra; |
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|
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d->reg_0x20000 += 1000; |
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|
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if (d->imask0 & ((int64_t)1<<50)) { |
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/* TODO: Only interrupt if reg 0x20000 (the counter) |
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has passed the compare (0x30000). */ |
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cpu_interrupt(cpu, 8+1 + 50); |
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} |
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} |
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|
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|
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/* |
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* dev_sgi_ip30_access(): |
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*/ |
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int dev_sgi_ip30_access(struct cpu *cpu, struct memory *mem, |
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uint64_t relative_addr, unsigned char *data, size_t len, |
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int writeflag, void *extra) |
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{ |
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struct sgi_ip30_data *d = (struct sgi_ip30_data *) extra; |
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uint64_t idata = 0, odata = 0; |
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|
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idata = memory_readmax64(cpu, data, len); |
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|
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switch (relative_addr) { |
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case 0x20: |
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/* Memory bank configuration: */ |
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odata = 0x80010000ULL; |
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break; |
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case 0x10000: /* Interrupt mask register 0: */ |
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if (writeflag == MEM_WRITE) { |
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d->imask0 = idata; |
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} else { |
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odata = d->imask0; |
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} |
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break; |
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case 0x10018: |
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/* |
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* If this is not implemented, the IP30 PROM complains during |
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* bootup: |
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* |
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* *FAILED* |
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* Address: 0xffffffffaff10018, Expected: |
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* 0x0000000000000001, Received: 0x0000000000000000 |
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*/ |
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if (writeflag == MEM_WRITE) { |
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d->reg_0x10018 = idata; |
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} else { |
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odata = d->reg_0x10018; |
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} |
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break; |
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case 0x10020: /* Set ISR, according to Linux/IP30 */ |
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d->isr = idata; |
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/* Recalculate CPU interrupt assertions: */ |
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cpu_interrupt(cpu, 8); |
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break; |
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case 0x10028: /* Clear ISR, according to Linux/IP30 */ |
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d->isr &= ~idata; |
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/* Recalculate CPU interrupt assertions: */ |
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cpu_interrupt(cpu, 8); |
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break; |
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case 0x10030: /* Interrupt Status Register */ |
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if (writeflag == MEM_WRITE) { |
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/* Clear-on-write (TODO: is this correct?) */ |
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d->isr &= ~idata; |
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/* Recalculate CPU interrupt assertions: */ |
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cpu_interrupt(cpu, 8); |
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} else { |
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odata = d->isr; |
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} |
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break; |
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case 0x20000: |
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/* A counter */ |
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if (writeflag == MEM_WRITE) { |
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d->reg_0x20000 = idata; |
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} else { |
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odata = d->reg_0x20000; |
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} |
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break; |
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case 0x30000: |
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if (writeflag == MEM_WRITE) { |
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d->reg_0x30000 = idata; |
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} else { |
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odata = d->reg_0x30000; |
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} |
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break; |
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default: |
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if (writeflag == MEM_WRITE) { |
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debug("[ sgi_ip30: unimplemented write to address " |
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"0x%x, data=0x%02x ]\n", (int)relative_addr, |
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(int)idata); |
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} else { |
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debug("[ sgi_ip30: unimplemented read from address" |
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" 0x%x ]\n", (int)relative_addr); |
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} |
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} |
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|
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if (writeflag == MEM_READ) |
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memory_writemax64(cpu, data, len, odata); |
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|
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return 1; |
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} |
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|
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|
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/* |
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* dev_sgi_ip30_2_access(): |
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*/ |
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int dev_sgi_ip30_2_access(struct cpu *cpu, struct memory *mem, |
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uint64_t relative_addr, unsigned char *data, size_t len, |
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int writeflag, void *extra) |
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{ |
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struct sgi_ip30_data *d = (struct sgi_ip30_data *) extra; |
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uint64_t idata = 0, odata = 0; |
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|
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idata = memory_readmax64(cpu, data, len); |
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|
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switch (relative_addr) { |
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|
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/* 0x114 + 0x40 * (wid - 8): 0x80000000 for "alive", |
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according to Linux/IP30 */ |
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|
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case 0x114 + 0x40 * (12 - 8): |
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fatal("[ IP30: asdvasdvnb ]\n"); |
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odata = 0x80000000; |
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break; |
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|
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case 0x0029c: |
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/* |
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* If this is not implemented, the IP30 PROM complains during |
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* bootup: |
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* |
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* *FAILED* |
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* Address: 0xffffffffb000029c, Expected: |
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* 0x0000000000000001, Received: 0x0000000000000000 |
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*/ |
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if (writeflag == MEM_WRITE) { |
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d->reg_0x0029c = idata; |
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} else { |
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odata = d->reg_0x0029c; |
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} |
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break; |
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default: |
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if (writeflag == MEM_WRITE) { |
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debug("[ sgi_ip30_2: unimplemented write to " |
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"address 0x%x, data=0x%02x ]\n", |
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(int)relative_addr, (int)idata); |
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} else { |
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debug("[ sgi_ip30_2: unimplemented read from address " |
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"0x%x ]\n", (int)relative_addr); |
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} |
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} |
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|
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if (writeflag == MEM_READ) |
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memory_writemax64(cpu, data, len, odata); |
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|
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return 1; |
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} |
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|
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|
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/* |
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* dev_sgi_ip30_3_access(): |
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*/ |
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int dev_sgi_ip30_3_access(struct cpu *cpu, struct memory *mem, |
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uint64_t relative_addr, unsigned char *data, size_t len, |
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int writeflag, void *extra) |
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{ |
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struct sgi_ip30_data *d = (struct sgi_ip30_data *) extra; |
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uint64_t idata = 0, odata = 0; |
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|
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idata = memory_readmax64(cpu, data, len); |
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|
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switch (relative_addr) { |
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case 0xb4: |
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if (writeflag == MEM_WRITE) { |
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debug("[ sgi_ip30_3: unimplemented write to " |
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"address 0x%x, data=0x%02x ]\n", |
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(int)relative_addr, (int)idata); |
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} else { |
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odata = 2; /* should be 2, or Irix loops */ |
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} |
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break; |
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case 0x00104: |
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if (writeflag == MEM_WRITE) { |
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debug("[ sgi_ip30_3: unimplemented write to address " |
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"0x%x, data=0x%02x ]\n", (int)relative_addr, |
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(int)idata); |
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} else { |
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odata = 64; /* should be 64, or the PROM |
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complains */ |
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} |
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break; |
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case 0x00284: |
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/* |
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* If this is not implemented, the IP30 PROM complains during |
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* bootup: |
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* |
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* *FAILED* |
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* Address: 0xffffffffbf000284, Expected: |
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* 0x0000000000000001, Received: 0x0000000000000000 |
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*/ |
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if (writeflag == MEM_WRITE) { |
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d->reg_0x00284 = idata; |
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} else { |
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odata = d->reg_0x00284; |
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} |
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break; |
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default: |
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if (writeflag == MEM_WRITE) { |
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debug("[ sgi_ip30_3: unimplemented write to address " |
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"0x%x, data=0x%02x ]\n", (int)relative_addr, |
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(int)idata); |
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} else { |
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debug("[ sgi_ip30_3: unimplemented read from " |
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"address 0x%x ]\n", (int)relative_addr); |
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} |
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} |
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|
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if (writeflag == MEM_READ) |
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memory_writemax64(cpu, data, len, odata); |
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|
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return 1; |
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} |
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|
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|
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/* |
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* dev_sgi_ip30_4_access(): |
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*/ |
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int dev_sgi_ip30_4_access(struct cpu *cpu, struct memory *mem, |
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uint64_t relative_addr, unsigned char *data, size_t len, |
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int writeflag, void *extra) |
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{ |
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struct sgi_ip30_data *d = (struct sgi_ip30_data *) extra; |
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uint64_t idata = 0, odata = 0; |
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|
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idata = memory_readmax64(cpu, data, len); |
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|
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switch (relative_addr) { |
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case 0x000b0: |
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/* |
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* If this is not implemented, the IP30 PROM complains during |
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* bootup: |
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* |
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* *FAILED* |
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* Address: 0xffffffffbf6000b0, Expected: |
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* 0x0000000000000001, Received: 0x0000000000000000 |
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*/ |
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if (writeflag == MEM_WRITE) { |
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d->reg_0x000b0 = idata; |
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} else { |
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odata = d->reg_0x000b0; |
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} |
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break; |
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default: |
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if (writeflag == MEM_WRITE) { |
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debug("[ sgi_ip30_4: unimplemented write to address" |
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" 0x%x, data=0x%02x ]\n", |
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(int)relative_addr, (int)idata); |
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} else { |
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debug("[ sgi_ip30_4: unimplemented read from address" |
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" 0x%x ]\n", (int)relative_addr); |
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} |
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} |
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|
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if (writeflag == MEM_READ) |
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memory_writemax64(cpu, data, len, odata); |
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|
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return 1; |
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} |
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|
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|
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/* |
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* dev_sgi_ip30_5_access(): |
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*/ |
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int dev_sgi_ip30_5_access(struct cpu *cpu, struct memory *mem, |
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uint64_t relative_addr, unsigned char *data, size_t len, |
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int writeflag, void *extra) |
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{ |
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struct sgi_ip30_data *d = (struct sgi_ip30_data *) extra; |
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uint64_t idata = 0, odata = 0; |
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|
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idata = memory_readmax64(cpu, data, len); |
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|
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switch (relative_addr) { |
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case 0x00000: |
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if (writeflag == MEM_WRITE) { |
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d->reg_0x00000 = idata; |
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} else { |
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odata = d->reg_0x00000; |
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} |
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break; |
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default: |
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if (writeflag == MEM_WRITE) { |
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debug("[ sgi_ip30_5: unimplemented write to address " |
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"0x%x, data=0x%02x ]\n", (int)relative_addr, |
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(int)idata); |
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} else { |
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debug("[ sgi_ip30_5: unimplemented read from address " |
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"0x%x ]\n", (int)relative_addr); |
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} |
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} |
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|
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if (writeflag == MEM_READ) |
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memory_writemax64(cpu, data, len, odata); |
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|
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return 1; |
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} |
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|
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|
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/* |
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* dev_sgi_ip30_init(): |
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*/ |
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struct sgi_ip30_data *dev_sgi_ip30_init(struct machine *machine, |
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struct memory *mem, uint64_t baseaddr) |
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{ |
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struct sgi_ip30_data *d = malloc(sizeof(struct sgi_ip30_data)); |
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if (d == NULL) { |
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fprintf(stderr, "out of memory\n"); |
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exit(1); |
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} |
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memset(d, 0, sizeof(struct sgi_ip30_data)); |
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|
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memory_device_register(mem, "sgi_ip30_1", baseaddr, |
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DEV_SGI_IP30_LENGTH, dev_sgi_ip30_access, (void *)d, |
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MEM_DEFAULT, NULL); |
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memory_device_register(mem, "sgi_ip30_2", 0x10000000, |
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0x10000, dev_sgi_ip30_2_access, (void *)d, MEM_DEFAULT, NULL); |
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memory_device_register(mem, "sgi_ip30_3", 0x1f000000, |
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0x10000, dev_sgi_ip30_3_access, (void *)d, MEM_DEFAULT, NULL); |
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memory_device_register(mem, "sgi_ip30_4", 0x1f600000, |
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0x10000, dev_sgi_ip30_4_access, (void *)d, MEM_DEFAULT, NULL); |
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memory_device_register(mem, "sgi_ip30_5", 0x1f6c0000, |
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0x10000, dev_sgi_ip30_5_access, (void *)d, MEM_DEFAULT, NULL); |
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|
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machine_add_tickfunction(machine, dev_sgi_ip30_tick, d, 16); |
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|
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return d; |
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} |
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