0.3.1/devices/dev_gt.c

/*
 *  Copyright (C) 2003-2005  Anders Gavare.  All rights reserved.
 *
 *  Redistribution and use in source and binary forms, with or without
 *  modification, are permitted provided that the following conditions are met:
 *
 *  1. Redistributions of source code must retain the above copyright
 *     notice, this list of conditions and the following disclaimer.
 *  2. Redistributions in binary form must reproduce the above copyright  
 *     notice, this list of conditions and the following disclaimer in the 
 *     documentation and/or other materials provided with the distribution.
 *  3. The name of the author may not be used to endorse or promote products
 *     derived from this software without specific prior written permission.
 *
 *  THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
 *  ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 *  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 *  ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE   
 *  FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 *  DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 *  OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 *  HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 *  LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 *  OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 *  SUCH DAMAGE.
 *   
 *
 *  $Id: dev_gt.c,v 1.21 2005/03/18 23:20:52 debug Exp $
 *  
 *  The "gt" device used in Cobalt machines.
 *
 *  TODO:  This more or less just a dummy device, so far.
 */

#include <stdio.h>
#include <stdlib.h>
#include <string.h>

#include "bus_pci.h"
#include "cpu.h"
#include "devices.h"
#include "machine.h"
#include "memory.h"
#include "misc.h"


#define TICK_STEPS_SHIFT        16

#define PCI_VENDOR_GALILEO           0x11ab    /* Galileo Technology */
#define PCI_PRODUCT_GALILEO_GT64011  0x4146    /* GT-64011 System Controller */

struct gt_data {
        int     reg[8];
        int     irqnr;
        int     pciirq;

        struct pci_data *pci_data;
};


/*
 *  dev_gt_tick():
 */
void dev_gt_tick(struct cpu *cpu, void *extra)
{
        struct gt_data *gt_data = extra;

        cpu_interrupt(cpu, gt_data->irqnr);
}


/*
 *  dev_gt_access():
 */
int dev_gt_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr,
        unsigned char *data, size_t len, int writeflag, void *extra)
{
        uint64_t idata = 0, odata = 0;
        int i;
        struct gt_data *d = extra;

        idata = memory_readmax64(cpu, data, len);

        switch (relative_addr) {
        case 0xc18:
                if (writeflag == MEM_WRITE) {
                        debug("[ gt write to  0xc18: data = 0x%08lx ]\n",
                            (long)idata);
                        return 1;
                } else {
                        odata = 0xffffffffULL;
                        /*  ???  interrupt something...  */

odata = 0x00000100;     /*  netbsd/cobalt cobalt/machdep.c:cpu_intr()  */

cpu_interrupt_ack(cpu, d->irqnr);

                        debug("[ gt read from 0xc18 (data = 0x%08lx) ]\n",
                            (long)odata);
                }
                break;
        case 0xcf8:     /*  PCI ADDR  */
        case 0xcfc:     /*  PCI DATA  */
                if (writeflag == MEM_WRITE) {
                        bus_pci_access(cpu, mem, relative_addr, &idata,
                            writeflag, d->pci_data);
                } else {
                        bus_pci_access(cpu, mem, relative_addr, &odata,
                            writeflag, d->pci_data);
                }
                break;
        default:
                if (writeflag==MEM_READ) {
                        debug("[ gt read from addr 0x%x ]\n",
                            (int)relative_addr);
                        odata = d->reg[relative_addr];
                } else {
                        debug("[ gt write to addr 0x%x:", (int)relative_addr);
                        for (i=0; i<len; i++)
                                debug(" %02x", data[i]);
                        debug(" ]\n");
                        d->reg[relative_addr] = idata;
                }
        }

        if (writeflag == MEM_READ)
                memory_writemax64(cpu, data, len, odata);

        return 1;
}


/*
 *  pci_gt_rr():
 */
uint32_t pci_gt_rr(int reg)
{
        switch (reg) {
        case 0x00:
                return PCI_VENDOR_GALILEO + (PCI_PRODUCT_GALILEO_GT64011 << 16);
        case 0x08:
                return 0x01;    /*  Revision 1  */
        default:
                return 0;
        }
}


/*
 *  pci_gt_init():
 */
void pci_gt_init(struct machine *machine, struct memory *mem)
{
}


/*
 *  dev_gt_init():
 *
 *  Initialize a GT device.  Return a pointer to the pci_data used, so that
 *  the caller may add PCI devices.  First, however, we add the GT device
 *  itself.
 */
struct pci_data *dev_gt_init(struct machine *machine, struct memory *mem,
        uint64_t baseaddr, int irq_nr, int pciirq)
{
        struct gt_data *d;

        d = malloc(sizeof(struct gt_data));
        if (d == NULL) {
                fprintf(stderr, "out of memory\n");
                exit(1);
        }
        memset(d, 0, sizeof(struct gt_data));
        d->irqnr    = irq_nr;
        d->pciirq   = pciirq;
        d->pci_data = bus_pci_init(pciirq);

        /*
         *  According to NetBSD/cobalt:
         *  pchb0 at pci0 dev 0 function 0: Galileo GT-64011
         *  System Controller, rev 1
         */
        bus_pci_add(machine, d->pci_data, mem, 0, 0, 0, pci_gt_init, pci_gt_rr);

        memory_device_register(mem, "gt", baseaddr, DEV_GT_LENGTH,
            dev_gt_access, d, MEM_DEFAULT, NULL);
        machine_add_tickfunction(machine, dev_gt_tick, d, TICK_STEPS_SHIFT);

        return d->pci_data;
}

1	dpavlin	2	/*
2			* Copyright (C) 2003-2005 Anders Gavare. All rights reserved.
3			*
4			* Redistribution and use in source and binary forms, with or without
5			* modification, are permitted provided that the following conditions are met:
6			*
7			* 1. Redistributions of source code must retain the above copyright
8			* notice, this list of conditions and the following disclaimer.
9			* 2. Redistributions in binary form must reproduce the above copyright
10			* notice, this list of conditions and the following disclaimer in the
11			* documentation and/or other materials provided with the distribution.
12			* 3. The name of the author may not be used to endorse or promote products
13			* derived from this software without specific prior written permission.
14			*
15			* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16			* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17			* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18			* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19			* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20			* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21			* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22			* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23			* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24			* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25			* SUCH DAMAGE.
26			*
27			*
28			* $Id: dev_gt.c,v 1.21 2005/03/18 23:20:52 debug Exp $
29			*
30			* The "gt" device used in Cobalt machines.
31			*
32			* TODO: This more or less just a dummy device, so far.
33			*/
34
35			#include <stdio.h>
36			#include <stdlib.h>
37			#include <string.h>
38
39			#include "bus_pci.h"
40			#include "cpu.h"
41			#include "devices.h"
42			#include "machine.h"
43			#include "memory.h"
44			#include "misc.h"
45
46
47			#define TICK_STEPS_SHIFT 16
48
49			#define PCI_VENDOR_GALILEO 0x11ab /* Galileo Technology */
50			#define PCI_PRODUCT_GALILEO_GT64011 0x4146 /* GT-64011 System Controller */
51
52			struct gt_data {
53			int reg[8];
54			int irqnr;
55			int pciirq;
56
57			struct pci_data *pci_data;
58			};
59
60
61			/*
62			* dev_gt_tick():
63			*/
64			void dev_gt_tick(struct cpu cpu, void extra)
65			{
66			struct gt_data *gt_data = extra;
67
68			cpu_interrupt(cpu, gt_data->irqnr);
69			}
70
71
72			/*
73			* dev_gt_access():
74			*/
75			int dev_gt_access(struct cpu cpu, struct memory mem, uint64_t relative_addr,
76			unsigned char data, size_t len, int writeflag, void extra)
77			{
78			uint64_t idata = 0, odata = 0;
79			int i;
80			struct gt_data *d = extra;
81
82			idata = memory_readmax64(cpu, data, len);
83
84			switch (relative_addr) {
85			case 0xc18:
86			if (writeflag == MEM_WRITE) {
87			debug("[ gt write to 0xc18: data = 0x%08lx ]\n",
88			(long)idata);
89			return 1;
90			} else {
91			odata = 0xffffffffULL;
92			/* ??? interrupt something... */
93
94			odata = 0x00000100; /* netbsd/cobalt cobalt/machdep.c:cpu_intr() */
95
96			cpu_interrupt_ack(cpu, d->irqnr);
97
98			debug("[ gt read from 0xc18 (data = 0x%08lx) ]\n",
99			(long)odata);
100			}
101			break;
102			case 0xcf8: /* PCI ADDR */
103			case 0xcfc: /* PCI DATA */
104			if (writeflag == MEM_WRITE) {
105			bus_pci_access(cpu, mem, relative_addr, &idata,
106			writeflag, d->pci_data);
107			} else {
108			bus_pci_access(cpu, mem, relative_addr, &odata,
109			writeflag, d->pci_data);
110			}
111			break;
112			default:
113			if (writeflag==MEM_READ) {
114			debug("[ gt read from addr 0x%x ]\n",
115			(int)relative_addr);
116			odata = d->reg[relative_addr];
117			} else {
118			debug("[ gt write to addr 0x%x:", (int)relative_addr);
119			for (i=0; i<len; i++)
120			debug(" %02x", data[i]);
121			debug(" ]\n");
122			d->reg[relative_addr] = idata;
123			}
124			}
125
126			if (writeflag == MEM_READ)
127			memory_writemax64(cpu, data, len, odata);
128
129			return 1;
130			}
131
132
133			/*
134			* pci_gt_rr():
135			*/
136			uint32_t pci_gt_rr(int reg)
137			{
138			switch (reg) {
139			case 0x00:
140			return PCI_VENDOR_GALILEO + (PCI_PRODUCT_GALILEO_GT64011 << 16);
141			case 0x08:
142			return 0x01; /* Revision 1 */
143			default:
144			return 0;
145			}
146			}
147
148
149			/*
150			* pci_gt_init():
151			*/
152			void pci_gt_init(struct machine machine, struct memory mem)
153			{
154			}
155
156
157			/*
158			* dev_gt_init():
159			*
160			* Initialize a GT device. Return a pointer to the pci_data used, so that
161			* the caller may add PCI devices. First, however, we add the GT device
162			* itself.
163			*/
164			struct pci_data dev_gt_init(struct machine machine, struct memory *mem,
165			uint64_t baseaddr, int irq_nr, int pciirq)
166			{
167			struct gt_data *d;
168
169			d = malloc(sizeof(struct gt_data));
170			if (d == NULL) {
171			fprintf(stderr, "out of memory\n");
172			exit(1);
173			}
174			memset(d, 0, sizeof(struct gt_data));
175			d->irqnr = irq_nr;
176			d->pciirq = pciirq;
177			d->pci_data = bus_pci_init(pciirq);
178
179			/*
180			* According to NetBSD/cobalt:
181			* pchb0 at pci0 dev 0 function 0: Galileo GT-64011
182			* System Controller, rev 1
183			*/
184			bus_pci_add(machine, d->pci_data, mem, 0, 0, 0, pci_gt_init, pci_gt_rr);
185
186			memory_device_register(mem, "gt", baseaddr, DEV_GT_LENGTH,
187			dev_gt_access, d, MEM_DEFAULT, NULL);
188			machine_add_tickfunction(machine, dev_gt_tick, d, TICK_STEPS_SHIFT);
189
190			return d->pci_data;
191			}
192