/[gxemul]/trunk/src/promemul/ps2_bios.c
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Annotation of /trunk/src/promemul/ps2_bios.c

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Revision 30 - (hide annotations)
Mon Oct 8 16:20:40 2007 UTC (16 years, 7 months ago) by dpavlin
File MIME type: text/plain
File size: 7470 byte(s) 
++ trunk/HISTORY	(local)
$Id: HISTORY,v 1.1325 2006/08/15 15:38:37 debug Exp $
20060723	More Transputer instructions (pfix, nfix, opr, mint, ldl, ldlp,
		eqc, rev, ajw, stl, stlf, sthf, sub, ldnl, ldnlp, ldpi, move,
		wcnt, add, bcnt).
		Adding more SPARC instructions (andcc, addcc, bl, rdpr).
		Progress on the igsfb framebuffer used by NetBSD/netwinder.
		Enabling 8-bit fills in dev_fb.
		NetBSD/netwinder 3.0.1 can now run from a disk image :-)
20060724	Cleanup/performance fix for 64-bit virtual translation table
		updates (by removing the "timestamp" stuff). A full NetBSD/pmax
		3.0.1 install for R4400 has dropped from 667 seconds to 584 :)
		Fixing the igsfb "almost vga" color (it is 24-bit, not 18-bit).
		Adding some MIPS instruction combinations (3*lw, and 3*addu).
		The 8048 keyboard now turns off interrupt enable between the
		KBR_ACK and the KBR_RSTDONE, to work better with Linux 2.6.
		Not causing PPC DEC interrupts if PPC_NO_DEC is set for a
		specific CPU; NetBSD/bebox gets slightly further than before.
		Adding some more SPARC instructions: branches, udiv.
20060725	Refreshing dev_pckbc.c a little.
		Cleanups for the SH emulation mode, and adding the first
		"compact" (16-bit) instructions: various simple movs, nop,
		shll, stc, or, ldc.
20060726	Adding dummy "pcn" (AMD PCnet NIC) PCI glue.
20060727	Various cleanups; removing stuff from cpu.h, such as
		running_translated (not really meaningful anymore), and
		page flags (breaking into the debugger clears all translations
		anyway).
		Minor MIPS instruction combination updates.
20060807	Expanding the 3*sw and 3*lw MIPS instruction combinations to
		work with 2* and 4* too, resulting in a minor performance gain.
		Implementing a usleep hack for the RM52xx/MIPS32/MIPS64 "wait"
		instruction (when emulating 1 cpu).
20060808	Experimenting with some more MIPS instruction combinations.
		Implementing support for showing a (hardcoded 12x22) text
		cursor in igsfb.
20060809	Simplifying the NetBSD/evbmips (Malta) install instructions
		somewhat (by using a NetBSD/pmax ramdisk install kernel).
20060812	Experimenting more with the MIPS 'wait' instruction.
		PCI configuration register writes can now be handled, which
		allow PCI IDE controllers to work with NetBSD/Malta 3.0.1 and
		NetBSD/cobalt 3.0.1. (Previously only NetBSD 2.1 worked.)
20060813	Updating dev_gt.c based on numbers from Alec Voropay, to enable
		Linux 2.6 to use PCI on Malta.
		Continuing on Algor interrupt stuff.
20060814	Adding support for routing ISA interrupts to two different
		interrupts, making it possible to run NetBSD/algor :-)
20060814-15	Testing for the release.

==============  RELEASE 0.4.2  ==============
1 dpavlin 14 /*
2 dpavlin 22 * Copyright (C) 2003-2006 Anders Gavare. All rights reserved.
3 dpavlin 14 *
4     * Redistribution and use in source and binary forms, with or without
5     * modification, are permitted provided that the following conditions are met:
6     *
7     * 1. Redistributions of source code must retain the above copyright
8     * notice, this list of conditions and the following disclaimer.
9     * 2. Redistributions in binary form must reproduce the above copyright
10     * notice, this list of conditions and the following disclaimer in the
11     * documentation and/or other materials provided with the distribution.
12     * 3. The name of the author may not be used to endorse or promote products
13     * derived from this software without specific prior written permission.
14     *
15     * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16     * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17     * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18     * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19     * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20     * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21     * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22     * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23     * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24     * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25     * SUCH DAMAGE.
26     *
27     *
28 dpavlin 30 * $Id: ps2_bios.c,v 1.4 2006/07/26 23:21:48 debug Exp $
29 dpavlin 14 *
30     * Playstation 2 SIFBIOS emulation.
31     */
32    
33     #include <stdio.h>
34     #include <stdlib.h>
35     #include <string.h>
36     #include <sys/types.h>
37     #include <sys/time.h>
38     #include <sys/resource.h>
39    
40     #include "console.h"
41     #include "cpu.h"
42     #include "cpu_mips.h"
43     #include "machine.h"
44     #include "misc.h"
45    
46    
47     extern int quiet_mode;
48    
49    
50     /*
51     * playstation2_sifbios_emul():
52     */
53     int playstation2_sifbios_emul(struct cpu *cpu)
54     {
55     int callnr;
56    
57     callnr = cpu->cd.mips.gpr[MIPS_GPR_A0];
58    
59     switch (callnr) {
60     case 0: /* getver() */
61     cpu->cd.mips.gpr[MIPS_GPR_V0] = 0x200; /* TODO */
62     break;
63     case 1: /* halt(int mode) */
64 dpavlin 24 debug("[ SIFBIOS halt(0x%"PRIx64") ]\n",
65     (uint64_t) cpu->cd.mips.gpr[MIPS_GPR_A1]);
66 dpavlin 14 cpu->running = 0;
67     break;
68     case 2: /* setdve(int mode) */
69 dpavlin 24 debug("[ SIFBIOS setdve(0x%"PRIx64") ]\n",
70     (uint64_t) cpu->cd.mips.gpr[MIPS_GPR_A1]);
71 dpavlin 14 break;
72     case 3: /* putchar(int ch) */
73     /* debug("[ SIFBIOS putchar(0x%x) ]\n",
74     (char)cpu->cd.mips.gpr[MIPS_GPR_A1]); */
75     console_putchar(cpu->machine->main_console_handle,
76     cpu->cd.mips.gpr[MIPS_GPR_A1]);
77     break;
78     case 4: /* getchar() */
79     /* This is untested. TODO */
80     /* debug("[ SIFBIOS getchar() ]\n"; */
81     cpu->cd.mips.gpr[MIPS_GPR_V0] = 0;
82     if (console_charavail(cpu->machine->main_console_handle))
83     cpu->cd.mips.gpr[MIPS_GPR_V0] = console_readchar(
84     cpu->machine->main_console_handle);
85     break;
86     case 16: /* dma_init() */
87     debug("[ SIFBIOS dma_init() ]\n");
88     cpu->cd.mips.gpr[MIPS_GPR_V0] = 0; /* TODO */
89     break;
90     case 17: /* dma_exit() */
91     debug("[ SIFBIOS dma_exit() ]\n");
92     break;
93     case 32: /* cmd_init() */
94     debug("[ SIFBIOS cmd_init() ]\n");
95     cpu->cd.mips.gpr[MIPS_GPR_V0] = 0; /* TODO */
96     break;
97     case 33: /* cmd_exit() */
98     debug("[ SIFBIOS cmd_exit() ]\n");
99     break;
100     case 48:
101     debug("[ SIFBIOS rpc_init(): TODO ]\n");
102     cpu->cd.mips.gpr[MIPS_GPR_V0] = 0; /* TODO */
103     break;
104     case 49:
105     debug("[ SIFBIOS rpc_exit(): TODO ]\n");
106     cpu->cd.mips.gpr[MIPS_GPR_V0] = 0; /* TODO */
107     break;
108     case 51:
109     debug("[ SIFBIOS rpc_bind(): TODO ]\n");
110     cpu->cd.mips.gpr[MIPS_GPR_V0] = 1; /* TODO */
111     break;
112     case 64:
113 dpavlin 24 fatal("[ SIFBIOS SBR_IOPH_INIT(0x%"PRIx32",0x%"PRIx32",0x%"
114     PRIx32"): TODO ]\n",
115     (uint32_t) cpu->cd.mips.gpr[MIPS_GPR_A1],
116     (uint32_t) cpu->cd.mips.gpr[MIPS_GPR_A2],
117     (uint32_t) cpu->cd.mips.gpr[MIPS_GPR_A3]);
118 dpavlin 14
119     /*
120     * This is really really ugly: TODO
121     *
122     * Linux and NetBSD seem to work, but it's an ugly hack.
123     * This should really be a callback thingy...
124     *
125     * NetBSD has a done-word which should be set to 1.
126     * Linux has one done-word which should be set to 1, and
127     * one which should be set to 0.
128     *
129     * The code as it is right now probably overwrites stuff in
130     * memory that shouldn't be touched. Not good.
131     *
132     * Linux: err = sbios_rpc(SBR_IOPH_INIT, NULL, &result);
133     * err should be 0 (just as NetBSD),
134     * and result should be set to 0 as well.
135     */
136     {
137     uint32_t tmpaddr;
138    
139     tmpaddr = load_32bit_word(cpu,
140     cpu->cd.mips.gpr[MIPS_GPR_A1] + 0);
141     fatal(" +0: %08x\n", tmpaddr);
142     tmpaddr = load_32bit_word(cpu,
143     cpu->cd.mips.gpr[MIPS_GPR_A1] + 4);
144     fatal(" +4: %08x\n", tmpaddr);
145     tmpaddr = load_32bit_word(cpu,
146     cpu->cd.mips.gpr[MIPS_GPR_A1] + 8);
147     fatal(" +8: %08x\n", tmpaddr);
148     tmpaddr = load_32bit_word(cpu,
149     cpu->cd.mips.gpr[MIPS_GPR_A1] + 12);
150     fatal(" +12: %08x\n", tmpaddr);
151    
152     /* TODO: This is probably netbsd specific */
153     tmpaddr = load_32bit_word(cpu,
154     cpu->cd.mips.gpr[MIPS_GPR_A1] + 12);
155     fatal("tmpaddr 1 = 0x%08x\n", tmpaddr);
156    
157     /* "done" word for NetBSD: */
158     store_32bit_word(cpu, tmpaddr, 1);
159     /* "done" word A for Linux: */
160     store_32bit_word(cpu, tmpaddr + 4, 1);
161     /* "done" word B for Linux: */
162     store_32bit_word(cpu,
163     cpu->cd.mips.gpr[MIPS_GPR_A1] + 0, 0);
164     }
165     cpu->cd.mips.gpr[MIPS_GPR_V0] = 0;
166     break;
167     case 65:
168 dpavlin 24 fatal("[ SIFBIOS alloc iop heap(0x"PRIx32") ]\n",
169     (uint32_t)cpu->cd.mips.gpr[MIPS_GPR_A1]);
170 dpavlin 14
171     /*
172     * Linux uses this to allocate "heap" for the OHCI USB
173     * controller.
174     *
175     * TODO: This naïve implementation does not allow for a
176     * "free iop heap" function: :-/
177     */
178    
179     {
180     uint32_t tmpaddr;
181     static uint32_t return_addr = 0x1000;
182     /* 0xbc000000; */
183     uint32_t size;
184    
185     tmpaddr = load_32bit_word(cpu,
186     cpu->cd.mips.gpr[MIPS_GPR_A1] + 0);
187     fatal(" +0: %08x (result should be placed here)\n",
188     tmpaddr);
189     tmpaddr = load_32bit_word(cpu,
190     cpu->cd.mips.gpr[MIPS_GPR_A1] + 4);
191     fatal(" +4: %08x (*arg)\n", tmpaddr);
192     size = load_32bit_word(cpu, tmpaddr + 0);
193     fatal(" size = %08x\n", size);
194     tmpaddr = load_32bit_word(cpu,
195     cpu->cd.mips.gpr[MIPS_GPR_A1] + 8);
196     fatal(" +8: %08x (*func (void *, int))\n", tmpaddr);
197     tmpaddr = load_32bit_word(cpu,
198     cpu->cd.mips.gpr[MIPS_GPR_A1] + 12);
199     fatal(" +12: %08x (*para)\n", tmpaddr);
200    
201     /* TODO: This is probably netbsd specific */
202     tmpaddr = load_32bit_word(cpu,
203     cpu->cd.mips.gpr[MIPS_GPR_A1] + 12);
204     fatal("tmpaddr 1 = 0x%08x\n", tmpaddr);
205    
206     /* "done" word for NetBSD: */
207     store_32bit_word(cpu, tmpaddr, 1);
208     /* "done" word A for Linux: */
209     store_32bit_word(cpu, tmpaddr + 4, 1);
210    
211     /* Result: */
212     store_32bit_word(cpu,
213     cpu->cd.mips.gpr[MIPS_GPR_A1] + 0, return_addr);
214    
215     return_addr += size;
216     /* Round up to next page: */
217     return_addr += 4095;
218     return_addr &= ~4095;
219     }
220     cpu->cd.mips.gpr[MIPS_GPR_V0] = 0;
221     break;
222     case 66:
223     debug("[ SIFBIOS iopmem_free(): TODO ]\n");
224     cpu->cd.mips.gpr[MIPS_GPR_V0] = 0; /* TODO */
225     break;
226     default:
227     quiet_mode = 0;
228     cpu_register_dump(cpu->machine, cpu, 1, 0x1);
229     printf("\n");
230     fatal("Playstation 2 SIFBIOS emulation: "
231     "unimplemented call nr 0x%x\n", callnr);
232     cpu->running = 0;
233     }
234    
235     return 1;
236     }
237    
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