--- trunk/src/memory_rw.c	2007/10/08 16:20:03	25
+++ trunk/src/memory_rw.c	2007/10/08 16:20:10	26
@@ -25,7 +25,7 @@
  *  SUCH DAMAGE.
  *
  *
- *  $Id: memory_rw.c,v 1.87 2006/06/22 11:43:03 debug Exp $
+ *  $Id: memory_rw.c,v 1.90 2006/06/25 00:15:44 debug Exp $
  *
  *  Generic memory_rw(), with special hacks for specific CPU families.
  *
@@ -151,10 +151,10 @@
 	paddr = vaddr & 0x7fffffff;
 #endif
 #else	/*  !MEM_USERLAND  */
-	if (misc_flags & PHYSICAL || cpu->translate_address == NULL) {
+	if (misc_flags & PHYSICAL || cpu->translate_v2p == NULL) {
 		paddr = vaddr;
 	} else {
-		ok = cpu->translate_address(cpu, vaddr, &paddr,
+		ok = cpu->translate_v2p(cpu, vaddr, &paddr,
 		    (writeflag? FLAG_WRITEFLAG : 0) +
 		    (no_exceptions? FLAG_NOEXCEPTIONS : 0)
 #ifdef MEM_X86
@@ -479,6 +479,11 @@
 	offset = paddr & ((1 << BITS_PER_MEMBLOCK) - 1);
 
 	if (cpu->update_translation_table != NULL && !dyntrans_device_danger
+#ifdef MEM_MIPS
+	    /*  Ugly hack for R2000/R3000 caches:  */
+	    && (cpu->cd.mips.cpu_type.mmu_model != MMU3K ||
+            !(cpu->cd.mips.coproc[0]->reg[COP0_STATUS] & MIPS1_ISOL_CACHES))
+#endif
 #ifndef MEM_MIPS
 /*	    && !(misc_flags & MEMORY_USER_ACCESS)  */
 #ifndef MEM_USERLAND
@@ -489,9 +494,6 @@
 		cpu->update_translation_table(cpu, vaddr & ~offset_mask,
 		    memblock + (offset & ~offset_mask),
 		    (misc_flags & MEMORY_USER_ACCESS) |
-#ifndef MEM_MIPS
-		    (cache == CACHE_INSTRUCTION? TLB_CODE : 0) |
-#endif
 #if !defined(MEM_MIPS) && !defined(MEM_USERLAND)
 		    (cache == CACHE_INSTRUCTION?
 			(writeflag == MEM_WRITE? 1 : 0) : ok - 1),