/[gxemul]/trunk/src/memory_rw.c
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revision 13 by dpavlin, Mon Oct 8 16:18:38 2007 UTC revision 14 by dpavlin, Mon Oct 8 16:18:51 2007 UTC
# Line 25  Line 25 
25   *  SUCH DAMAGE.   *  SUCH DAMAGE.
26   *   *
27   *   *
28   *  $Id: memory_rw.c,v 1.57 2005/08/12 21:57:02 debug Exp $   *  $Id: memory_rw.c,v 1.64 2005/09/22 09:06:59 debug Exp $
29   *   *
30   *  Generic memory_rw(), with special hacks for specific CPU families.   *  Generic memory_rw(), with special hacks for specific CPU families.
31   *   *
# Line 188  int MEMORY_RW(struct cpu *cpu, struct me Line 188  int MEMORY_RW(struct cpu *cpu, struct me
188                  paddr = vaddr;                  paddr = vaddr;
189    
190  #ifdef MEM_ALPHA  #ifdef MEM_ALPHA
191          /*  paddr &= 0x1fffffff;  For testalpha  */                  /*  paddr &= 0x1fffffff;  For testalpha  */
192          paddr &= 0x000003ffffffffffULL;                  paddr &= 0x000003ffffffffffULL;
 #endif  
   
 #ifdef MEM_ARM  
         paddr &= 0x3fffffff;  
193  #endif  #endif
194    
195  #ifdef MEM_IA64  #ifdef MEM_IA64
196          /*  For testia64  */                  /*  For testia64  */
197          paddr &= 0x3fffffff;                  paddr &= 0x3fffffff;
198  #endif  #endif
199    
200  #ifdef MEM_PPC  #ifdef MEM_PPC
201          if (cpu->cd.ppc.bits == 32)                  if (cpu->cd.ppc.bits == 32)
202                  paddr &= 0xffffffff;                          paddr &= 0xffffffff;
203  #endif  #endif
204    
205    #ifdef MEM_SH
206                    paddr &= 0xffffffff;
207    #endif
208          } else {          } else {
209                  ok = cpu->translate_address(cpu, vaddr, &paddr,                  ok = cpu->translate_address(cpu, vaddr, &paddr,
210                      (writeflag? FLAG_WRITEFLAG : 0) +                      (writeflag? FLAG_WRITEFLAG : 0) +
# Line 213  int MEMORY_RW(struct cpu *cpu, struct me Line 212  int MEMORY_RW(struct cpu *cpu, struct me
212  #ifdef MEM_X86  #ifdef MEM_X86
213                      + (cache_flags & NO_SEGMENTATION)                      + (cache_flags & NO_SEGMENTATION)
214  #endif  #endif
215    #ifdef MEM_ARM
216                        + (cache_flags & MEMORY_USER_ACCESS)
217    #endif
218                      + (cache==CACHE_INSTRUCTION? FLAG_INSTR : 0));                      + (cache==CACHE_INSTRUCTION? FLAG_INSTR : 0));
219                  /*  If the translation caused an exception, or was invalid in                  /*  If the translation caused an exception, or was invalid in
220                      some way, we simply return without doing the memory                      some way, we simply return without doing the memory
# Line 570  have_paddr: Line 572  have_paddr:
572  #endif  #endif
573                      paddr & ~offset_mask);                      paddr & ~offset_mask);
574    
575            if (writeflag == MEM_WRITE &&
576                cpu->invalidate_code_translation != NULL)
577                    cpu->invalidate_code_translation(cpu, paddr, INVALIDATE_PADDR);
578    
579          if (writeflag == MEM_WRITE) {          if (writeflag == MEM_WRITE) {
580                  /*  Ugly optimization, but it works:  */                  /*  Ugly optimization, but it works:  */
581                  if (len == sizeof(uint32_t) && (offset & 3)==0                  if (len == sizeof(uint32_t) && (offset & 3)==0

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