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/* |
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* Copyright (C) 2005-2007 Anders Gavare. All rights reserved. |
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* |
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* Redistribution and use in source and binary forms, with or without |
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* modification, are permitted provided that the following conditions are met: |
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* |
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* 1. Redistributions of source code must retain the above copyright |
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* notice, this list of conditions and the following disclaimer. |
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* 2. Redistributions in binary form must reproduce the above copyright |
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* notice, this list of conditions and the following disclaimer in the |
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* documentation and/or other materials provided with the distribution. |
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* 3. The name of the author may not be used to endorse or promote products |
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* derived from this software without specific prior written permission. |
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* |
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND |
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE |
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS |
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) |
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY |
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF |
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* SUCH DAMAGE. |
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* |
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* |
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* $Id: machine_test.c,v 1.30 2007/02/10 14:38:39 debug Exp $ |
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* |
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* Various "test" machines (bare machines with just a CPU, or a bare machine |
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* plus some experimental devices). |
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*/ |
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#include <stdio.h> |
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#include <string.h> |
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#include "cpu.h" |
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#include "device.h" |
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#include "machine.h" |
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#include "memory.h" |
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#include "misc.h" |
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#include "testmachine/dev_cons.h" |
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#include "testmachine/dev_disk.h" |
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#include "testmachine/dev_ether.h" |
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#include "testmachine/dev_fb.h" |
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#include "testmachine/dev_mp.h" |
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#include "testmachine/dev_rtc.h" |
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|
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|
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static void default_test(struct machine *machine, struct cpu *cpu) |
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{ |
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char tmpstr[1000]; |
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|
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snprintf(tmpstr, sizeof(tmpstr), "cons addr=0x%"PRIx64" irq=none", |
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(uint64_t) DEV_CONS_ADDRESS); |
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machine->main_console_handle = (size_t)device_add(machine, tmpstr); |
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snprintf(tmpstr, sizeof(tmpstr), "mp addr=0x%"PRIx64, |
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(uint64_t) DEV_MP_ADDRESS); |
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device_add(machine, tmpstr); |
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snprintf(tmpstr, sizeof(tmpstr), "fbctrl addr=0x%"PRIx64, |
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(uint64_t) DEV_FBCTRL_ADDRESS); |
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device_add(machine, tmpstr); |
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|
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snprintf(tmpstr, sizeof(tmpstr), "disk addr=0x%"PRIx64, |
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(uint64_t) DEV_DISK_ADDRESS); |
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device_add(machine, tmpstr); |
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snprintf(tmpstr, sizeof(tmpstr), "ether addr=0x%"PRIx64" irq=none", |
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(uint64_t) DEV_ETHER_ADDRESS); |
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device_add(machine, tmpstr); |
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|
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snprintf(tmpstr, sizeof(tmpstr), "rtc addr=0x%"PRIx64" irq=none", |
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(uint64_t) DEV_RTC_ADDRESS); |
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device_add(machine, tmpstr); |
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} |
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MACHINE_SETUP(barealpha) |
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{ |
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machine->machine_name = "Generic \"bare\" Alpha machine"; |
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machine->stable = 1; |
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} |
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MACHINE_SETUP(testalpha) |
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{ |
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machine->machine_name = "Alpha test machine"; |
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machine->stable = 1; |
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/* TODO: interrupt for Alpha? */ |
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default_test(machine, cpu); |
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} |
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MACHINE_DEFAULT_CPU(barealpha) |
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{ |
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machine->cpu_name = strdup("21264"); |
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} |
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MACHINE_DEFAULT_CPU(testalpha) |
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{ |
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machine->cpu_name = strdup("21264"); |
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} |
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MACHINE_REGISTER(barealpha) |
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{ |
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MR_DEFAULT(barealpha, "Generic \"bare\" Alpha machine", |
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ARCH_ALPHA, MACHINE_BAREALPHA); |
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machine_entry_add_alias(me, "barealpha"); |
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} |
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MACHINE_REGISTER(testalpha) |
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{ |
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MR_DEFAULT(testalpha, "Test-machine for Alpha", |
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ARCH_ALPHA, MACHINE_TESTALPHA); |
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machine_entry_add_alias(me, "testalpha"); |
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} |
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MACHINE_SETUP(barearm) |
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{ |
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machine->machine_name = "Generic \"bare\" ARM machine"; |
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machine->stable = 1; |
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} |
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MACHINE_SETUP(testarm) |
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{ |
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machine->machine_name = "ARM test machine"; |
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machine->stable = 1; |
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/* TODO: interrupt for ARM? */ |
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default_test(machine, cpu); |
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/* |
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* Place a tiny stub at end of memory, and set the link register to |
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* point to it. This stub halts the machine (making it easy to try |
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* out simple stand-alone C functions). |
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*/ |
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cpu->cd.arm.r[ARM_SP] = machine->physical_ram_in_mb * 1048576 - 4096; |
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cpu->cd.arm.r[ARM_LR] = cpu->cd.arm.r[ARM_SP] + 32; |
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store_32bit_word(cpu, cpu->cd.arm.r[ARM_LR] + 0, 0xe3a00201); |
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store_32bit_word(cpu, cpu->cd.arm.r[ARM_LR] + 4, 0xe5c00010); |
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store_32bit_word(cpu, cpu->cd.arm.r[ARM_LR] + 8, 0xeafffffe); |
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} |
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MACHINE_DEFAULT_CPU(barearm) |
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{ |
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machine->cpu_name = strdup("SA1110"); |
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} |
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MACHINE_DEFAULT_CPU(testarm) |
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{ |
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machine->cpu_name = strdup("SA1110"); |
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} |
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MACHINE_REGISTER(barearm) |
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{ |
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MR_DEFAULT(barearm, "Generic \"bare\" ARM machine", |
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ARCH_ARM, MACHINE_BAREARM); |
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machine_entry_add_alias(me, "barearm"); |
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} |
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MACHINE_REGISTER(testarm) |
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{ |
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MR_DEFAULT(testarm, "Test-machine for ARM", ARCH_ARM, MACHINE_TESTARM); |
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machine_entry_add_alias(me, "testarm"); |
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} |
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MACHINE_SETUP(barem68k) |
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{ |
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machine->machine_name = "Generic \"bare\" M68K machine"; |
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machine->stable = 1; |
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} |
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MACHINE_SETUP(testm68k) |
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{ |
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machine->machine_name = "M68K test machine"; |
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machine->stable = 1; |
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/* TODO: interrupt for M68K? */ |
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default_test(machine, cpu); |
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} |
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MACHINE_DEFAULT_CPU(barem68k) |
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{ |
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machine->cpu_name = strdup("68020"); |
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} |
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MACHINE_DEFAULT_CPU(testm68k) |
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{ |
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machine->cpu_name = strdup("68020"); |
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} |
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MACHINE_REGISTER(barem68k) |
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{ |
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MR_DEFAULT(barem68k, "Generic \"bare\" M68K machine", |
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ARCH_M68K, MACHINE_BAREM68K); |
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machine_entry_add_alias(me, "barem68k"); |
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} |
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MACHINE_REGISTER(testm68k) |
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{ |
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MR_DEFAULT(testm68k, "Test-machine for M68K", |
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ARCH_M68K, MACHINE_TESTM68K); |
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machine_entry_add_alias(me, "testm68k"); |
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} |
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MACHINE_SETUP(baremips) |
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{ |
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machine->machine_name = "Generic \"bare\" MIPS machine"; |
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machine->stable = 1; |
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cpu->byte_order = EMUL_BIG_ENDIAN; |
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} |
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MACHINE_SETUP(testmips) |
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{ |
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/* |
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* A MIPS test machine. Originally, this was created as a way for |
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* me to test my master's thesis code; since then it has both |
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* evolved to support new things, and suffered bit rot so that it |
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* no longer can run my thesis code. Well, well... |
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* |
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* IRQ map: |
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* 7 CPU counter |
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* 6 SMP IPIs |
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* 5 not used yet |
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* 4 rtc |
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* 3 ethernet |
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* 2 serial console |
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*/ |
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char tmpstr[300]; |
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machine->machine_name = "MIPS test machine"; |
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machine->stable = 1; |
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cpu->byte_order = EMUL_BIG_ENDIAN; |
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snprintf(tmpstr, sizeof(tmpstr), "cons addr=0x%"PRIx64" irq=%s." |
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"cpu[%i].2", (uint64_t) DEV_CONS_ADDRESS, machine->path, |
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machine->bootstrap_cpu); |
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machine->main_console_handle = (size_t)device_add(machine, tmpstr); |
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snprintf(tmpstr, sizeof(tmpstr), "mp irq=6 addr=0x%"PRIx64, |
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(uint64_t) DEV_MP_ADDRESS); |
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device_add(machine, tmpstr); |
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snprintf(tmpstr, sizeof(tmpstr), "fbctrl addr=0x%"PRIx64, |
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(uint64_t) DEV_FBCTRL_ADDRESS); |
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device_add(machine, tmpstr); |
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snprintf(tmpstr, sizeof(tmpstr), "disk addr=0x%"PRIx64, |
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(uint64_t) DEV_DISK_ADDRESS); |
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device_add(machine, tmpstr); |
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snprintf(tmpstr, sizeof(tmpstr), "ether addr=0x%"PRIx64" irq=%s." |
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"cpu[%i].3", (uint64_t) DEV_ETHER_ADDRESS, machine->path, |
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machine->bootstrap_cpu); |
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device_add(machine, tmpstr); |
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snprintf(tmpstr, sizeof(tmpstr), "rtc addr=0x%"PRIx64" irq=%s." |
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"cpu[%i].4", (uint64_t) DEV_RTC_ADDRESS, machine->path, |
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machine->bootstrap_cpu); |
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device_add(machine, tmpstr); |
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} |
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MACHINE_DEFAULT_CPU(baremips) |
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{ |
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machine->cpu_name = strdup("5KE"); |
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} |
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MACHINE_DEFAULT_CPU(testmips) |
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{ |
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machine->cpu_name = strdup("5KE"); |
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} |
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MACHINE_REGISTER(baremips) |
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{ |
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MR_DEFAULT(baremips, "Generic \"bare\" MIPS machine", |
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ARCH_MIPS, MACHINE_BAREMIPS); |
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machine_entry_add_alias(me, "baremips"); |
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} |
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MACHINE_REGISTER(testmips) |
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{ |
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MR_DEFAULT(testmips, "Test-machine for MIPS", |
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ARCH_MIPS, MACHINE_TESTMIPS); |
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machine_entry_add_alias(me, "testmips"); |
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} |
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MACHINE_SETUP(bareppc) |
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{ |
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machine->machine_name = "Generic \"bare\" PPC machine"; |
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machine->stable = 1; |
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} |
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MACHINE_SETUP(testppc) |
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{ |
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machine->machine_name = "PPC test machine"; |
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machine->stable = 1; |
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/* TODO: interrupt for PPC? */ |
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default_test(machine, cpu); |
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} |
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MACHINE_DEFAULT_CPU(bareppc) |
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{ |
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machine->cpu_name = strdup("PPC970"); |
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} |
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MACHINE_DEFAULT_CPU(testppc) |
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{ |
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machine->cpu_name = strdup("PPC970"); |
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} |
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MACHINE_REGISTER(bareppc) |
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{ |
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MR_DEFAULT(bareppc, "Generic \"bare\" PPC machine", |
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ARCH_PPC, MACHINE_BAREPPC); |
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machine_entry_add_alias(me, "bareppc"); |
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} |
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MACHINE_REGISTER(testppc) |
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{ |
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MR_DEFAULT(testppc, "Test-machine for PPC", ARCH_PPC, MACHINE_TESTPPC); |
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machine_entry_add_alias(me, "testppc"); |
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} |
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MACHINE_SETUP(baresh) |
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{ |
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machine->machine_name = "Generic \"bare\" SH machine"; |
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machine->stable = 1; |
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} |
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MACHINE_SETUP(testsh) |
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{ |
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machine->machine_name = "SH test machine"; |
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machine->stable = 1; |
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/* TODO: interrupt for SH? */ |
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default_test(machine, cpu); |
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} |
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MACHINE_DEFAULT_CPU(baresh) |
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{ |
393 |
dpavlin |
32 |
machine->cpu_name = strdup("SH7750"); |
394 |
dpavlin |
22 |
} |
395 |
|
|
|
396 |
|
|
|
397 |
|
|
MACHINE_DEFAULT_CPU(testsh) |
398 |
|
|
{ |
399 |
dpavlin |
32 |
machine->cpu_name = strdup("SH7750"); |
400 |
dpavlin |
22 |
} |
401 |
|
|
|
402 |
|
|
|
403 |
|
|
MACHINE_REGISTER(baresh) |
404 |
|
|
{ |
405 |
|
|
MR_DEFAULT(baresh, "Generic \"bare\" SH machine", |
406 |
dpavlin |
26 |
ARCH_SH, MACHINE_BARESH); |
407 |
|
|
|
408 |
|
|
machine_entry_add_alias(me, "baresh"); |
409 |
dpavlin |
22 |
} |
410 |
|
|
|
411 |
|
|
|
412 |
|
|
MACHINE_REGISTER(testsh) |
413 |
|
|
{ |
414 |
dpavlin |
26 |
MR_DEFAULT(testsh, "Test-machine for SH", ARCH_SH, MACHINE_TESTSH); |
415 |
|
|
|
416 |
|
|
machine_entry_add_alias(me, "testsh"); |
417 |
dpavlin |
22 |
} |
418 |
|
|
|
419 |
|
|
|
420 |
|
|
MACHINE_SETUP(baresparc) |
421 |
|
|
{ |
422 |
|
|
machine->machine_name = "Generic \"bare\" SPARC machine"; |
423 |
|
|
machine->stable = 1; |
424 |
|
|
} |
425 |
|
|
|
426 |
|
|
|
427 |
|
|
MACHINE_SETUP(testsparc) |
428 |
|
|
{ |
429 |
|
|
machine->machine_name = "SPARC test machine"; |
430 |
|
|
machine->stable = 1; |
431 |
|
|
|
432 |
|
|
/* TODO: interrupt for SPARC? */ |
433 |
|
|
|
434 |
|
|
default_test(machine, cpu); |
435 |
|
|
} |
436 |
|
|
|
437 |
|
|
|
438 |
|
|
MACHINE_DEFAULT_CPU(baresparc) |
439 |
|
|
{ |
440 |
dpavlin |
24 |
machine->cpu_name = strdup("UltraSPARC"); |
441 |
dpavlin |
22 |
} |
442 |
|
|
|
443 |
|
|
|
444 |
|
|
MACHINE_DEFAULT_CPU(testsparc) |
445 |
|
|
{ |
446 |
dpavlin |
24 |
machine->cpu_name = strdup("UltraSPARC"); |
447 |
dpavlin |
22 |
} |
448 |
|
|
|
449 |
|
|
|
450 |
|
|
MACHINE_REGISTER(baresparc) |
451 |
|
|
{ |
452 |
|
|
MR_DEFAULT(baresparc, "Generic \"bare\" SPARC machine", |
453 |
dpavlin |
26 |
ARCH_SPARC, MACHINE_BARESPARC); |
454 |
|
|
|
455 |
|
|
machine_entry_add_alias(me, "baresparc"); |
456 |
dpavlin |
22 |
} |
457 |
|
|
|
458 |
|
|
|
459 |
|
|
MACHINE_REGISTER(testsparc) |
460 |
|
|
{ |
461 |
|
|
MR_DEFAULT(testsparc, "Test-machine for SPARC", |
462 |
dpavlin |
26 |
ARCH_SPARC, MACHINE_TESTSPARC); |
463 |
|
|
|
464 |
|
|
machine_entry_add_alias(me, "testsparc"); |
465 |
dpavlin |
22 |
} |
466 |
|
|
|
467 |
dpavlin |
28 |
|
468 |
|
|
MACHINE_SETUP(baretransputer) |
469 |
|
|
{ |
470 |
|
|
machine->machine_name = "Generic \"bare\" Transputer machine"; |
471 |
|
|
machine->stable = 1; |
472 |
|
|
} |
473 |
|
|
|
474 |
|
|
|
475 |
|
|
MACHINE_DEFAULT_CPU(baretransputer) |
476 |
|
|
{ |
477 |
|
|
machine->cpu_name = strdup("T800"); |
478 |
|
|
} |
479 |
|
|
|
480 |
|
|
|
481 |
|
|
MACHINE_REGISTER(baretransputer) |
482 |
|
|
{ |
483 |
|
|
MR_DEFAULT(baretransputer, "Generic \"bare\" Transputer machine", |
484 |
|
|
ARCH_TRANSPUTER, MACHINE_BARETRANSPUTER); |
485 |
|
|
|
486 |
|
|
machine_entry_add_alias(me, "baretransputer"); |
487 |
|
|
} |
488 |
|
|
|