25 |
* SUCH DAMAGE. |
* SUCH DAMAGE. |
26 |
* |
* |
27 |
* |
* |
28 |
* $Id: machine.c,v 1.406 2005/04/06 23:13:37 debug Exp $ |
* $Id: machine.c,v 1.515 2005/08/16 09:16:26 debug Exp $ |
29 |
* |
* |
30 |
* Emulation of specific machines. |
* Emulation of specific machines. |
31 |
* |
* |
53 |
#include "arcbios.h" |
#include "arcbios.h" |
54 |
#include "bus_pci.h" |
#include "bus_pci.h" |
55 |
#include "cpu.h" |
#include "cpu.h" |
|
#include "cpu_mips.h" |
|
56 |
#include "device.h" |
#include "device.h" |
57 |
#include "devices.h" |
#include "devices.h" |
58 |
#include "diskimage.h" |
#include "diskimage.h" |
64 |
#include "net.h" |
#include "net.h" |
65 |
#include "symbol.h" |
#include "symbol.h" |
66 |
|
|
67 |
|
/* For Alpha emulation: */ |
68 |
|
#include "alpha_rpb.h" |
69 |
|
|
70 |
/* For SGI and ARC emulation: */ |
/* For SGI and ARC emulation: */ |
71 |
#include "sgi_arcbios.h" |
#include "sgi_arcbios.h" |
|
#include "arcbios_other.h" |
|
72 |
#include "crimereg.h" |
#include "crimereg.h" |
73 |
|
|
74 |
|
/* For evbmips emulation: */ |
75 |
|
#include "maltareg.h" |
76 |
|
|
77 |
/* For DECstation emulation: */ |
/* For DECstation emulation: */ |
78 |
#include "dec_prom.h" |
#include "dec_prom.h" |
79 |
#include "dec_bootinfo.h" |
#include "dec_bootinfo.h" |
88 |
#include "hpc_bootinfo.h" |
#include "hpc_bootinfo.h" |
89 |
#include "vripreg.h" |
#include "vripreg.h" |
90 |
|
|
91 |
|
#define BOOTSTR_BUFLEN 1000 |
92 |
|
#define BOOTARG_BUFLEN 2000 |
93 |
|
#define ETHERNET_STRING_MAXLEN 40 |
94 |
|
|
95 |
struct machine_entry_subtype { |
struct machine_entry_subtype { |
96 |
int machine_subtype;/* Old-style subtype */ |
int machine_subtype;/* Old-style subtype */ |
114 |
struct machine_entry_subtype **subtype; |
struct machine_entry_subtype **subtype; |
115 |
}; |
}; |
116 |
|
|
117 |
|
|
118 |
|
/* See main.c: */ |
119 |
|
extern int quiet_mode; |
120 |
|
|
121 |
|
|
122 |
/* This is initialized by machine_init(): */ |
/* This is initialized by machine_init(): */ |
123 |
static struct machine_entry *first_machine_entry = NULL; |
static struct machine_entry *first_machine_entry = NULL; |
124 |
|
|
145 |
m->name = strdup(name); |
m->name = strdup(name); |
146 |
|
|
147 |
/* Sane default values: */ |
/* Sane default values: */ |
148 |
m->serial_nr = 0; |
m->serial_nr = 1; |
149 |
m->machine_type = MACHINE_NONE; |
m->machine_type = MACHINE_NONE; |
150 |
m->machine_subtype = MACHINE_NONE; |
m->machine_subtype = MACHINE_NONE; |
151 |
|
#ifdef BINTRANS |
152 |
m->bintrans_enable = 1; |
m->bintrans_enable = 1; |
153 |
|
m->old_bintrans_enable = 1; |
154 |
|
#endif |
155 |
|
m->arch_pagesize = 4096; /* Should be overriden in |
156 |
|
emul.c for other pagesizes. */ |
157 |
|
m->dyntrans_alignment_check = 1; |
158 |
m->prom_emulation = 1; |
m->prom_emulation = 1; |
159 |
m->speed_tricks = 1; |
m->speed_tricks = 1; |
160 |
m->byte_order_override = NO_BYTE_ORDER_OVERRIDE; |
m->byte_order_override = NO_BYTE_ORDER_OVERRIDE; |
185 |
int *type, int *subtype, int *arch) |
int *type, int *subtype, int *arch) |
186 |
{ |
{ |
187 |
struct machine_entry *me; |
struct machine_entry *me; |
188 |
int i, j, k; |
int i, j, k, nmatches = 0; |
189 |
|
|
190 |
*type = MACHINE_NONE; |
*type = MACHINE_NONE; |
191 |
*subtype = 0; |
*subtype = 0; |
192 |
|
|
193 |
|
/* Check stype, and optionally ssubtype: */ |
194 |
me = first_machine_entry; |
me = first_machine_entry; |
195 |
while (me != NULL) { |
while (me != NULL) { |
196 |
for (i=0; i<me->n_aliases; i++) |
for (i=0; i<me->n_aliases; i++) |
214 |
return 1; |
return 1; |
215 |
} |
} |
216 |
|
|
217 |
fatal("unknown subtype '%s' for emulation" |
fatal("Unknown subtype '%s' for emulation" |
218 |
" '%s'\n", ssubtype, stype); |
" '%s'\n", ssubtype, stype); |
219 |
|
if (!ssubtype[0]) |
220 |
|
fatal("(Maybe you forgot the -e" |
221 |
|
" command line option?)\n"); |
222 |
exit(1); |
exit(1); |
223 |
} |
} |
224 |
|
|
225 |
me = me->next; |
me = me->next; |
226 |
} |
} |
227 |
|
|
228 |
fatal("machine_name_to_type(): unknown emulation type '%s' (", stype); |
/* Not found? Then just check ssubtype: */ |
229 |
if (ssubtype == NULL) |
me = first_machine_entry; |
230 |
fatal("no subtype)\n"); |
while (me != NULL) { |
231 |
else |
if (me->n_subtypes == 0) { |
232 |
fatal("subtype '%s')\n", ssubtype); |
me = me->next; |
233 |
|
continue; |
234 |
|
} |
235 |
|
|
236 |
|
/* Check for subtype: */ |
237 |
|
for (j=0; j<me->n_subtypes; j++) |
238 |
|
for (k=0; k<me->subtype[j]->n_aliases; k++) |
239 |
|
if (strcasecmp(ssubtype, me->subtype[j]-> |
240 |
|
aliases[k]) == 0) { |
241 |
|
*type = me->machine_type; |
242 |
|
*arch = me->arch; |
243 |
|
*subtype = me->subtype[j]-> |
244 |
|
machine_subtype; |
245 |
|
nmatches ++; |
246 |
|
} |
247 |
|
|
248 |
|
me = me->next; |
249 |
|
} |
250 |
|
|
251 |
|
switch (nmatches) { |
252 |
|
case 0: fatal("\nSorry, emulation \"%s\"", stype); |
253 |
|
if (ssubtype != NULL && ssubtype[0] != '\0') |
254 |
|
fatal(" (subtype \"%s\")", ssubtype); |
255 |
|
fatal(" is unknown.\n"); |
256 |
|
break; |
257 |
|
case 1: return 1; |
258 |
|
default:fatal("\nSorry, multiple matches for \"%s\"", stype); |
259 |
|
if (ssubtype != NULL && ssubtype[0] != '\0') |
260 |
|
fatal(" (subtype \"%s\")", ssubtype); |
261 |
|
fatal(".\n"); |
262 |
|
} |
263 |
|
|
264 |
|
*type = MACHINE_NONE; |
265 |
|
*subtype = 0; |
266 |
|
|
267 |
|
fatal("Use the -H command line option to get a list of " |
268 |
|
"available types and subtypes.\n\n"); |
269 |
|
|
|
fatal("Use the -H command line option to get a list of available" |
|
|
" types and subtypes.\n"); |
|
270 |
return 0; |
return 0; |
271 |
} |
} |
272 |
|
|
388 |
|
|
389 |
|
|
390 |
/* |
/* |
391 |
|
* add_environment_string_dual(): |
392 |
|
* |
393 |
|
* Add "dual" environment strings, one for the variable name and one for the |
394 |
|
* value, and update pointers afterwards. |
395 |
|
*/ |
396 |
|
void add_environment_string_dual(struct cpu *cpu, |
397 |
|
uint64_t *ptrp, uint64_t *addrp, char *s1, char *s2) |
398 |
|
{ |
399 |
|
uint64_t ptr = *ptrp, addr = *addrp; |
400 |
|
|
401 |
|
store_32bit_word(cpu, ptr, addr); |
402 |
|
ptr += sizeof(uint32_t); |
403 |
|
if (addr != 0) { |
404 |
|
store_string(cpu, addr, s1); |
405 |
|
addr += strlen(s1) + 1; |
406 |
|
} |
407 |
|
store_32bit_word(cpu, ptr, addr); |
408 |
|
ptr += sizeof(uint32_t); |
409 |
|
if (addr != 0) { |
410 |
|
store_string(cpu, addr, s2); |
411 |
|
addr += strlen(s2) + 1; |
412 |
|
} |
413 |
|
|
414 |
|
*ptrp = ptr; |
415 |
|
*addrp = addr; |
416 |
|
} |
417 |
|
|
418 |
|
|
419 |
|
/* |
420 |
* store_64bit_word(): |
* store_64bit_word(): |
421 |
* |
* |
422 |
* Stores a 64-bit word in emulated RAM. Byte order is taken into account. |
* Stores a 64-bit word in emulated RAM. Byte order is taken into account. |
500 |
*/ |
*/ |
501 |
void store_buf(struct cpu *cpu, uint64_t addr, char *s, size_t len) |
void store_buf(struct cpu *cpu, uint64_t addr, char *s, size_t len) |
502 |
{ |
{ |
503 |
|
int psize = 1024; /* 1024 256 64 16 4 1 */ |
504 |
|
|
505 |
if ((addr >> 32) == 0) |
if ((addr >> 32) == 0) |
506 |
addr = (int64_t)(int32_t)addr; |
addr = (int64_t)(int32_t)addr; |
|
if ((addr & 7) == 0 && (((size_t)s) & 7) == 0) { |
|
|
while (len >= 8) { |
|
|
cpu->memory_rw(cpu, cpu->mem, addr, (unsigned char *)s, |
|
|
8, MEM_WRITE, CACHE_DATA); |
|
|
addr += 8; |
|
|
s += 8; |
|
|
len -= 8; |
|
|
} |
|
|
} |
|
507 |
|
|
508 |
if ((addr & 3) == 0 && (((size_t)s) & 3) == 0) { |
while (len != 0) { |
509 |
while (len >= 4) { |
if ((addr & (psize-1)) == 0) { |
510 |
cpu->memory_rw(cpu, cpu->mem, addr, (unsigned char *)s, |
while (len >= psize) { |
511 |
4, MEM_WRITE, CACHE_DATA); |
cpu->memory_rw(cpu, cpu->mem, addr, |
512 |
addr += 4; |
(unsigned char *)s, psize, MEM_WRITE, |
513 |
s += 4; |
CACHE_DATA); |
514 |
len -= 4; |
addr += psize; |
515 |
|
s += psize; |
516 |
|
len -= psize; |
517 |
|
} |
518 |
} |
} |
519 |
|
psize >>= 2; |
520 |
} |
} |
521 |
|
|
522 |
while (len-- != 0) |
while (len-- != 0) |
570 |
|
|
571 |
|
|
572 |
/* |
/* |
573 |
|
* load_16bit_word(): |
574 |
|
* |
575 |
|
* Helper function. Prints a warning and returns 0, if the read failed. |
576 |
|
* Emulated byte order is taken into account. |
577 |
|
*/ |
578 |
|
uint16_t load_16bit_word(struct cpu *cpu, uint64_t addr) |
579 |
|
{ |
580 |
|
unsigned char data[2]; |
581 |
|
|
582 |
|
if ((addr >> 32) == 0) |
583 |
|
addr = (int64_t)(int32_t)addr; |
584 |
|
cpu->memory_rw(cpu, cpu->mem, |
585 |
|
addr, data, sizeof(data), MEM_READ, CACHE_DATA); |
586 |
|
|
587 |
|
if (cpu->byte_order == EMUL_LITTLE_ENDIAN) { |
588 |
|
int tmp = data[0]; data[0] = data[1]; data[1] = tmp; |
589 |
|
} |
590 |
|
|
591 |
|
return (data[0] << 8) + data[1]; |
592 |
|
} |
593 |
|
|
594 |
|
|
595 |
|
/* |
596 |
* store_64bit_word_in_host(): |
* store_64bit_word_in_host(): |
597 |
* |
* |
598 |
* Stores a 64-bit word in the _host's_ RAM. Emulated byte order is taken |
* Stores a 64-bit word in the _host's_ RAM. Emulated byte order is taken |
676 |
|
|
677 |
if (assrt) { |
if (assrt) { |
678 |
/* OR in the irq_nr into the CSR: */ |
/* OR in the irq_nr into the CSR: */ |
679 |
m->kn02_csr->csr[0] |= irq_nr; |
m->md_int.kn02_csr->csr[0] |= irq_nr; |
680 |
} else { |
} else { |
681 |
/* AND out the irq_nr from the CSR: */ |
/* AND out the irq_nr from the CSR: */ |
682 |
m->kn02_csr->csr[0] &= ~irq_nr; |
m->md_int.kn02_csr->csr[0] &= ~irq_nr; |
683 |
} |
} |
684 |
|
|
685 |
current = m->kn02_csr->csr[0] & m->kn02_csr->csr[2]; |
current = m->md_int.kn02_csr->csr[0] & m->md_int.kn02_csr->csr[2]; |
686 |
if (current == 0) |
if (current == 0) |
687 |
cpu_interrupt_ack(cpu, 2); |
cpu_interrupt_ack(cpu, 2); |
688 |
else |
else |
701 |
/* debug("kmin_interrupt(): irq_nr=%i assrt=%i\n", irq_nr, assrt); */ |
/* debug("kmin_interrupt(): irq_nr=%i assrt=%i\n", irq_nr, assrt); */ |
702 |
|
|
703 |
if (assrt) |
if (assrt) |
704 |
m->dec_ioasic_data->reg[(IOASIC_INTR - IOASIC_SLOT_1_START) / 0x10] |= irq_nr; |
m->md_int.dec_ioasic_data->reg[(IOASIC_INTR - IOASIC_SLOT_1_START) / 0x10] |= irq_nr; |
705 |
else |
else |
706 |
m->dec_ioasic_data->reg[(IOASIC_INTR - IOASIC_SLOT_1_START) / 0x10] &= ~irq_nr; |
m->md_int.dec_ioasic_data->reg[(IOASIC_INTR - IOASIC_SLOT_1_START) / 0x10] &= ~irq_nr; |
707 |
|
|
708 |
if (m->dec_ioasic_data->reg[(IOASIC_INTR - IOASIC_SLOT_1_START) / 0x10] |
if (m->md_int.dec_ioasic_data->reg[(IOASIC_INTR - IOASIC_SLOT_1_START) / 0x10] |
709 |
& m->dec_ioasic_data->reg[(IOASIC_IMSK - IOASIC_SLOT_1_START) / 0x10]) |
& m->md_int.dec_ioasic_data->reg[(IOASIC_IMSK - IOASIC_SLOT_1_START) / 0x10]) |
710 |
cpu_interrupt(cpu, KMIN_INT_TC3); |
cpu_interrupt(cpu, KMIN_INT_TC3); |
711 |
else |
else |
712 |
cpu_interrupt_ack(cpu, KMIN_INT_TC3); |
cpu_interrupt_ack(cpu, KMIN_INT_TC3); |
722 |
/* debug("kn03_interrupt(): irq_nr=0x%x assrt=%i\n", irq_nr, assrt); */ |
/* debug("kn03_interrupt(): irq_nr=0x%x assrt=%i\n", irq_nr, assrt); */ |
723 |
|
|
724 |
if (assrt) |
if (assrt) |
725 |
m->dec_ioasic_data->reg[(IOASIC_INTR - IOASIC_SLOT_1_START) / 0x10] |= irq_nr; |
m->md_int.dec_ioasic_data->reg[(IOASIC_INTR - IOASIC_SLOT_1_START) / 0x10] |= irq_nr; |
726 |
else |
else |
727 |
m->dec_ioasic_data->reg[(IOASIC_INTR - IOASIC_SLOT_1_START) / 0x10] &= ~irq_nr; |
m->md_int.dec_ioasic_data->reg[(IOASIC_INTR - IOASIC_SLOT_1_START) / 0x10] &= ~irq_nr; |
728 |
|
|
729 |
if (m->dec_ioasic_data->reg[(IOASIC_INTR - IOASIC_SLOT_1_START) / 0x10] |
if (m->md_int.dec_ioasic_data->reg[(IOASIC_INTR - IOASIC_SLOT_1_START) / 0x10] |
730 |
& m->dec_ioasic_data->reg[(IOASIC_IMSK - IOASIC_SLOT_1_START) / 0x10]) |
& m->md_int.dec_ioasic_data->reg[(IOASIC_IMSK - IOASIC_SLOT_1_START) / 0x10]) |
731 |
cpu_interrupt(cpu, KN03_INT_ASIC); |
cpu_interrupt(cpu, KN03_INT_ASIC); |
732 |
else |
else |
733 |
cpu_interrupt_ack(cpu, KN03_INT_ASIC); |
cpu_interrupt_ack(cpu, KN03_INT_ASIC); |
744 |
debug("maxine_interrupt(): irq_nr=0x%x assrt=%i\n", irq_nr, assrt); |
debug("maxine_interrupt(): irq_nr=0x%x assrt=%i\n", irq_nr, assrt); |
745 |
|
|
746 |
if (assrt) |
if (assrt) |
747 |
m->dec_ioasic_data->reg[(IOASIC_INTR - IOASIC_SLOT_1_START) |
m->md_int.dec_ioasic_data->reg[(IOASIC_INTR - IOASIC_SLOT_1_START) |
748 |
/ 0x10] |= irq_nr; |
/ 0x10] |= irq_nr; |
749 |
else |
else |
750 |
m->dec_ioasic_data->reg[(IOASIC_INTR - IOASIC_SLOT_1_START) |
m->md_int.dec_ioasic_data->reg[(IOASIC_INTR - IOASIC_SLOT_1_START) |
751 |
/ 0x10] &= ~irq_nr; |
/ 0x10] &= ~irq_nr; |
752 |
|
|
753 |
if (m->dec_ioasic_data->reg[(IOASIC_INTR - IOASIC_SLOT_1_START) / 0x10] |
if (m->md_int.dec_ioasic_data->reg[(IOASIC_INTR - IOASIC_SLOT_1_START) / 0x10] |
754 |
& m->dec_ioasic_data->reg[(IOASIC_IMSK - IOASIC_SLOT_1_START) |
& m->md_int.dec_ioasic_data->reg[(IOASIC_IMSK - IOASIC_SLOT_1_START) |
755 |
/ 0x10]) |
/ 0x10]) |
756 |
cpu_interrupt(cpu, XINE_INT_TC3); |
cpu_interrupt(cpu, XINE_INT_TC3); |
757 |
else |
else |
766 |
{ |
{ |
767 |
int r2 = 0; |
int r2 = 0; |
768 |
|
|
769 |
m->kn230_csr->csr |= irq_nr; |
m->md_int.kn230_csr->csr |= irq_nr; |
770 |
|
|
771 |
switch (irq_nr) { |
switch (irq_nr) { |
772 |
case KN230_CSR_INTR_SII: |
case KN230_CSR_INTR_SII: |
784 |
|
|
785 |
if (assrt) { |
if (assrt) { |
786 |
/* OR in the irq_nr mask into the CSR: */ |
/* OR in the irq_nr mask into the CSR: */ |
787 |
m->kn230_csr->csr |= irq_nr; |
m->md_int.kn230_csr->csr |= irq_nr; |
788 |
|
|
789 |
/* Assert MIPS interrupt 2 or 3: */ |
/* Assert MIPS interrupt 2 or 3: */ |
790 |
cpu_interrupt(cpu, r2); |
cpu_interrupt(cpu, r2); |
791 |
} else { |
} else { |
792 |
/* AND out the irq_nr mask from the CSR: */ |
/* AND out the irq_nr mask from the CSR: */ |
793 |
m->kn230_csr->csr &= ~irq_nr; |
m->md_int.kn230_csr->csr &= ~irq_nr; |
794 |
|
|
795 |
/* If the CSR interrupt bits are all zero, |
/* If the CSR interrupt bits are all zero, |
796 |
clear the bit in the cause register as well. */ |
clear the bit in the cause register as well. */ |
797 |
if (r2 == 2) { |
if (r2 == 2) { |
798 |
/* irq 2: */ |
/* irq 2: */ |
799 |
if ((m->kn230_csr->csr & (KN230_CSR_INTR_DZ0 |
if ((m->md_int.kn230_csr->csr & (KN230_CSR_INTR_DZ0 |
800 |
| KN230_CSR_INTR_OPT0 | KN230_CSR_INTR_OPT1)) == 0) |
| KN230_CSR_INTR_OPT0 | KN230_CSR_INTR_OPT1)) == 0) |
801 |
cpu_interrupt_ack(cpu, r2); |
cpu_interrupt_ack(cpu, r2); |
802 |
} else { |
} else { |
803 |
/* irq 3: */ |
/* irq 3: */ |
804 |
if ((m->kn230_csr->csr & (KN230_CSR_INTR_SII | |
if ((m->md_int.kn230_csr->csr & (KN230_CSR_INTR_SII | |
805 |
KN230_CSR_INTR_LANCE)) == 0) |
KN230_CSR_INTR_LANCE)) == 0) |
806 |
cpu_interrupt_ack(cpu, r2); |
cpu_interrupt_ack(cpu, r2); |
807 |
} |
} |
835 |
|
|
836 |
if (isa) { |
if (isa) { |
837 |
if (assrt) |
if (assrt) |
838 |
m->jazz_data->isa_int_asserted |= irq; |
m->md_int.jazz_data->isa_int_asserted |= irq; |
839 |
else |
else |
840 |
m->jazz_data->isa_int_asserted &= ~irq; |
m->md_int.jazz_data->isa_int_asserted &= ~irq; |
841 |
} else { |
} else { |
842 |
if (assrt) |
if (assrt) |
843 |
m->jazz_data->int_asserted |= irq; |
m->md_int.jazz_data->int_asserted |= irq; |
844 |
else |
else |
845 |
m->jazz_data->int_asserted &= ~irq; |
m->md_int.jazz_data->int_asserted &= ~irq; |
846 |
} |
} |
847 |
|
|
848 |
/* debug(" %08x %08x\n", m->jazz_data->int_asserted, |
/* debug(" %08x %08x\n", m->md_int.jazz_data->int_asserted, |
849 |
m->jazz_data->int_enable_mask); */ |
m->md_int.jazz_data->int_enable_mask); */ |
850 |
/* debug(" %08x %08x\n", m->jazz_data->isa_int_asserted, |
/* debug(" %08x %08x\n", m->md_int.jazz_data->isa_int_asserted, |
851 |
m->jazz_data->isa_int_enable_mask); */ |
m->md_int.jazz_data->isa_int_enable_mask); */ |
852 |
|
|
853 |
if (m->jazz_data->int_asserted /* & m->jazz_data->int_enable_mask */ |
if (m->md_int.jazz_data->int_asserted |
854 |
& ~0x8000 ) |
/* & m->md_int.jazz_data->int_enable_mask */ & ~0x8000 ) |
855 |
cpu_interrupt(cpu, 3); |
cpu_interrupt(cpu, 3); |
856 |
else |
else |
857 |
cpu_interrupt_ack(cpu, 3); |
cpu_interrupt_ack(cpu, 3); |
858 |
|
|
859 |
if (m->jazz_data->isa_int_asserted & m->jazz_data->isa_int_enable_mask) |
if (m->md_int.jazz_data->isa_int_asserted & |
860 |
|
m->md_int.jazz_data->isa_int_enable_mask) |
861 |
cpu_interrupt(cpu, 4); |
cpu_interrupt(cpu, 4); |
862 |
else |
else |
863 |
cpu_interrupt_ack(cpu, 4); |
cpu_interrupt_ack(cpu, 4); |
864 |
|
|
865 |
/* TODO: this "15" (0x8000) is the timer... fix this? */ |
/* TODO: this "15" (0x8000) is the timer... fix this? */ |
866 |
if (m->jazz_data->int_asserted & 0x8000) |
if (m->md_int.jazz_data->int_asserted & 0x8000) |
867 |
cpu_interrupt(cpu, 6); |
cpu_interrupt(cpu, 6); |
868 |
else |
else |
869 |
cpu_interrupt_ack(cpu, 6); |
cpu_interrupt_ack(cpu, 6); |
888 |
giu_irq = irq_nr - 32; |
giu_irq = irq_nr - 32; |
889 |
|
|
890 |
if (assrt) |
if (assrt) |
891 |
m->vr41xx_data->giuint |= (1 << giu_irq); |
m->md_int.vr41xx_data->giuint |= (1 << giu_irq); |
892 |
else |
else |
893 |
m->vr41xx_data->giuint &= ~(1 << giu_irq); |
m->md_int.vr41xx_data->giuint &= ~(1 << giu_irq); |
894 |
} |
} |
895 |
|
|
896 |
/* TODO: This is wrong. What about GIU bit 8? */ |
/* TODO: This is wrong. What about GIU bit 8? */ |
898 |
if (irq_nr != 8) { |
if (irq_nr != 8) { |
899 |
/* If any GIU bit is asserted, then assert the main |
/* If any GIU bit is asserted, then assert the main |
900 |
GIU interrupt: */ |
GIU interrupt: */ |
901 |
if (m->vr41xx_data->giuint & m->vr41xx_data->giumask) |
if (m->md_int.vr41xx_data->giuint & |
902 |
|
m->md_int.vr41xx_data->giumask) |
903 |
vr41xx_interrupt(m, cpu, 8 + 8, 1); |
vr41xx_interrupt(m, cpu, 8 + 8, 1); |
904 |
else |
else |
905 |
vr41xx_interrupt(m, cpu, 8 + 8, 0); |
vr41xx_interrupt(m, cpu, 8 + 8, 0); |
910 |
|
|
911 |
if (irq_nr < 16) { |
if (irq_nr < 16) { |
912 |
if (assrt) |
if (assrt) |
913 |
m->vr41xx_data->sysint1 |= (1 << irq_nr); |
m->md_int.vr41xx_data->sysint1 |= (1 << irq_nr); |
914 |
else |
else |
915 |
m->vr41xx_data->sysint1 &= ~(1 << irq_nr); |
m->md_int.vr41xx_data->sysint1 &= ~(1 << irq_nr); |
916 |
} else if (irq_nr < 32) { |
} else if (irq_nr < 32) { |
917 |
irq_nr -= 16; |
irq_nr -= 16; |
918 |
if (assrt) |
if (assrt) |
919 |
m->vr41xx_data->sysint2 |= (1 << irq_nr); |
m->md_int.vr41xx_data->sysint2 |= (1 << irq_nr); |
920 |
else |
else |
921 |
m->vr41xx_data->sysint2 &= ~(1 << irq_nr); |
m->md_int.vr41xx_data->sysint2 &= ~(1 << irq_nr); |
922 |
} |
} |
923 |
|
|
924 |
/* TODO: Which hardware interrupt pin? */ |
/* TODO: Which hardware interrupt pin? */ |
925 |
|
|
926 |
/* debug(" sysint1=%04x mask=%04x, sysint2=%04x mask=%04x\n", |
/* debug(" sysint1=%04x mask=%04x, sysint2=%04x mask=%04x\n", |
927 |
m->vr41xx_data->sysint1, m->vr41xx_data->msysint1, |
m->md_int.vr41xx_data->sysint1, m->md_int.vr41xx_data->msysint1, |
928 |
m->vr41xx_data->sysint2, m->vr41xx_data->msysint2); */ |
m->md_int.vr41xx_data->sysint2, m->md_int.vr41xx_data->msysint2); */ |
929 |
|
|
930 |
if ((m->vr41xx_data->sysint1 & m->vr41xx_data->msysint1) | |
if ((m->md_int.vr41xx_data->sysint1 & m->md_int.vr41xx_data->msysint1) | |
931 |
(m->vr41xx_data->sysint2 & m->vr41xx_data->msysint2)) |
(m->md_int.vr41xx_data->sysint2 & m->md_int.vr41xx_data->msysint2)) |
932 |
cpu_interrupt(cpu, 2); |
cpu_interrupt(cpu, 2); |
933 |
else |
else |
934 |
cpu_interrupt_ack(cpu, 2); |
cpu_interrupt_ack(cpu, 2); |
937 |
|
|
938 |
/* |
/* |
939 |
* Playstation 2 interrupt routine: |
* Playstation 2 interrupt routine: |
940 |
|
* |
941 |
|
* irq_nr = 8 + x normal irq x |
942 |
|
* 8 + 16 + y dma irq y |
943 |
|
* 8 + 32 + 0 sbus irq 0 (pcmcia) |
944 |
|
* 8 + 32 + 1 sbus irq 1 (usb) |
945 |
*/ |
*/ |
946 |
void ps2_interrupt(struct machine *m, struct cpu *cpu, int irq_nr, int assrt) |
void ps2_interrupt(struct machine *m, struct cpu *cpu, int irq_nr, int assrt) |
947 |
{ |
{ |
948 |
irq_nr -= 8; |
irq_nr -= 8; |
949 |
debug("ps2_interrupt(): irq_nr=0x%x assrt=%i\n", irq_nr, assrt); |
debug("ps2_interrupt(): irq_nr=0x%x assrt=%i\n", irq_nr, assrt); |
950 |
|
|
951 |
if (assrt) { |
if (irq_nr >= 32) { |
952 |
/* OR into the INTR: */ |
int msk = 0; |
953 |
if (irq_nr < 0x10000) |
switch (irq_nr - 32) { |
954 |
m->ps2_data->intr |= irq_nr; |
case 0: /* PCMCIA: */ |
955 |
|
msk = 0x100; |
956 |
|
break; |
957 |
|
case 1: /* USB: */ |
958 |
|
msk = 0x400; |
959 |
|
break; |
960 |
|
default: |
961 |
|
fatal("ps2_interrupt(): bad irq_nr %i\n", irq_nr); |
962 |
|
} |
963 |
|
|
964 |
|
if (assrt) |
965 |
|
m->md_int.ps2_data->sbus_smflg |= msk; |
966 |
else |
else |
967 |
m->ps2_data->dmac_reg[0x601] |= (irq_nr >> 16); |
m->md_int.ps2_data->sbus_smflg &= ~msk; |
968 |
|
|
969 |
/* Assert interrupt: TODO: masks */ |
if (m->md_int.ps2_data->sbus_smflg != 0) |
970 |
if (irq_nr >= 0x10000) |
cpu_interrupt(cpu, 8 + 1); |
|
cpu_interrupt(cpu, 3); |
|
971 |
else |
else |
972 |
cpu_interrupt(cpu, 2); |
cpu_interrupt_ack(cpu, 8 + 1); |
973 |
|
return; |
974 |
|
} |
975 |
|
|
976 |
|
if (assrt) { |
977 |
|
/* OR into the INTR: */ |
978 |
|
if (irq_nr < 16) |
979 |
|
m->md_int.ps2_data->intr |= (1 << irq_nr); |
980 |
|
else |
981 |
|
m->md_int.ps2_data->dmac_reg[0x601] |= |
982 |
|
(1 << (irq_nr-16)); |
983 |
} else { |
} else { |
984 |
/* AND out of the INTR: */ |
/* AND out of the INTR: */ |
985 |
if (irq_nr < 0x10000) |
if (irq_nr < 16) |
986 |
m->ps2_data->intr &= ~irq_nr; |
m->md_int.ps2_data->intr &= ~(1 << irq_nr); |
987 |
else |
else |
988 |
m->ps2_data->dmac_reg[0x601] &= ~(irq_nr >> 16); |
m->md_int.ps2_data->dmac_reg[0x601] &= |
989 |
|
~(1 << (irq_nr-16)); |
|
/* TODO: masks */ |
|
|
if ((m->ps2_data->intr & 0xffff) == 0) |
|
|
cpu_interrupt_ack(cpu, 2); |
|
|
if ((m->ps2_data->dmac_reg[0x601] & 0xffff) == 0) |
|
|
cpu_interrupt_ack(cpu, 3); |
|
990 |
} |
} |
991 |
|
|
992 |
|
/* TODO: Hm? How about the mask? */ |
993 |
|
if (m->md_int.ps2_data->intr /* & m->md_int.ps2_data->imask */ ) |
994 |
|
cpu_interrupt(cpu, 2); |
995 |
|
else |
996 |
|
cpu_interrupt_ack(cpu, 2); |
997 |
|
|
998 |
|
/* TODO: mask? */ |
999 |
|
if (m->md_int.ps2_data->dmac_reg[0x601] & 0xffff) |
1000 |
|
cpu_interrupt(cpu, 3); |
1001 |
|
else |
1002 |
|
cpu_interrupt_ack(cpu, 3); |
1003 |
} |
} |
1004 |
|
|
1005 |
|
|
1028 |
int ms = irq_nr / 64; |
int ms = irq_nr / 64; |
1029 |
uint32_t new = 1 << ms; |
uint32_t new = 1 << ms; |
1030 |
if (assrt) |
if (assrt) |
1031 |
m->sgi_ip22_data->reg[4] |= new; |
m->md_int.sgi_ip22_data->reg[4] |= new; |
1032 |
else |
else |
1033 |
m->sgi_ip22_data->reg[4] &= ~new; |
m->md_int.sgi_ip22_data->reg[4] &= ~new; |
1034 |
/* TODO: is this enough? */ |
/* TODO: is this enough? */ |
1035 |
irq_nr &= 63; |
irq_nr &= 63; |
1036 |
} |
} |
1037 |
|
|
1038 |
if (irq_nr < 32) { |
if (irq_nr < 32) { |
1039 |
if (assrt) |
if (assrt) |
1040 |
m->sgi_ip22_data->reg[0] |= newmask; |
m->md_int.sgi_ip22_data->reg[0] |= newmask; |
1041 |
else |
else |
1042 |
m->sgi_ip22_data->reg[0] &= ~newmask; |
m->md_int.sgi_ip22_data->reg[0] &= ~newmask; |
1043 |
} else { |
} else { |
1044 |
if (assrt) |
if (assrt) |
1045 |
m->sgi_ip22_data->reg[2] |= newmask; |
m->md_int.sgi_ip22_data->reg[2] |= newmask; |
1046 |
else |
else |
1047 |
m->sgi_ip22_data->reg[2] &= ~newmask; |
m->md_int.sgi_ip22_data->reg[2] &= ~newmask; |
1048 |
} |
} |
1049 |
|
|
1050 |
/* Read stat and mask for local0: */ |
/* Read stat and mask for local0: */ |
1051 |
stat = m->sgi_ip22_data->reg[0]; |
stat = m->md_int.sgi_ip22_data->reg[0]; |
1052 |
mask = m->sgi_ip22_data->reg[1]; |
mask = m->md_int.sgi_ip22_data->reg[1]; |
1053 |
if ((stat & mask) == 0) |
if ((stat & mask) == 0) |
1054 |
cpu_interrupt_ack(cpu, 2); |
cpu_interrupt_ack(cpu, 2); |
1055 |
else |
else |
1056 |
cpu_interrupt(cpu, 2); |
cpu_interrupt(cpu, 2); |
1057 |
|
|
1058 |
/* Read stat and mask for local1: */ |
/* Read stat and mask for local1: */ |
1059 |
stat = m->sgi_ip22_data->reg[2]; |
stat = m->md_int.sgi_ip22_data->reg[2]; |
1060 |
mask = m->sgi_ip22_data->reg[3]; |
mask = m->md_int.sgi_ip22_data->reg[3]; |
1061 |
if ((stat & mask) == 0) |
if ((stat & mask) == 0) |
1062 |
cpu_interrupt_ack(cpu, 3); |
cpu_interrupt_ack(cpu, 3); |
1063 |
else |
else |
1089 |
newmask = (int64_t)1 << irq_nr; |
newmask = (int64_t)1 << irq_nr; |
1090 |
|
|
1091 |
if (assrt) |
if (assrt) |
1092 |
m->sgi_ip30_data->isr |= newmask; |
m->md_int.sgi_ip30_data->isr |= newmask; |
1093 |
else |
else |
1094 |
m->sgi_ip30_data->isr &= ~newmask; |
m->md_int.sgi_ip30_data->isr &= ~newmask; |
1095 |
|
|
1096 |
just_assert_and_such: |
just_assert_and_such: |
1097 |
|
|
1101 |
cpu_interrupt_ack(cpu, 5); |
cpu_interrupt_ack(cpu, 5); |
1102 |
cpu_interrupt_ack(cpu, 6); |
cpu_interrupt_ack(cpu, 6); |
1103 |
|
|
1104 |
stat = m->sgi_ip30_data->isr; |
stat = m->md_int.sgi_ip30_data->isr; |
1105 |
mask = m->sgi_ip30_data->imask0; |
mask = m->md_int.sgi_ip30_data->imask0; |
1106 |
|
|
1107 |
if ((stat & mask) & 0x000000000000ffffULL) |
if ((stat & mask) & 0x000000000000ffffULL) |
1108 |
cpu_interrupt(cpu, 2); |
cpu_interrupt(cpu, 2); |
1133 |
* interrupt 2 should be asserted. |
* interrupt 2 should be asserted. |
1134 |
* |
* |
1135 |
* TODO: how should all this be done nicely? |
* TODO: how should all this be done nicely? |
|
* |
|
|
* TODO: mace interrupt mask |
|
1136 |
*/ |
*/ |
1137 |
|
|
1138 |
uint64_t crime_addr = CRIME_INTSTAT; |
uint64_t crime_addr = CRIME_INTSTAT; |
1139 |
uint64_t mace_addr = 0x14; |
uint64_t mace_addr = 0x10; |
1140 |
uint64_t crime_interrupts, crime_interrupts_mask, mace_interrupts; |
uint64_t crime_interrupts, crime_interrupts_mask; |
1141 |
|
uint64_t mace_interrupts, mace_interrupt_mask; |
1142 |
unsigned int i; |
unsigned int i; |
1143 |
unsigned char x[8]; |
unsigned char x[8]; |
1144 |
|
|
1145 |
|
/* Read current MACE interrupt assertions: */ |
1146 |
|
memcpy(x, m->md_int.ip32.mace_data->reg + mace_addr, |
1147 |
|
sizeof(uint64_t)); |
1148 |
|
mace_interrupts = 0; |
1149 |
|
for (i=0; i<sizeof(uint64_t); i++) { |
1150 |
|
mace_interrupts <<= 8; |
1151 |
|
mace_interrupts |= x[i]; |
1152 |
|
} |
1153 |
|
|
1154 |
|
/* Read current MACE interrupt mask: */ |
1155 |
|
memcpy(x, m->md_int.ip32.mace_data->reg + mace_addr + 8, |
1156 |
|
sizeof(uint64_t)); |
1157 |
|
mace_interrupt_mask = 0; |
1158 |
|
for (i=0; i<sizeof(uint64_t); i++) { |
1159 |
|
mace_interrupt_mask <<= 8; |
1160 |
|
mace_interrupt_mask |= x[i]; |
1161 |
|
} |
1162 |
|
|
1163 |
/* |
/* |
1164 |
* This mapping of both MACE and CRIME interrupts into the same |
* This mapping of both MACE and CRIME interrupts into the same |
1165 |
* 'int' is really ugly. |
* 'int' is really ugly. |
1171 |
* TODO: fix. |
* TODO: fix. |
1172 |
*/ |
*/ |
1173 |
if (irq_nr & MACE_PERIPH_SERIAL) { |
if (irq_nr & MACE_PERIPH_SERIAL) { |
|
/* Read current MACE interrupt bits: */ |
|
|
memcpy(x, m->mace_data->reg + mace_addr, sizeof(uint32_t)); |
|
|
mace_interrupts = 0; |
|
|
for (i=0; i<sizeof(uint32_t); i++) { |
|
|
/* SGI is big-endian... */ |
|
|
mace_interrupts <<= 8; |
|
|
mace_interrupts |= x[i]; |
|
|
} |
|
|
|
|
1174 |
if (assrt) |
if (assrt) |
1175 |
mace_interrupts |= (irq_nr & ~MACE_PERIPH_SERIAL); |
mace_interrupts |= (irq_nr & ~MACE_PERIPH_SERIAL); |
1176 |
else |
else |
1177 |
mace_interrupts &= ~(irq_nr & ~MACE_PERIPH_SERIAL); |
mace_interrupts &= ~(irq_nr & ~MACE_PERIPH_SERIAL); |
1178 |
|
|
|
/* Write back MACE interrupt bits: */ |
|
|
for (i=0; i<4; i++) |
|
|
x[3-i] = mace_interrupts >> (i*8); |
|
|
memcpy(m->mace_data->reg + mace_addr, x, sizeof(uint32_t)); |
|
|
|
|
1179 |
irq_nr = MACE_PERIPH_SERIAL; |
irq_nr = MACE_PERIPH_SERIAL; |
1180 |
if (mace_interrupts == 0) |
if ((mace_interrupts & mace_interrupt_mask) == 0) |
1181 |
assrt = 0; |
assrt = 0; |
1182 |
else |
else |
1183 |
assrt = 1; |
assrt = 1; |
1185 |
|
|
1186 |
/* Hopefully _MISC and _SERIAL will not be both on at the same time. */ |
/* Hopefully _MISC and _SERIAL will not be both on at the same time. */ |
1187 |
if (irq_nr & MACE_PERIPH_MISC) { |
if (irq_nr & MACE_PERIPH_MISC) { |
|
/* Read current MACE interrupt bits: */ |
|
|
memcpy(x, m->mace_data->reg + mace_addr, sizeof(uint32_t)); |
|
|
mace_interrupts = 0; |
|
|
for (i=0; i<sizeof(uint32_t); i++) { |
|
|
/* SGI is big-endian... */ |
|
|
mace_interrupts <<= 8; |
|
|
mace_interrupts |= x[i]; |
|
|
} |
|
|
|
|
1188 |
if (assrt) |
if (assrt) |
1189 |
mace_interrupts |= (irq_nr & ~MACE_PERIPH_MISC); |
mace_interrupts |= (irq_nr & ~MACE_PERIPH_MISC); |
1190 |
else |
else |
1191 |
mace_interrupts &= ~(irq_nr & ~MACE_PERIPH_MISC); |
mace_interrupts &= ~(irq_nr & ~MACE_PERIPH_MISC); |
1192 |
|
|
|
/* Write back MACE interrupt bits: */ |
|
|
for (i=0; i<4; i++) |
|
|
x[3-i] = mace_interrupts >> (i*8); |
|
|
memcpy(m->mace_data->reg + mace_addr, x, sizeof(uint32_t)); |
|
|
|
|
1193 |
irq_nr = MACE_PERIPH_MISC; |
irq_nr = MACE_PERIPH_MISC; |
1194 |
if (mace_interrupts == 0) |
if ((mace_interrupts & mace_interrupt_mask) == 0) |
1195 |
assrt = 0; |
assrt = 0; |
1196 |
else |
else |
1197 |
assrt = 1; |
assrt = 1; |
1198 |
} |
} |
1199 |
|
|
1200 |
|
/* Write back MACE interrupt assertions: */ |
1201 |
|
for (i=0; i<sizeof(uint64_t); i++) |
1202 |
|
x[7-i] = mace_interrupts >> (i*8); |
1203 |
|
memcpy(m->md_int.ip32.mace_data->reg + mace_addr, x, sizeof(uint64_t)); |
1204 |
|
|
1205 |
/* Read CRIME_INTSTAT: */ |
/* Read CRIME_INTSTAT: */ |
1206 |
memcpy(x, m->crime_data->reg + crime_addr, sizeof(uint64_t)); |
memcpy(x, m->md_int.ip32.crime_data->reg + crime_addr, |
1207 |
|
sizeof(uint64_t)); |
1208 |
crime_interrupts = 0; |
crime_interrupts = 0; |
1209 |
for (i=0; i<8; i++) { |
for (i=0; i<sizeof(uint64_t); i++) { |
|
/* SGI is big-endian... */ |
|
1210 |
crime_interrupts <<= 8; |
crime_interrupts <<= 8; |
1211 |
crime_interrupts |= x[i]; |
crime_interrupts |= x[i]; |
1212 |
} |
} |
1217 |
crime_interrupts &= ~irq_nr; |
crime_interrupts &= ~irq_nr; |
1218 |
|
|
1219 |
/* Write back CRIME_INTSTAT: */ |
/* Write back CRIME_INTSTAT: */ |
1220 |
for (i=0; i<8; i++) |
for (i=0; i<sizeof(uint64_t); i++) |
1221 |
x[7-i] = crime_interrupts >> (i*8); |
x[7-i] = crime_interrupts >> (i*8); |
1222 |
memcpy(m->crime_data->reg + crime_addr, x, sizeof(uint64_t)); |
memcpy(m->md_int.ip32.crime_data->reg + crime_addr, x, |
1223 |
|
sizeof(uint64_t)); |
1224 |
|
|
1225 |
/* Read CRIME_INTMASK: */ |
/* Read CRIME_INTMASK: */ |
1226 |
memcpy(x, m->crime_data->reg + CRIME_INTMASK, sizeof(uint64_t)); |
memcpy(x, m->md_int.ip32.crime_data->reg + CRIME_INTMASK, |
1227 |
|
sizeof(uint64_t)); |
1228 |
crime_interrupts_mask = 0; |
crime_interrupts_mask = 0; |
1229 |
for (i=0; i<8; i++) { |
for (i=0; i<sizeof(uint64_t); i++) { |
1230 |
crime_interrupts_mask <<= 8; |
crime_interrupts_mask <<= 8; |
1231 |
crime_interrupts_mask |= x[i]; |
crime_interrupts_mask |= x[i]; |
1232 |
} |
} |
1236 |
else |
else |
1237 |
cpu_interrupt(cpu, 2); |
cpu_interrupt(cpu, 2); |
1238 |
|
|
1239 |
/* printf("sgi_crime_machine_irq(%i,%i): new interrupts = 0x%08x\n", assrt, irq_nr, crime_interrupts); */ |
/* printf("sgi_crime_machine_irq(%i,%i): new interrupts = 0x%08x\n", |
1240 |
|
assrt, irq_nr, crime_interrupts); */ |
1241 |
} |
} |
1242 |
|
|
1243 |
|
|
1270 |
ms = 1 << (irq_nr & 31); |
ms = 1 << (irq_nr & 31); |
1271 |
|
|
1272 |
if (assrt) |
if (assrt) |
1273 |
m->au1x00_ic_data->request0_int |= ms; |
m->md_int.au1x00_ic_data->request0_int |= ms; |
1274 |
else |
else |
1275 |
m->au1x00_ic_data->request0_int &= ~ms; |
m->md_int.au1x00_ic_data->request0_int &= ~ms; |
1276 |
|
|
1277 |
/* TODO: Controller 1 */ |
/* TODO: Controller 1 */ |
1278 |
} |
} |
1279 |
|
|
1280 |
if ((m->au1x00_ic_data->request0_int & |
if ((m->md_int.au1x00_ic_data->request0_int & |
1281 |
m->au1x00_ic_data->mask) != 0) |
m->md_int.au1x00_ic_data->mask) != 0) |
1282 |
cpu_interrupt(cpu, 2); |
cpu_interrupt(cpu, 2); |
1283 |
else |
else |
1284 |
cpu_interrupt_ack(cpu, 2); |
cpu_interrupt_ack(cpu, 2); |
1289 |
} |
} |
1290 |
|
|
1291 |
|
|
1292 |
|
/* |
1293 |
|
* Malta (evbmips) interrupts: |
1294 |
|
* |
1295 |
|
* ISA interrupts. |
1296 |
|
* (irq_nr = 16+8 can be used to just reassert/deassert interrupts.) |
1297 |
|
*/ |
1298 |
|
void malta_interrupt(struct machine *m, struct cpu *cpu, int irq_nr, |
1299 |
|
int assrt) |
1300 |
|
{ |
1301 |
|
int mask; |
1302 |
|
|
1303 |
|
irq_nr -= 8; |
1304 |
|
mask = 1 << (irq_nr & 7); |
1305 |
|
|
1306 |
|
if (irq_nr < 8) { |
1307 |
|
if (assrt) |
1308 |
|
m->md_int.isa_pic_data.pic1->irr |= mask; |
1309 |
|
else |
1310 |
|
m->md_int.isa_pic_data.pic1->irr &= ~mask; |
1311 |
|
} else if (irq_nr < 16) { |
1312 |
|
if (assrt) |
1313 |
|
m->md_int.isa_pic_data.pic2->irr |= mask; |
1314 |
|
else |
1315 |
|
m->md_int.isa_pic_data.pic2->irr &= ~mask; |
1316 |
|
} |
1317 |
|
|
1318 |
|
/* Any interrupt assertions on PIC2 go to irq 2 on PIC1 */ |
1319 |
|
/* (TODO: don't hardcode this here) */ |
1320 |
|
if (m->md_int.isa_pic_data.pic2->irr & |
1321 |
|
~m->md_int.isa_pic_data.pic2->ier) |
1322 |
|
m->md_int.isa_pic_data.pic1->irr |= 0x04; |
1323 |
|
else |
1324 |
|
m->md_int.isa_pic_data.pic1->irr &= ~0x04; |
1325 |
|
|
1326 |
|
/* Now, PIC1: */ |
1327 |
|
if (m->md_int.isa_pic_data.pic1->irr & |
1328 |
|
~m->md_int.isa_pic_data.pic1->ier) |
1329 |
|
cpu_interrupt(cpu, 2); |
1330 |
|
else |
1331 |
|
cpu_interrupt_ack(cpu, 2); |
1332 |
|
|
1333 |
|
/* printf("MALTA: pic1.irr=0x%02x ier=0x%02x pic2.irr=0x%02x " |
1334 |
|
"ier=0x%02x\n", m->md_int.isa_pic_data.pic1->irr, |
1335 |
|
m->md_int.isa_pic_data.pic1->ier, |
1336 |
|
m->md_int.isa_pic_data.pic2->irr, |
1337 |
|
m->md_int.isa_pic_data.pic2->ier); */ |
1338 |
|
} |
1339 |
|
|
1340 |
|
|
1341 |
|
/* |
1342 |
|
* Cobalt interrupts: |
1343 |
|
* |
1344 |
|
* (irq_nr = 8 + 16 can be used to just reassert/deassert interrupts.) |
1345 |
|
*/ |
1346 |
|
void cobalt_interrupt(struct machine *m, struct cpu *cpu, int irq_nr, int assrt) |
1347 |
|
{ |
1348 |
|
int mask; |
1349 |
|
|
1350 |
|
irq_nr -= 8; |
1351 |
|
mask = 1 << (irq_nr & 7); |
1352 |
|
|
1353 |
|
if (irq_nr < 8) { |
1354 |
|
if (assrt) |
1355 |
|
m->md_int.isa_pic_data.pic1->irr |= mask; |
1356 |
|
else |
1357 |
|
m->md_int.isa_pic_data.pic1->irr &= ~mask; |
1358 |
|
} else if (irq_nr < 16) { |
1359 |
|
if (assrt) |
1360 |
|
m->md_int.isa_pic_data.pic2->irr |= mask; |
1361 |
|
else |
1362 |
|
m->md_int.isa_pic_data.pic2->irr &= ~mask; |
1363 |
|
} |
1364 |
|
|
1365 |
|
/* Any interrupt assertions on PIC2 go to irq 2 on PIC1 */ |
1366 |
|
/* (TODO: don't hardcode this here) */ |
1367 |
|
if (m->md_int.isa_pic_data.pic2->irr & |
1368 |
|
~m->md_int.isa_pic_data.pic2->ier) |
1369 |
|
m->md_int.isa_pic_data.pic1->irr |= 0x04; |
1370 |
|
else |
1371 |
|
m->md_int.isa_pic_data.pic1->irr &= ~0x04; |
1372 |
|
|
1373 |
|
/* Now, PIC1: */ |
1374 |
|
if (m->md_int.isa_pic_data.pic1->irr & |
1375 |
|
~m->md_int.isa_pic_data.pic1->ier) |
1376 |
|
cpu_interrupt(cpu, 6); |
1377 |
|
else |
1378 |
|
cpu_interrupt_ack(cpu, 6); |
1379 |
|
|
1380 |
|
/* printf("COBALT: pic1.irr=0x%02x ier=0x%02x pic2.irr=0x%02x " |
1381 |
|
"ier=0x%02x\n", m->md_int.isa_pic_data.pic1->irr, |
1382 |
|
m->md_int.isa_pic_data.pic1->ier, |
1383 |
|
m->md_int.isa_pic_data.pic2->irr, |
1384 |
|
m->md_int.isa_pic_data.pic2->ier); */ |
1385 |
|
} |
1386 |
|
|
1387 |
|
|
1388 |
|
/* |
1389 |
|
* x86 (PC) interrupts: |
1390 |
|
* |
1391 |
|
* (irq_nr = 16 can be used to just reassert/deassert interrupts.) |
1392 |
|
*/ |
1393 |
|
void x86_pc_interrupt(struct machine *m, struct cpu *cpu, int irq_nr, int assrt) |
1394 |
|
{ |
1395 |
|
int mask = 1 << (irq_nr & 7); |
1396 |
|
|
1397 |
|
if (irq_nr < 8) { |
1398 |
|
if (assrt) |
1399 |
|
m->md.pc.pic1->irr |= mask; |
1400 |
|
else |
1401 |
|
m->md.pc.pic1->irr &= ~mask; |
1402 |
|
} else if (irq_nr < 16) { |
1403 |
|
if (m->md.pc.pic2 == NULL) { |
1404 |
|
fatal("x86_pc_interrupt(): pic2 used (irq_nr = %i), " |
1405 |
|
"but we are emulating an XT?\n", irq_nr); |
1406 |
|
return; |
1407 |
|
} |
1408 |
|
if (assrt) |
1409 |
|
m->md.pc.pic2->irr |= mask; |
1410 |
|
else |
1411 |
|
m->md.pc.pic2->irr &= ~mask; |
1412 |
|
} |
1413 |
|
|
1414 |
|
if (m->md.pc.pic2 != NULL) { |
1415 |
|
/* Any interrupt assertions on PIC2 go to irq 2 on PIC1 */ |
1416 |
|
/* (TODO: don't hardcode this here) */ |
1417 |
|
if (m->md.pc.pic2->irr & ~m->md.pc.pic2->ier) |
1418 |
|
m->md.pc.pic1->irr |= 0x04; |
1419 |
|
else |
1420 |
|
m->md.pc.pic1->irr &= ~0x04; |
1421 |
|
} |
1422 |
|
|
1423 |
|
/* Now, PIC1: */ |
1424 |
|
if (m->md.pc.pic1->irr & ~m->md.pc.pic1->ier) |
1425 |
|
cpu->cd.x86.interrupt_asserted = 1; |
1426 |
|
else |
1427 |
|
cpu->cd.x86.interrupt_asserted = 0; |
1428 |
|
} |
1429 |
|
|
1430 |
|
|
1431 |
/**************************************************************************** |
/**************************************************************************** |
1432 |
* * |
* * |
1433 |
* Machine dependant Initialization routines * |
* Machine dependant Initialization routines * |
1447 |
int i, j; |
int i, j; |
1448 |
struct memory *mem; |
struct memory *mem; |
1449 |
char tmpstr[1000]; |
char tmpstr[1000]; |
1450 |
|
struct cons_data *cons_data; |
1451 |
|
|
1452 |
/* DECstation: */ |
/* DECstation: */ |
1453 |
char *framebuffer_console_name, *serial_console_name; |
char *framebuffer_console_name, *serial_console_name; |
1471 |
int hpcmips_fb_ysize_mem = 0; |
int hpcmips_fb_ysize_mem = 0; |
1472 |
|
|
1473 |
/* ARCBIOS stuff: */ |
/* ARCBIOS stuff: */ |
|
struct arcbios_spb arcbios_spb; |
|
|
struct arcbios_spb_64 arcbios_spb_64; |
|
|
struct arcbios_sysid arcbios_sysid; |
|
|
struct arcbios_dsp_stat arcbios_dsp_stat; |
|
|
uint64_t mem_base, mem_count; |
|
|
uint64_t system = 0; |
|
1474 |
uint64_t sgi_ram_offset = 0; |
uint64_t sgi_ram_offset = 0; |
|
uint64_t arc_reserved; |
|
1475 |
int arc_wordlen = sizeof(uint32_t); |
int arc_wordlen = sizeof(uint32_t); |
|
char *short_machine_name = NULL; |
|
1476 |
char *eaddr_string = "eaddr=10:20:30:40:50:60"; /* nonsense */ |
char *eaddr_string = "eaddr=10:20:30:40:50:60"; /* nonsense */ |
1477 |
unsigned char macaddr[6]; |
unsigned char macaddr[6]; |
1478 |
|
|
1479 |
/* Generic bootstring stuff: */ |
/* Generic bootstring stuff: */ |
1480 |
int bootdev_id = diskimage_bootdev(machine); |
int bootdev_type = 0; |
1481 |
|
int bootdev_id; |
1482 |
char *bootstr = NULL; |
char *bootstr = NULL; |
1483 |
char *bootarg = NULL; |
char *bootarg = NULL; |
1484 |
char *init_bootpath; |
char *init_bootpath; |
1493 |
struct cpu *cpu = machine->cpus[machine->bootstrap_cpu]; |
struct cpu *cpu = machine->cpus[machine->bootstrap_cpu]; |
1494 |
|
|
1495 |
|
|
1496 |
|
bootdev_id = diskimage_bootdev(machine, &bootdev_type); |
1497 |
|
|
1498 |
mem = cpu->mem; |
mem = cpu->mem; |
1499 |
machine->machine_name = NULL; |
machine->machine_name = NULL; |
1500 |
|
|
1520 |
printf("\nNo emulation type specified.\n"); |
printf("\nNo emulation type specified.\n"); |
1521 |
exit(1); |
exit(1); |
1522 |
|
|
1523 |
|
#ifdef ENABLE_MIPS |
1524 |
case MACHINE_BAREMIPS: |
case MACHINE_BAREMIPS: |
1525 |
/* |
/* |
1526 |
* A "bare" MIPS test machine. |
* A "bare" MIPS test machine. |
1533 |
|
|
1534 |
case MACHINE_TESTMIPS: |
case MACHINE_TESTMIPS: |
1535 |
/* |
/* |
1536 |
* A MIPS test machine (which happens to work with my |
* A MIPS test machine (which happens to work with the |
1537 |
* thesis work). |
* code in my master's thesis). :-) |
1538 |
|
* |
1539 |
|
* IRQ map: |
1540 |
|
* 7 CPU counter |
1541 |
|
* 6 SMP IPIs |
1542 |
|
* 5 not used yet |
1543 |
|
* 4 not used yet |
1544 |
|
* 3 ethernet |
1545 |
|
* 2 serial console |
1546 |
*/ |
*/ |
1547 |
cpu->byte_order = EMUL_BIG_ENDIAN; |
cpu->byte_order = EMUL_BIG_ENDIAN; |
1548 |
machine->machine_name = "MIPS test machine"; |
machine->machine_name = "MIPS test machine"; |
1549 |
|
|
1550 |
machine->main_console_handle = dev_cons_init( |
snprintf(tmpstr, sizeof(tmpstr), "cons addr=0x%llx irq=2", |
1551 |
machine, mem, DEV_CONS_ADDRESS, "console", 2); |
(long long)DEV_CONS_ADDRESS); |
1552 |
|
cons_data = device_add(machine, tmpstr); |
1553 |
|
machine->main_console_handle = cons_data->console_handle; |
1554 |
|
|
1555 |
snprintf(tmpstr, sizeof(tmpstr) - 1, "mp addr=0x%llx", |
snprintf(tmpstr, sizeof(tmpstr), "mp addr=0x%llx", |
1556 |
(long long)DEV_MP_ADDRESS); |
(long long)DEV_MP_ADDRESS); |
1557 |
device_add(machine, tmpstr); |
device_add(machine, tmpstr); |
1558 |
|
|
1559 |
fb = dev_fb_init(machine, mem, 0x12000000, VFB_GENERIC, |
fb = dev_fb_init(machine, mem, DEV_FB_ADDRESS, VFB_GENERIC, |
1560 |
640,480, 640,480, 24, "generic", 1); |
640,480, 640,480, 24, "testmips generic"); |
1561 |
|
|
1562 |
|
snprintf(tmpstr, sizeof(tmpstr), "disk addr=0x%llx", |
1563 |
|
(long long)DEV_DISK_ADDRESS); |
1564 |
|
device_add(machine, tmpstr); |
1565 |
|
|
1566 |
|
snprintf(tmpstr, sizeof(tmpstr), "ether addr=0x%llx irq=3", |
1567 |
|
(long long)DEV_ETHER_ADDRESS); |
1568 |
|
device_add(machine, tmpstr); |
1569 |
|
|
1570 |
break; |
break; |
1571 |
|
|
1572 |
case MACHINE_DEC: |
case MACHINE_DEC: |
1608 |
*/ |
*/ |
1609 |
fb = dev_fb_init(machine, mem, KN01_PHYS_FBUF_START, |
fb = dev_fb_init(machine, mem, KN01_PHYS_FBUF_START, |
1610 |
color_fb_flag? VFB_DEC_VFB02 : VFB_DEC_VFB01, |
color_fb_flag? VFB_DEC_VFB02 : VFB_DEC_VFB01, |
1611 |
0,0,0,0,0, color_fb_flag? "VFB02":"VFB01", 1); |
0,0,0,0,0, color_fb_flag? "VFB02":"VFB01"); |
1612 |
dev_colorplanemask_init(mem, KN01_PHYS_COLMASK_START, &fb->color_plane_mask); |
dev_colorplanemask_init(mem, KN01_PHYS_COLMASK_START, &fb->color_plane_mask); |
1613 |
dev_vdac_init(mem, KN01_SYS_VDAC, fb->rgb_palette, color_fb_flag); |
dev_vdac_init(mem, KN01_SYS_VDAC, fb->rgb_palette, color_fb_flag); |
1614 |
dev_le_init(machine, mem, KN01_SYS_LANCE, KN01_SYS_LANCE_B_START, KN01_SYS_LANCE_B_END, KN01_INT_LANCE, 4*1048576); |
dev_le_init(machine, mem, KN01_SYS_LANCE, KN01_SYS_LANCE_B_START, KN01_SYS_LANCE_B_END, KN01_INT_LANCE, 4*1048576); |
1698 |
dev_mc146818_init(machine, mem, |
dev_mc146818_init(machine, mem, |
1699 |
KN02_SYS_CLOCK, KN02_INT_CLOCK, MC146818_DEC, 1); |
KN02_SYS_CLOCK, KN02_INT_CLOCK, MC146818_DEC, 1); |
1700 |
|
|
1701 |
machine->kn02_csr = |
machine->md_int.kn02_csr = |
1702 |
dev_kn02_init(cpu, mem, KN02_SYS_CSR); |
dev_kn02_init(cpu, mem, KN02_SYS_CSR); |
1703 |
|
|
1704 |
framebuffer_console_name = "osconsole=0,7"; |
framebuffer_console_name = "osconsole=0,7"; |
1732 |
* asc0 at ioasic0 offset 0x300000: NCR53C94, 25MHz, SCSI ID 7 (0x1c300000) slot 12 |
* asc0 at ioasic0 offset 0x300000: NCR53C94, 25MHz, SCSI ID 7 (0x1c300000) slot 12 |
1733 |
* dma for asc0 (0x1c380000) slot 14 |
* dma for asc0 (0x1c380000) slot 14 |
1734 |
*/ |
*/ |
1735 |
machine->dec_ioasic_data = dev_dec_ioasic_init(cpu, mem, 0x1c000000, 0); |
machine->md_int.dec_ioasic_data = dev_dec_ioasic_init(cpu, mem, 0x1c000000, 0); |
1736 |
dev_le_init(machine, mem, 0x1c0c0000, 0, 0, KMIN_INTR_LANCE +8, 4*65536); |
dev_le_init(machine, mem, 0x1c0c0000, 0, 0, KMIN_INTR_LANCE +8, 4*65536); |
1737 |
dev_scc_init(machine, mem, 0x1c100000, KMIN_INTR_SCC_0 +8, machine->use_x11, 0, 1); |
dev_scc_init(machine, mem, 0x1c100000, KMIN_INTR_SCC_0 +8, machine->use_x11, 0, 1); |
1738 |
dev_scc_init(machine, mem, 0x1c180000, KMIN_INTR_SCC_1 +8, machine->use_x11, 1, 1); |
dev_scc_init(machine, mem, 0x1c180000, KMIN_INTR_SCC_1 +8, machine->use_x11, 1, 1); |
1798 |
* mcclock0 at ioasic0 offset 0x200000: mc146818 or compatible (0x1fa00000) |
* mcclock0 at ioasic0 offset 0x200000: mc146818 or compatible (0x1fa00000) |
1799 |
* asc0 at ioasic0 offset 0x300000: NCR53C94, 25MHz, SCSI ID 7 (0x1fb00000) |
* asc0 at ioasic0 offset 0x300000: NCR53C94, 25MHz, SCSI ID 7 (0x1fb00000) |
1800 |
*/ |
*/ |
1801 |
machine->dec_ioasic_data = dev_dec_ioasic_init(cpu, mem, 0x1f800000, 0); |
machine->md_int.dec_ioasic_data = dev_dec_ioasic_init(cpu, mem, 0x1f800000, 0); |
1802 |
|
|
1803 |
dev_le_init(machine, mem, KN03_SYS_LANCE, 0, 0, KN03_INTR_LANCE +8, 4*65536); |
dev_le_init(machine, mem, KN03_SYS_LANCE, 0, 0, KN03_INTR_LANCE +8, 4*65536); |
1804 |
|
|
1805 |
machine->dec_ioasic_data->dma_func[3] = dev_scc_dma_func; |
machine->md_int.dec_ioasic_data->dma_func[3] = dev_scc_dma_func; |
1806 |
machine->dec_ioasic_data->dma_func_extra[2] = dev_scc_init(machine, mem, KN03_SYS_SCC_0, KN03_INTR_SCC_0 +8, machine->use_x11, 0, 1); |
machine->md_int.dec_ioasic_data->dma_func_extra[2] = dev_scc_init(machine, mem, KN03_SYS_SCC_0, KN03_INTR_SCC_0 +8, machine->use_x11, 0, 1); |
1807 |
machine->dec_ioasic_data->dma_func[2] = dev_scc_dma_func; |
machine->md_int.dec_ioasic_data->dma_func[2] = dev_scc_dma_func; |
1808 |
machine->dec_ioasic_data->dma_func_extra[3] = dev_scc_init(machine, mem, KN03_SYS_SCC_1, KN03_INTR_SCC_1 +8, machine->use_x11, 1, 1); |
machine->md_int.dec_ioasic_data->dma_func_extra[3] = dev_scc_init(machine, mem, KN03_SYS_SCC_1, KN03_INTR_SCC_1 +8, machine->use_x11, 1, 1); |
1809 |
|
|
1810 |
dev_mc146818_init(machine, mem, KN03_SYS_CLOCK, KN03_INT_RTC, MC146818_DEC, 1); |
dev_mc146818_init(machine, mem, KN03_SYS_CLOCK, KN03_INT_RTC, MC146818_DEC, 1); |
1811 |
dev_asc_init(machine, mem, KN03_SYS_SCSI, |
dev_asc_init(machine, mem, KN03_SYS_SCSI, |
1864 |
* Clock uses interrupt 3 (shared with XMI?). |
* Clock uses interrupt 3 (shared with XMI?). |
1865 |
*/ |
*/ |
1866 |
|
|
1867 |
machine->dec5800_csr = dev_dec5800_init(machine, mem, 0x10000000); |
machine->md_int.dec5800_csr = dev_dec5800_init(machine, mem, 0x10000000); |
1868 |
dev_decbi_init(mem, 0x10000000); |
dev_decbi_init(mem, 0x10000000); |
1869 |
dev_ssc_init(machine, mem, 0x10140000, 2, machine->use_x11, &machine->dec5800_csr->csr); |
dev_ssc_init(machine, mem, 0x10140000, 2, machine->use_x11, &machine->md_int.dec5800_csr->csr); |
1870 |
dev_decxmi_init(mem, 0x11800000); |
dev_decxmi_init(mem, 0x11800000); |
1871 |
dev_deccca_init(mem, DEC_DECCCA_BASEADDR); |
dev_deccca_init(mem, DEC_DECCCA_BASEADDR); |
1872 |
|
|
1935 |
* asc0 at ioasic0 offset 0x300000: NCR53C94, 25MHz, SCSI ID 7 (0x1c300000) |
* asc0 at ioasic0 offset 0x300000: NCR53C94, 25MHz, SCSI ID 7 (0x1c300000) |
1936 |
* xcfb0 at tc0 slot 2 offset 0x0: 1024x768x8 built-in framebuffer (0xa000000) |
* xcfb0 at tc0 slot 2 offset 0x0: 1024x768x8 built-in framebuffer (0xa000000) |
1937 |
*/ |
*/ |
1938 |
machine->dec_ioasic_data = dev_dec_ioasic_init(cpu, mem, 0x1c000000, 0); |
machine->md_int.dec_ioasic_data = dev_dec_ioasic_init(cpu, mem, 0x1c000000, 0); |
1939 |
|
|
1940 |
/* TURBOchannel slots (0 and 1): */ |
/* TURBOchannel slots (0 and 1): */ |
1941 |
dev_turbochannel_init(machine, mem, 0, |
dev_turbochannel_init(machine, mem, 0, |
2040 |
dev_le_init(machine, mem, KN230_SYS_LANCE, KN230_SYS_LANCE_B_START, KN230_SYS_LANCE_B_END, KN230_CSR_INTR_LANCE, 4*1048576); |
dev_le_init(machine, mem, KN230_SYS_LANCE, KN230_SYS_LANCE_B_START, KN230_SYS_LANCE_B_END, KN230_CSR_INTR_LANCE, 4*1048576); |
2041 |
dev_sii_init(machine, mem, KN230_SYS_SII, KN230_SYS_SII_B_START, KN230_SYS_SII_B_END, KN230_CSR_INTR_SII); |
dev_sii_init(machine, mem, KN230_SYS_SII, KN230_SYS_SII_B_START, KN230_SYS_SII_B_END, KN230_CSR_INTR_SII); |
2042 |
|
|
2043 |
snprintf(tmpstr, sizeof(tmpstr) - 1, |
snprintf(tmpstr, sizeof(tmpstr), |
2044 |
"kn230 addr=0x%llx", (long long)KN230_SYS_ICSR); |
"kn230 addr=0x%llx", (long long)KN230_SYS_ICSR); |
2045 |
machine->kn230_csr = device_add(machine, tmpstr); |
machine->md_int.kn230_csr = device_add(machine, tmpstr); |
2046 |
|
|
2047 |
serial_console_name = "osconsole=0"; |
serial_console_name = "osconsole=0"; |
2048 |
break; |
break; |
2121 |
|
|
2122 |
#if 0 |
#if 0 |
2123 |
if (machine->machine_subtype == MACHINE_DEC_PMAX_3100) |
if (machine->machine_subtype == MACHINE_DEC_PMAX_3100) |
2124 |
strcpy(bootpath, "rz(0,0,0)"); |
strlcpy(bootpath, "rz(0,0,0)", sizeof(bootpath)); |
2125 |
else |
else |
2126 |
#endif |
#endif |
2127 |
strcpy(bootpath, "5/rz1/"); |
strlcpy(bootpath, "5/rz1/", sizeof(bootpath)); |
2128 |
|
|
2129 |
if (bootdev_id < 0 || machine->force_netboot) { |
if (bootdev_id < 0 || machine->force_netboot) { |
2130 |
/* tftp boot: */ |
/* tftp boot: */ |
2131 |
strcpy(bootpath, "5/tftp/"); |
strlcpy(bootpath, "5/tftp/", sizeof(bootpath)); |
2132 |
bootpath[0] = '0' + boot_net_boardnumber; |
bootpath[0] = '0' + boot_net_boardnumber; |
2133 |
} else { |
} else { |
2134 |
/* disk boot: */ |
/* disk boot: */ |
2135 |
bootpath[0] = '0' + boot_scsi_boardnumber; |
bootpath[0] = '0' + boot_scsi_boardnumber; |
2136 |
if (diskimage_is_a_tape(machine, bootdev_id)) |
if (diskimage_is_a_tape(machine, bootdev_id, |
2137 |
|
bootdev_type)) |
2138 |
bootpath[2] = 't'; |
bootpath[2] = 't'; |
2139 |
bootpath[4] = '0' + bootdev_id; |
bootpath[4] = '0' + bootdev_id; |
2140 |
} |
} |
2142 |
init_bootpath = bootpath; |
init_bootpath = bootpath; |
2143 |
} |
} |
2144 |
|
|
2145 |
bootarg = malloc(strlen(init_bootpath) + |
bootarg = malloc(BOOTARG_BUFLEN); |
2146 |
strlen(machine->boot_kernel_filename) + 1 + |
if (bootarg == NULL) { |
2147 |
strlen(machine->boot_string_argument) + 1); |
fprintf(stderr, "out of memory\n"); |
2148 |
strcpy(bootarg, init_bootpath); |
exit(1); |
2149 |
strcat(bootarg, machine->boot_kernel_filename); |
} |
2150 |
|
strlcpy(bootarg, init_bootpath, BOOTARG_BUFLEN); |
2151 |
|
if (strlcat(bootarg, machine->boot_kernel_filename, |
2152 |
|
BOOTARG_BUFLEN) > BOOTARG_BUFLEN) { |
2153 |
|
fprintf(stderr, "bootarg truncated?\n"); |
2154 |
|
exit(1); |
2155 |
|
} |
2156 |
|
|
2157 |
bootstr = "boot"; |
bootstr = "boot"; |
2158 |
|
|
2167 |
cpu->cd.mips.gpr[MIPS_GPR_A0] --; |
cpu->cd.mips.gpr[MIPS_GPR_A0] --; |
2168 |
|
|
2169 |
if (machine->boot_string_argument[0] != '\0') { |
if (machine->boot_string_argument[0] != '\0') { |
2170 |
strcat(bootarg, " "); |
strlcat(bootarg, " ", BOOTARG_BUFLEN); |
2171 |
strcat(bootarg, machine->boot_string_argument); |
if (strlcat(bootarg, machine->boot_string_argument, |
2172 |
|
BOOTARG_BUFLEN) >= BOOTARG_BUFLEN) { |
2173 |
|
fprintf(stderr, "bootstr truncated?\n"); |
2174 |
|
exit(1); |
2175 |
|
} |
2176 |
} |
} |
2177 |
|
|
2178 |
xx.a.common.next = (char *)&xx.b - (char *)&xx; |
xx.a.common.next = (char *)&xx.b - (char *)&xx; |
2181 |
|
|
2182 |
xx.b.common.next = (char *)&xx.c - (char *)&xx.b; |
xx.b.common.next = (char *)&xx.c - (char *)&xx.b; |
2183 |
xx.b.common.type = BTINFO_BOOTPATH; |
xx.b.common.type = BTINFO_BOOTPATH; |
2184 |
strcpy(xx.b.bootpath, bootstr); |
strlcpy(xx.b.bootpath, bootstr, sizeof(xx.b.bootpath)); |
2185 |
|
|
2186 |
xx.c.common.next = 0; |
xx.c.common.next = 0; |
2187 |
xx.c.common.type = BTINFO_SYMTAB; |
xx.c.common.type = BTINFO_SYMTAB; |
2222 |
*/ |
*/ |
2223 |
{ |
{ |
2224 |
char tmps[300]; |
char tmps[300]; |
2225 |
sprintf(tmps, "cca=%x", |
snprintf(tmps, sizeof(tmps), "cca=%x", |
2226 |
(int)(DEC_DECCCA_BASEADDR + 0xa0000000ULL)); |
(int)(DEC_DECCCA_BASEADDR + 0xa0000000ULL)); |
2227 |
add_environment_string(cpu, tmps, &addr); |
add_environment_string(cpu, tmps, &addr); |
2228 |
} |
} |
2229 |
|
|
2230 |
/* These are needed for Sprite to boot: */ |
/* These are needed for Sprite to boot: */ |
2231 |
{ |
{ |
2232 |
char tmps[300]; |
char tmps[500]; |
2233 |
|
|
2234 |
sprintf(tmps, "boot=%s", bootarg); |
snprintf(tmps, sizeof(tmps), "boot=%s", bootarg); |
2235 |
|
tmps[sizeof(tmps)-1] = '\0'; |
2236 |
add_environment_string(cpu, tmps, &addr); |
add_environment_string(cpu, tmps, &addr); |
2237 |
|
|
2238 |
sprintf(tmps, "bitmap=0x%x", (uint32_t)(( |
snprintf(tmps, sizeof(tmps), "bitmap=0x%x", (uint32_t)(( |
2239 |
DEC_MEMMAP_ADDR + sizeof(memmap.pagesize)) |
DEC_MEMMAP_ADDR + sizeof(memmap.pagesize)) |
2240 |
& 0xffffffffULL)); |
& 0xffffffffULL)); |
2241 |
|
tmps[sizeof(tmps)-1] = '\0'; |
2242 |
add_environment_string(cpu, tmps, &addr); |
add_environment_string(cpu, tmps, &addr); |
2243 |
|
|
2244 |
sprintf(tmps, "bitmaplen=0x%x", |
snprintf(tmps, sizeof(tmps), "bitmaplen=0x%x", |
2245 |
machine->physical_ram_in_mb * 1048576 / 4096 / 8); |
machine->physical_ram_in_mb * 1048576 / 4096 / 8); |
2246 |
|
tmps[sizeof(tmps)-1] = '\0'; |
2247 |
add_environment_string(cpu, tmps, &addr); |
add_environment_string(cpu, tmps, &addr); |
2248 |
} |
} |
2249 |
|
|
2279 |
* 4 Tulip 1 |
* 4 Tulip 1 |
2280 |
* 5 16550 UART (serial console) |
* 5 16550 UART (serial console) |
2281 |
* 6 VIA southbridge PIC |
* 6 VIA southbridge PIC |
2282 |
* 7 PCI |
* 7 PCI (Note: Not used. The PCI controller |
2283 |
|
* interrupts at ISA interrupt 9.) |
2284 |
*/ |
*/ |
2285 |
/* dev_XXX_init(cpu, mem, 0x10000000, machine->emulated_hz); */ |
|
2286 |
|
/* ISA interrupt controllers: */ |
2287 |
|
snprintf(tmpstr, sizeof(tmpstr), "8259 irq=24 addr=0x10000020"); |
2288 |
|
machine->md_int.isa_pic_data.pic1 = device_add(machine, tmpstr); |
2289 |
|
snprintf(tmpstr, sizeof(tmpstr), "8259 irq=24 addr=0x100000a0"); |
2290 |
|
machine->md_int.isa_pic_data.pic2 = device_add(machine, tmpstr); |
2291 |
|
machine->md_interrupt = cobalt_interrupt; |
2292 |
|
|
2293 |
dev_mc146818_init(machine, mem, 0x10000070, 0, MC146818_PC_CMOS, 4); |
dev_mc146818_init(machine, mem, 0x10000070, 0, MC146818_PC_CMOS, 4); |
2294 |
machine->main_console_handle = dev_ns16550_init(machine, mem, |
|
2295 |
0x1c800000, 5, 1, 1, "serial console"); |
machine->main_console_handle = (size_t) |
2296 |
|
device_add(machine, "ns16550 irq=5 addr=0x1c800000 name2=tty0 in_use=1"); |
2297 |
|
|
2298 |
|
#if 0 |
2299 |
|
device_add(machine, "ns16550 irq=0 addr=0x1f000010 name2=tty1 in_use=0"); |
2300 |
|
#endif |
2301 |
|
|
2302 |
/* |
/* |
2303 |
* According to NetBSD/cobalt: |
* According to NetBSD/cobalt: |
2308 |
* pcib0 at pci0 dev 9 function 0, VIA Technologies VT82C586 (Apollo VP) PCI-ISA Bridge, rev 37 |
* pcib0 at pci0 dev 9 function 0, VIA Technologies VT82C586 (Apollo VP) PCI-ISA Bridge, rev 37 |
2309 |
* pciide0 at pci0 dev 9 function 1: VIA Technologies VT82C586 (Apollo VP) ATA33 cr |
* pciide0 at pci0 dev 9 function 1: VIA Technologies VT82C586 (Apollo VP) ATA33 cr |
2310 |
* tlp1 at pci0 dev 12 function 0: DECchip 21143 Ethernet, pass 4.1 |
* tlp1 at pci0 dev 12 function 0: DECchip 21143 Ethernet, pass 4.1 |
2311 |
|
* |
2312 |
|
* The PCI controller interrupts at ISA interrupt 9. |
2313 |
*/ |
*/ |
2314 |
pci_data = dev_gt_init(machine, mem, 0x14000000, 2, 6); /* 7 for PCI, not 6? */ |
pci_data = dev_gt_init(machine, mem, 0x14000000, 2, 8 + 9, 11); |
2315 |
/* bus_pci_add(machine, pci_data, mem, 0, 7, 0, pci_dec21143_init, pci_dec21143_rr); */ |
/* bus_pci_add(machine, pci_data, mem, 0, 7, 0, pci_dec21143_init, pci_dec21143_rr); */ |
2316 |
bus_pci_add(machine, pci_data, mem, 0, 8, 0, NULL, NULL); /* PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_860 */ |
bus_pci_add(machine, pci_data, mem, 0, 8, 0, NULL, NULL); /* PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_860 */ |
2317 |
bus_pci_add(machine, pci_data, mem, 0, 9, 0, pci_vt82c586_isa_init, pci_vt82c586_isa_rr); |
bus_pci_add(machine, pci_data, mem, 0, 9, 0, pci_vt82c586_isa_init, pci_vt82c586_isa_rr); |
2322 |
* NetBSD/cobalt expects memsize in a0, but it seems that what |
* NetBSD/cobalt expects memsize in a0, but it seems that what |
2323 |
* it really wants is the end of memory + 0x80000000. |
* it really wants is the end of memory + 0x80000000. |
2324 |
* |
* |
2325 |
* The bootstring should be stored starting 512 bytes before end |
* The bootstring is stored 512 bytes before the end of |
2326 |
* of physical ram. |
* physical ram. |
2327 |
*/ |
*/ |
2328 |
cpu->cd.mips.gpr[MIPS_GPR_A0] = machine->physical_ram_in_mb * 1048576 + 0x80000000; |
cpu->cd.mips.gpr[MIPS_GPR_A0] = |
2329 |
|
machine->physical_ram_in_mb * 1048576 + 0xffffffff80000000ULL; |
2330 |
bootstr = "root=/dev/hda1 ro"; |
bootstr = "root=/dev/hda1 ro"; |
2331 |
/* bootstr = "nfsroot=/usr/cobalt/"; */ |
/* bootstr = "nfsroot=/usr/cobalt/"; */ |
2332 |
store_string(cpu, 0xffffffff80000000ULL + |
/* TODO: bootarg, and/or automagic boot device detection */ |
2333 |
machine->physical_ram_in_mb * 1048576 - 512, bootstr); |
store_string(cpu, cpu->cd.mips.gpr[MIPS_GPR_A0] - 512, bootstr); |
2334 |
break; |
break; |
2335 |
|
|
2336 |
case MACHINE_HPCMIPS: |
case MACHINE_HPCMIPS: |
2367 |
hpcmips_fb_bits = 15; |
hpcmips_fb_bits = 15; |
2368 |
hpcmips_fb_encoding = BIFB_D16_0000; |
hpcmips_fb_encoding = BIFB_D16_0000; |
2369 |
|
|
2370 |
machine->main_console_handle = dev_ns16550_init( |
/* TODO: irq? */ |
2371 |
machine, mem, 0xa008680, 0, 4, |
snprintf(tmpstr, sizeof(tmpstr), "ns16550 irq=0 addr=0x0a008680 addr_mult=4 in_use=%i", machine->use_x11? 0 : 1); |
2372 |
machine->use_x11? 0 : 1, "serial console"); /* TODO: irq? */ |
machine->main_console_handle = (size_t)device_add(machine, tmpstr); |
2373 |
machine->vr41xx_data = dev_vr41xx_init(machine, mem, 4131); |
|
2374 |
|
machine->md_int.vr41xx_data = dev_vr41xx_init(machine, mem, 4131); |
2375 |
machine->md_interrupt = vr41xx_interrupt; |
machine->md_interrupt = vr41xx_interrupt; |
2376 |
|
|
2377 |
store_32bit_word_in_host(cpu, (unsigned char *)&hpc_bootinfo.platid_cpu, |
store_32bit_word_in_host(cpu, (unsigned char *)&hpc_bootinfo.platid_cpu, |
2399 |
hpcmips_fb_bits = 16; |
hpcmips_fb_bits = 16; |
2400 |
hpcmips_fb_encoding = BIFB_D16_0000; |
hpcmips_fb_encoding = BIFB_D16_0000; |
2401 |
|
|
2402 |
machine->main_console_handle = dev_ns16550_init( |
/* TODO: irq? */ |
2403 |
machine, mem, 0xa008680, 0, 4, |
snprintf(tmpstr, sizeof(tmpstr), "ns16550 irq=0 addr=0x0a008680 addr_mult=4 in_use=%i", machine->use_x11? 0 : 1); |
2404 |
machine->use_x11? 0 : 1, "serial console"); /* TODO: irq? */ |
machine->main_console_handle = (size_t)device_add(machine, tmpstr); |
2405 |
machine->vr41xx_data = dev_vr41xx_init(machine, mem, 4121); |
|
2406 |
|
machine->md_int.vr41xx_data = dev_vr41xx_init(machine, mem, 4121); |
2407 |
machine->md_interrupt = vr41xx_interrupt; |
machine->md_interrupt = vr41xx_interrupt; |
2408 |
|
|
2409 |
store_32bit_word_in_host(cpu, (unsigned char *)&hpc_bootinfo.platid_cpu, |
store_32bit_word_in_host(cpu, (unsigned char *)&hpc_bootinfo.platid_cpu, |
2431 |
hpcmips_fb_bits = 16; |
hpcmips_fb_bits = 16; |
2432 |
hpcmips_fb_encoding = BIFB_D16_0000; |
hpcmips_fb_encoding = BIFB_D16_0000; |
2433 |
|
|
2434 |
machine->vr41xx_data = dev_vr41xx_init(machine, mem, 4121); |
machine->md_int.vr41xx_data = dev_vr41xx_init(machine, mem, 4121); |
2435 |
machine->md_interrupt = vr41xx_interrupt; |
machine->md_interrupt = vr41xx_interrupt; |
2436 |
|
|
2437 |
store_32bit_word_in_host(cpu, (unsigned char *)&hpc_bootinfo.platid_cpu, |
store_32bit_word_in_host(cpu, (unsigned char *)&hpc_bootinfo.platid_cpu, |
2459 |
hpcmips_fb_bits = 16; |
hpcmips_fb_bits = 16; |
2460 |
hpcmips_fb_encoding = BIFB_D16_0000; |
hpcmips_fb_encoding = BIFB_D16_0000; |
2461 |
|
|
2462 |
machine->vr41xx_data = dev_vr41xx_init(machine, mem, 4121); |
machine->md_int.vr41xx_data = dev_vr41xx_init(machine, mem, 4121); |
2463 |
machine->md_interrupt = vr41xx_interrupt; |
machine->md_interrupt = vr41xx_interrupt; |
2464 |
|
|
2465 |
store_32bit_word_in_host(cpu, (unsigned char *)&hpc_bootinfo.platid_cpu, |
store_32bit_word_in_host(cpu, (unsigned char *)&hpc_bootinfo.platid_cpu, |
2487 |
hpcmips_fb_bits = 16; |
hpcmips_fb_bits = 16; |
2488 |
hpcmips_fb_encoding = BIFB_D16_0000; |
hpcmips_fb_encoding = BIFB_D16_0000; |
2489 |
|
|
2490 |
machine->vr41xx_data = dev_vr41xx_init(machine, mem, 4121); |
machine->md_int.vr41xx_data = dev_vr41xx_init(machine, mem, 4121); |
2491 |
machine->md_interrupt = vr41xx_interrupt; |
machine->md_interrupt = vr41xx_interrupt; |
2492 |
|
|
2493 |
store_32bit_word_in_host(cpu, (unsigned char *)&hpc_bootinfo.platid_cpu, |
store_32bit_word_in_host(cpu, (unsigned char *)&hpc_bootinfo.platid_cpu, |
2515 |
hpcmips_fb_bits = 16; |
hpcmips_fb_bits = 16; |
2516 |
hpcmips_fb_encoding = BIFB_D16_0000; |
hpcmips_fb_encoding = BIFB_D16_0000; |
2517 |
|
|
2518 |
machine->vr41xx_data = dev_vr41xx_init(machine, mem, 4121); |
machine->md_int.vr41xx_data = dev_vr41xx_init(machine, mem, 4121); |
2519 |
machine->md_interrupt = vr41xx_interrupt; |
machine->md_interrupt = vr41xx_interrupt; |
2520 |
|
|
2521 |
store_32bit_word_in_host(cpu, (unsigned char *)&hpc_bootinfo.platid_cpu, |
store_32bit_word_in_host(cpu, (unsigned char *)&hpc_bootinfo.platid_cpu, |
2543 |
hpcmips_fb_bits = 4; |
hpcmips_fb_bits = 4; |
2544 |
hpcmips_fb_encoding = BIFB_D4_M2L_F; |
hpcmips_fb_encoding = BIFB_D4_M2L_F; |
2545 |
|
|
2546 |
machine->vr41xx_data = dev_vr41xx_init(machine, mem, 4181); |
machine->md_int.vr41xx_data = dev_vr41xx_init(machine, mem, 4181); |
2547 |
machine->md_interrupt = vr41xx_interrupt; |
machine->md_interrupt = vr41xx_interrupt; |
2548 |
|
|
2549 |
/* TODO: Hm... irq 17 according to linux, but |
/* TODO: Hm... irq 17 according to linux, but |
2550 |
VRIP_INTR_SIU (=9) here? */ |
VRIP_INTR_SIU (=9) here? */ |
2551 |
{ |
{ |
2552 |
int x; |
int x; |
2553 |
x = dev_ns16550_init(machine, mem, 0x0c000010, |
snprintf(tmpstr, sizeof(tmpstr), "ns16550 irq=%i addr=0x0c000010", 8 + VRIP_INTR_SIU); |
2554 |
8 + VRIP_INTR_SIU, 1, 1, "serial 0"); |
x = (size_t)device_add(machine, tmpstr); |
2555 |
|
|
2556 |
if (!machine->use_x11) |
if (!machine->use_x11) |
2557 |
machine->main_console_handle = x; |
machine->main_console_handle = x; |
2574 |
break; |
break; |
2575 |
case MACHINE_HPCMIPS_IBM_WORKPAD_Z50: |
case MACHINE_HPCMIPS_IBM_WORKPAD_Z50: |
2576 |
/* 131 MHz VR4121 */ |
/* 131 MHz VR4121 */ |
2577 |
machine->machine_name = "Agenda VR3"; |
machine->machine_name = "IBM Workpad Z50"; |
2578 |
/* TODO: */ |
/* TODO: */ |
2579 |
hpcmips_fb_addr = 0xa000000; |
hpcmips_fb_addr = 0xa000000; |
2580 |
hpcmips_fb_xsize = 640; |
hpcmips_fb_xsize = 640; |
2584 |
hpcmips_fb_bits = 16; |
hpcmips_fb_bits = 16; |
2585 |
hpcmips_fb_encoding = BIFB_D16_0000; |
hpcmips_fb_encoding = BIFB_D16_0000; |
2586 |
|
|
2587 |
machine->vr41xx_data = dev_vr41xx_init(machine, mem, 4121); |
machine->md_int.vr41xx_data = dev_vr41xx_init(machine, mem, 4121); |
2588 |
machine->md_interrupt = vr41xx_interrupt; |
machine->md_interrupt = vr41xx_interrupt; |
2589 |
|
|
2590 |
store_32bit_word_in_host(cpu, (unsigned char *)&hpc_bootinfo.platid_cpu, |
store_32bit_word_in_host(cpu, (unsigned char *)&hpc_bootinfo.platid_cpu, |
2607 |
|
|
2608 |
if (machine->use_x11) |
if (machine->use_x11) |
2609 |
machine->main_console_handle = |
machine->main_console_handle = |
2610 |
machine->vr41xx_data->kiu_console_handle; |
machine->md_int.vr41xx_data->kiu_console_handle; |
2611 |
|
|
2612 |
/* NetBSD/hpcmips and possibly others expects the following: */ |
/* NetBSD/hpcmips and possibly others expects the following: */ |
2613 |
|
|
2677 |
dev_fb_init(machine, mem, hpcmips_fb_addr, VFB_HPCMIPS, |
dev_fb_init(machine, mem, hpcmips_fb_addr, VFB_HPCMIPS, |
2678 |
hpcmips_fb_xsize, hpcmips_fb_ysize, |
hpcmips_fb_xsize, hpcmips_fb_ysize, |
2679 |
hpcmips_fb_xsize_mem, hpcmips_fb_ysize_mem, |
hpcmips_fb_xsize_mem, hpcmips_fb_ysize_mem, |
2680 |
hpcmips_fb_bits, "HPCmips", 0); |
hpcmips_fb_bits, "HPCmips"); |
2681 |
|
|
2682 |
/* NetBSD/hpcmips uses framebuffer at physical |
/* NetBSD/hpcmips uses framebuffer at physical |
2683 |
address 0x8.......: */ |
address 0x8.......: */ |
2707 |
* ohci0: OHCI version 1.0 |
* ohci0: OHCI version 1.0 |
2708 |
*/ |
*/ |
2709 |
|
|
2710 |
|
machine->md_int.ps2_data = dev_ps2_stuff_init(machine, mem, 0x10000000); |
2711 |
device_add(machine, "ps2_gs addr=0x12000000"); |
device_add(machine, "ps2_gs addr=0x12000000"); |
2712 |
machine->ps2_data = dev_ps2_stuff_init(machine, mem, 0x10000000); |
device_add(machine, "ps2_ether addr=0x14001000"); |
|
dev_ps2_ohci_init(cpu, mem, 0x1f801600); |
|
2713 |
dev_ram_init(mem, 0x1c000000, 4 * 1048576, DEV_RAM_RAM, 0); /* TODO: how much? */ |
dev_ram_init(mem, 0x1c000000, 4 * 1048576, DEV_RAM_RAM, 0); /* TODO: how much? */ |
2714 |
|
/* irq = 8 + 32 + 1 (SBUS/USB) */ |
2715 |
|
device_add(machine, "ohci addr=0x1f801600 irq=41"); |
2716 |
|
|
2717 |
machine->md_interrupt = ps2_interrupt; |
machine->md_interrupt = ps2_interrupt; |
2718 |
|
|
2719 |
add_symbol_name(&machine->symbol_context, |
add_symbol_name(&machine->symbol_context, |
2720 |
PLAYSTATION2_SIFBIOS, 0x10000, "[SIFBIOS entry]", 0); |
PLAYSTATION2_SIFBIOS, 0x10000, "[SIFBIOS entry]", 0, 0); |
2721 |
store_32bit_word(cpu, PLAYSTATION2_BDA + 0, PLAYSTATION2_SIFBIOS); |
store_32bit_word(cpu, PLAYSTATION2_BDA + 0, PLAYSTATION2_SIFBIOS); |
2722 |
store_buf(cpu, PLAYSTATION2_BDA + 4, "PS2b", 4); |
store_buf(cpu, PLAYSTATION2_BDA + 4, "PS2b", 4); |
2723 |
|
|
2724 |
#if 0 |
/* Set the Harddisk controller present flag, if either |
2725 |
/* Harddisk controller present flag: */ |
disk 0 or 1 is present: */ |
2726 |
store_32bit_word(cpu, 0xa0000000 + machine->physical_ram_in_mb*1048576 - 0x1000 + 0x0, 0x100); |
if (diskimage_exist(machine, 0, DISKIMAGE_IDE) || |
2727 |
dev_ps2_spd_init(machine, mem, 0x14000000); |
diskimage_exist(machine, 1, DISKIMAGE_IDE)) { |
2728 |
#endif |
store_32bit_word(cpu, 0xa0000000 + machine->physical_ram_in_mb*1048576 - 0x1000 + 0x0, 0x100); |
2729 |
|
dev_ps2_spd_init(machine, mem, 0x14000000); |
2730 |
|
} |
2731 |
|
|
2732 |
store_32bit_word(cpu, 0xa0000000 + machine->physical_ram_in_mb*1048576 - 0x1000 + 0x4, PLAYSTATION2_OPTARGS); |
store_32bit_word(cpu, 0xa0000000 + machine->physical_ram_in_mb*1048576 - 0x1000 + 0x4, PLAYSTATION2_OPTARGS); |
2733 |
bootstr = "root=/dev/hda1 crtmode=vesa0,60"; |
{ |
2734 |
store_string(cpu, PLAYSTATION2_OPTARGS, bootstr); |
int tmplen = 1000; |
2735 |
|
char *tmp = malloc(tmplen); |
2736 |
|
if (tmp == NULL) { |
2737 |
|
fprintf(stderr, "out of memory\n"); |
2738 |
|
exit(1); |
2739 |
|
} |
2740 |
|
|
2741 |
|
strlcpy(tmp, "root=/dev/hda1 crtmode=vesa0,60", tmplen); |
2742 |
|
|
2743 |
|
if (machine->boot_string_argument[0]) |
2744 |
|
snprintf(tmp+strlen(tmp), tmplen-strlen(tmp), |
2745 |
|
" %s", machine->boot_string_argument); |
2746 |
|
tmp[tmplen-1] = '\0'; |
2747 |
|
|
2748 |
|
bootstr = tmp; |
2749 |
|
store_string(cpu, PLAYSTATION2_OPTARGS, bootstr); |
2750 |
|
} |
2751 |
|
|
2752 |
/* TODO: netbsd's bootinfo.h, for symbolic names */ |
/* TODO: netbsd's bootinfo.h, for symbolic names */ |
2753 |
{ |
{ |
2767 |
} |
} |
2768 |
|
|
2769 |
/* "BOOTINFO_PCMCIA_TYPE" in NetBSD's bootinfo.h. This contains the sbus controller type. */ |
/* "BOOTINFO_PCMCIA_TYPE" in NetBSD's bootinfo.h. This contains the sbus controller type. */ |
2770 |
store_32bit_word(cpu, 0xa0000000 + machine->physical_ram_in_mb*1048576 - 0x1000 + 0x1c, 3); |
store_32bit_word(cpu, 0xa0000000 + machine->physical_ram_in_mb*1048576 - 0x1000 + 0x1c, 2); |
|
|
|
|
/* TODO: Is this necessary? */ |
|
|
cpu->cd.mips.gpr[MIPS_GPR_SP] = 0x80007f00; |
|
2771 |
|
|
2772 |
break; |
break; |
2773 |
|
|
2781 |
* detailed list of IP ("Inhouse Processor") model numbers. |
* detailed list of IP ("Inhouse Processor") model numbers. |
2782 |
* (Or http://hardware.majix.org/computers/sgi/iptable.shtml) |
* (Or http://hardware.majix.org/computers/sgi/iptable.shtml) |
2783 |
*/ |
*/ |
2784 |
machine->machine_name = malloc(500); |
machine->machine_name = malloc(MACHINE_NAME_MAXBUF); |
2785 |
if (machine->machine_name == NULL) { |
if (machine->machine_name == NULL) { |
2786 |
fprintf(stderr, "out of memory\n"); |
fprintf(stderr, "out of memory\n"); |
2787 |
exit(1); |
exit(1); |
2788 |
} |
} |
|
short_machine_name = malloc(500); |
|
|
if (short_machine_name == NULL) { |
|
|
fprintf(stderr, "out of memory\n"); |
|
|
exit(1); |
|
|
} |
|
2789 |
|
|
2790 |
if (machine->machine_type == MACHINE_SGI) { |
if (machine->machine_type == MACHINE_SGI) { |
2791 |
cpu->byte_order = EMUL_BIG_ENDIAN; |
cpu->byte_order = EMUL_BIG_ENDIAN; |
2792 |
sprintf(short_machine_name, "SGI-IP%i", machine->machine_subtype); |
snprintf(machine->machine_name, MACHINE_NAME_MAXBUF, |
2793 |
sprintf(machine->machine_name, "SGI-IP%i", machine->machine_subtype); |
"SGI-IP%i", machine->machine_subtype); |
|
|
|
|
/* Super-special case for IP24: */ |
|
|
if (machine->machine_subtype == 24) |
|
|
sprintf(short_machine_name, "SGI-IP22"); |
|
2794 |
|
|
2795 |
sgi_ram_offset = 1048576 * machine->memory_offset_in_mb; |
sgi_ram_offset = 1048576 * machine->memory_offset_in_mb; |
2796 |
|
|
2808 |
} |
} |
2809 |
} else { |
} else { |
2810 |
cpu->byte_order = EMUL_LITTLE_ENDIAN; |
cpu->byte_order = EMUL_LITTLE_ENDIAN; |
2811 |
sprintf(short_machine_name, "ARC"); |
snprintf(machine->machine_name, |
2812 |
sprintf(machine->machine_name, "ARC"); |
MACHINE_NAME_MAXBUF, "ARC"); |
2813 |
} |
} |
2814 |
|
|
2815 |
if (machine->machine_type == MACHINE_SGI) { |
if (machine->machine_type == MACHINE_SGI) { |
2816 |
/* TODO: Other SGI machine types? */ |
/* TODO: Other SGI machine types? */ |
2817 |
switch (machine->machine_subtype) { |
switch (machine->machine_subtype) { |
2818 |
case 12: |
case 12: |
2819 |
strcat(machine->machine_name, " (Iris Indigo IP12)"); |
strlcat(machine->machine_name, |
2820 |
|
" (Iris Indigo IP12)", MACHINE_NAME_MAXBUF); |
2821 |
|
|
2822 |
/* TODO */ |
/* TODO */ |
2823 |
/* 33 MHz R3000, according to http://www.irisindigo.com/ */ |
/* 33 MHz R3000, according to http://www.irisindigo.com/ */ |
2825 |
|
|
2826 |
break; |
break; |
2827 |
case 19: |
case 19: |
2828 |
strcat(machine->machine_name, " (Everest IP19)"); |
strlcat(machine->machine_name, |
2829 |
|
" (Everest IP19)", MACHINE_NAME_MAXBUF); |
2830 |
machine->main_console_handle = |
machine->main_console_handle = |
2831 |
dev_zs_init(machine, mem, 0x1fbd9830, 0, 1, "serial zs"); /* serial? netbsd? */ |
dev_zs_init(machine, mem, 0x1fbd9830, 0, 1, "serial zs"); /* serial? netbsd? */ |
2832 |
dev_scc_init(machine, mem, 0x10086000, 0, machine->use_x11, 0, 8); /* serial? irix? */ |
dev_scc_init(machine, mem, 0x10086000, 0, machine->use_x11, 0, 8); /* serial? irix? */ |
2846 |
|
|
2847 |
break; |
break; |
2848 |
case 20: |
case 20: |
2849 |
strcat(machine->machine_name, " (Indigo)"); |
strlcat(machine->machine_name, |
2850 |
|
" (Indigo)", MACHINE_NAME_MAXBUF); |
2851 |
|
|
2852 |
/* |
/* |
2853 |
* Guesses based on NetBSD 2.0 beta, 20040606. |
* Guesses based on NetBSD 2.0 beta, 20040606. |
2867 |
*/ |
*/ |
2868 |
|
|
2869 |
/* int0 at mainbus0 addr 0x1fb801c0 */ |
/* int0 at mainbus0 addr 0x1fb801c0 */ |
2870 |
machine->sgi_ip20_data = dev_sgi_ip20_init(cpu, mem, DEV_SGI_IP20_BASE); |
machine->md_int.sgi_ip20_data = dev_sgi_ip20_init(cpu, mem, DEV_SGI_IP20_BASE); |
2871 |
|
|
2872 |
/* imc0 at mainbus0 addr 0x1fa00000: revision 0: TODO (or in dev_sgi_ip20?) */ |
/* imc0 at mainbus0 addr 0x1fa00000: revision 0: TODO (or in dev_sgi_ip20?) */ |
2873 |
|
|
2892 |
|
|
2893 |
break; |
break; |
2894 |
case 21: |
case 21: |
2895 |
strcat(machine->machine_name, " (uknown SGI-IP21 ?)"); /* TODO */ |
strlcat(machine->machine_name, /* TODO */ |
2896 |
|
" (uknown SGI-IP21 ?)", MACHINE_NAME_MAXBUF); |
2897 |
/* NOTE: Special case for arc_wordlen: */ |
/* NOTE: Special case for arc_wordlen: */ |
2898 |
arc_wordlen = sizeof(uint64_t); |
arc_wordlen = sizeof(uint64_t); |
2899 |
|
|
2903 |
case 22: |
case 22: |
2904 |
case 24: |
case 24: |
2905 |
if (machine->machine_subtype == 22) { |
if (machine->machine_subtype == 22) { |
2906 |
strcat(machine->machine_name, " (Indy, Indigo2, Challenge S; Full-house)"); |
strlcat(machine->machine_name, |
2907 |
machine->sgi_ip22_data = dev_sgi_ip22_init(machine, mem, 0x1fbd9000, 0); |
" (Indy, Indigo2, Challenge S; Full-house)", |
2908 |
|
MACHINE_NAME_MAXBUF); |
2909 |
|
machine->md_int.sgi_ip22_data = dev_sgi_ip22_init(machine, mem, 0x1fbd9000, 0); |
2910 |
} else { |
} else { |
2911 |
strcat(machine->machine_name, " (Indy, Indigo2, Challenge S; Guiness)"); |
strlcat(machine->machine_name, |
2912 |
machine->sgi_ip22_data = dev_sgi_ip22_init(machine, mem, 0x1fbd9880, 1); |
" (Indy, Indigo2, Challenge S; Guiness)", |
2913 |
|
MACHINE_NAME_MAXBUF); |
2914 |
|
machine->md_int.sgi_ip22_data = dev_sgi_ip22_init(machine, mem, 0x1fbd9880, 1); |
2915 |
} |
} |
2916 |
|
|
2917 |
/* |
/* |
2954 |
|
|
2955 |
/* Not supported by NetBSD 1.6.2, but by 2.0_BETA: */ |
/* Not supported by NetBSD 1.6.2, but by 2.0_BETA: */ |
2956 |
j = dev_pckbc_init(machine, mem, 0x1fbd9840, PCKBC_8242, |
j = dev_pckbc_init(machine, mem, 0x1fbd9840, PCKBC_8242, |
2957 |
0, 0, machine->use_x11); /* TODO: irq numbers */ |
0, 0, machine->use_x11, 0); /* TODO: irq numbers */ |
2958 |
|
|
2959 |
if (machine->use_x11) |
if (machine->use_x11) |
2960 |
machine->main_console_handle = j; |
machine->main_console_handle = j; |
2983 |
case 25: |
case 25: |
2984 |
/* NOTE: Special case for arc_wordlen: */ |
/* NOTE: Special case for arc_wordlen: */ |
2985 |
arc_wordlen = sizeof(uint64_t); |
arc_wordlen = sizeof(uint64_t); |
2986 |
strcat(machine->machine_name, " (Everest IP25)"); |
strlcat(machine->machine_name, |
2987 |
|
" (Everest IP25)", MACHINE_NAME_MAXBUF); |
2988 |
|
|
2989 |
/* serial? irix? */ |
/* serial? irix? */ |
2990 |
dev_scc_init(machine, mem, |
dev_scc_init(machine, mem, |
3005 |
case 26: |
case 26: |
3006 |
/* NOTE: Special case for arc_wordlen: */ |
/* NOTE: Special case for arc_wordlen: */ |
3007 |
arc_wordlen = sizeof(uint64_t); |
arc_wordlen = sizeof(uint64_t); |
3008 |
strcat(machine->machine_name, |
strlcat(machine->machine_name, |
3009 |
" (uknown SGI-IP26 ?)"); /* TODO */ |
" (uknown SGI-IP26 ?)", |
3010 |
|
MACHINE_NAME_MAXBUF); /* TODO */ |
3011 |
machine->main_console_handle = |
machine->main_console_handle = |
3012 |
dev_zs_init(machine, mem, 0x1fbd9830, |
dev_zs_init(machine, mem, 0x1fbd9830, |
3013 |
0, 1, "zs console"); |
0, 1, "zs console"); |
3014 |
break; |
break; |
3015 |
case 27: |
case 27: |
3016 |
strcat(machine->machine_name, |
strlcat(machine->machine_name, |
3017 |
" (Origin 200/2000, Onyx2)"); |
" (Origin 200/2000, Onyx2)", |
3018 |
|
MACHINE_NAME_MAXBUF); |
3019 |
arc_wordlen = sizeof(uint64_t); |
arc_wordlen = sizeof(uint64_t); |
3020 |
/* 2 cpus per node */ |
/* 2 cpus per node */ |
3021 |
|
|
3026 |
case 28: |
case 28: |
3027 |
/* NOTE: Special case for arc_wordlen: */ |
/* NOTE: Special case for arc_wordlen: */ |
3028 |
arc_wordlen = sizeof(uint64_t); |
arc_wordlen = sizeof(uint64_t); |
3029 |
strcat(machine->machine_name, " (Impact Indigo2 ?)"); |
strlcat(machine->machine_name, |
3030 |
|
" (Impact Indigo2 ?)", MACHINE_NAME_MAXBUF); |
3031 |
|
|
3032 |
device_add(machine, "random addr=0x1fbe0000, len=1"); |
device_add(machine, "random addr=0x1fbe0000, len=1"); |
3033 |
|
|
3037 |
case 30: |
case 30: |
3038 |
/* NOTE: Special case for arc_wordlen: */ |
/* NOTE: Special case for arc_wordlen: */ |
3039 |
arc_wordlen = sizeof(uint64_t); |
arc_wordlen = sizeof(uint64_t); |
3040 |
strcat(machine->machine_name, " (Octane)"); |
strlcat(machine->machine_name, |
3041 |
|
" (Octane)", MACHINE_NAME_MAXBUF); |
3042 |
|
|
3043 |
machine->sgi_ip30_data = dev_sgi_ip30_init(machine, mem, 0x0ff00000); |
machine->md_int.sgi_ip30_data = dev_sgi_ip30_init(machine, mem, 0x0ff00000); |
3044 |
machine->md_interrupt = sgi_ip30_interrupt; |
machine->md_interrupt = sgi_ip30_interrupt; |
3045 |
|
|
3046 |
dev_ram_init(mem, 0xa0000000ULL, |
dev_ram_init(mem, 0xa0000000ULL, |
3062 |
* program dumps something there, but it doesn't look like |
* program dumps something there, but it doesn't look like |
3063 |
* readable text. (TODO) |
* readable text. (TODO) |
3064 |
*/ |
*/ |
3065 |
machine->main_console_handle = dev_ns16550_init(machine, mem, 0x1f620170, 0, 1, |
|
3066 |
machine->use_x11? 0 : 1, "serial 0"); /* TODO: irq? */ |
/* TODO: irq! */ |
3067 |
dev_ns16550_init(machine, mem, 0x1f620178, 0, 1, |
snprintf(tmpstr, sizeof(tmpstr), "ns16550 irq=0 addr=0x1f620170 name2=tty0 in_use=%i", machine->use_x11? 0 : 1); |
3068 |
0, "serial 1"); /* TODO: irq? */ |
machine->main_console_handle = (size_t)device_add(machine, tmpstr); |
3069 |
|
snprintf(tmpstr, sizeof(tmpstr), "ns16550 irq=0 addr=0x1f620178 name2=tty1 in_use=0"); |
3070 |
|
device_add(machine, tmpstr); |
3071 |
|
|
3072 |
/* MardiGras graphics: */ |
/* MardiGras graphics: */ |
3073 |
device_add(machine, "sgi_mardigras addr=0x1c000000"); |
device_add(machine, "sgi_mardigras addr=0x1c000000"); |
3074 |
|
|
3075 |
break; |
break; |
3076 |
case 32: |
case 32: |
3077 |
strcat(machine->machine_name, " (O2)"); |
strlcat(machine->machine_name, |
3078 |
|
" (O2)", MACHINE_NAME_MAXBUF); |
3079 |
|
|
3080 |
/* TODO: Find out where the physical ram is actually located. */ |
/* TODO: Find out where the physical ram is actually located. */ |
3081 |
dev_ram_init(mem, 0x07ffff00ULL, 256, DEV_RAM_MIRROR, 0x03ffff00); |
dev_ram_init(mem, 0x07ffff00ULL, 256, DEV_RAM_MIRROR, 0x03ffff00); |
3086 |
dev_ram_init(mem, 0x20000000ULL, 128 * 1048576, DEV_RAM_MIRROR, 0x00000000); |
dev_ram_init(mem, 0x20000000ULL, 128 * 1048576, DEV_RAM_MIRROR, 0x00000000); |
3087 |
dev_ram_init(mem, 0x40000000ULL, 128 * 1048576, DEV_RAM_MIRROR, 0x10000000); |
dev_ram_init(mem, 0x40000000ULL, 128 * 1048576, DEV_RAM_MIRROR, 0x10000000); |
3088 |
|
|
3089 |
machine->crime_data = dev_crime_init(machine, mem, 0x14000000, 2, machine->use_x11); /* crime0 */ |
machine->md_int.ip32.crime_data = dev_crime_init(machine, mem, 0x14000000, 2, machine->use_x11); /* crime0 */ |
3090 |
dev_sgi_mte_init(mem, 0x15000000); /* mte ??? memory thing */ |
dev_sgi_mte_init(mem, 0x15000000); /* mte ??? memory thing */ |
3091 |
dev_sgi_gbe_init(machine, mem, 0x16000000); /* gbe? framebuffer? */ |
dev_sgi_gbe_init(machine, mem, 0x16000000); /* gbe? framebuffer? */ |
3092 |
|
|
3113 |
* 1f3a0000 mcclock0 |
* 1f3a0000 mcclock0 |
3114 |
*/ |
*/ |
3115 |
|
|
3116 |
machine->mace_data = dev_mace_init(mem, 0x1f310000, 2); |
machine->md_int.ip32.mace_data = dev_mace_init(mem, 0x1f310000, 2); |
3117 |
machine->md_interrupt = sgi_ip32_interrupt; |
machine->md_interrupt = sgi_ip32_interrupt; |
3118 |
|
|
3119 |
/* |
/* |
3130 |
* intr 7 = MACE_PCI_BRIDGE |
* intr 7 = MACE_PCI_BRIDGE |
3131 |
*/ |
*/ |
3132 |
|
|
3133 |
|
#if 0 |
3134 |
i = dev_pckbc_init(machine, mem, 0x1f320000, |
i = dev_pckbc_init(machine, mem, 0x1f320000, |
3135 |
PCKBC_8242, 0x200 + MACE_PERIPH_MISC, |
PCKBC_8242, 0x200 + MACE_PERIPH_MISC, |
3136 |
0x800 + MACE_PERIPH_MISC, machine->use_x11); |
0x800 + MACE_PERIPH_MISC, machine->use_x11, 0); |
3137 |
/* keyb+mouse (mace irq numbers) */ |
/* keyb+mouse (mace irq numbers) */ |
3138 |
|
#endif |
3139 |
|
|
3140 |
net_generate_unique_mac(machine, macaddr); |
net_generate_unique_mac(machine, macaddr); |
3141 |
eaddr_string = malloc(30); |
eaddr_string = malloc(ETHERNET_STRING_MAXLEN); |
3142 |
if (eaddr_string == NULL) { |
if (eaddr_string == NULL) { |
3143 |
fprintf(stderr, "out of memory\n"); |
fprintf(stderr, "out of memory\n"); |
3144 |
exit(1); |
exit(1); |
3145 |
} |
} |
3146 |
sprintf(eaddr_string, "eaddr=%02x:%02x:" |
snprintf(eaddr_string, ETHERNET_STRING_MAXLEN, |
3147 |
"%02x:%02x:%02x:%02x", |
"eaddr=%02x:%02x:%02x:%02x:%02x:%02x", |
3148 |
macaddr[0], macaddr[1], macaddr[2], |
macaddr[0], macaddr[1], macaddr[2], |
3149 |
macaddr[3], macaddr[4], macaddr[5]); |
macaddr[3], macaddr[4], macaddr[5]); |
3150 |
dev_sgi_mec_init(machine, mem, 0x1f280000, MACE_ETHERNET, macaddr); |
dev_sgi_mec_init(machine, mem, 0x1f280000, |
3151 |
|
MACE_ETHERNET, macaddr); |
3152 |
|
|
3153 |
dev_sgi_ust_init(mem, 0x1f340000); /* ust? */ |
dev_sgi_ust_init(mem, 0x1f340000); /* ust? */ |
3154 |
|
|
3155 |
j = dev_ns16550_init(machine, mem, 0x1f390000, |
snprintf(tmpstr, sizeof(tmpstr), "ns16550 irq=%i addr=0x1f390000 addr_mult=0x100 in_use=%i name2=tty0", |
3156 |
(1<<20) + MACE_PERIPH_SERIAL, 0x100, |
(1<<20) + MACE_PERIPH_SERIAL, machine->use_x11? 0 : 1); |
3157 |
machine->use_x11? 0 : 1, "serial 0"); /* com0 */ |
j = (size_t)device_add(machine, tmpstr); |
3158 |
dev_ns16550_init(machine, mem, 0x1f398000, |
snprintf(tmpstr, sizeof(tmpstr), "ns16550 irq=%i addr=0x1f398000 addr_mult=0x100 in_use=%i name2=tty1", |
3159 |
(1<<26) + MACE_PERIPH_SERIAL, 0x100, |
(1<<26) + MACE_PERIPH_SERIAL, 0); |
3160 |
0, "serial 1"); /* com1 */ |
device_add(machine, tmpstr); |
3161 |
|
#if 0 |
3162 |
if (machine->use_x11) |
if (machine->use_x11) |
3163 |
machine->main_console_handle = i; |
machine->main_console_handle = i; |
3164 |
else |
else |
3165 |
|
#endif |
3166 |
machine->main_console_handle = j; |
machine->main_console_handle = j; |
3167 |
|
|
3168 |
dev_mc146818_init(machine, mem, 0x1f3a0000, (1<<8) + MACE_PERIPH_MISC, MC146818_SGI, 0x40); /* mcclock0 */ |
dev_mc146818_init(machine, mem, 0x1f3a0000, (1<<8) + MACE_PERIPH_MISC, MC146818_SGI, 0x40); /* mcclock0 */ |
3178 |
|
|
3179 |
pci_data = dev_macepci_init(mem, 0x1f080000, MACE_PCI_BRIDGE); /* macepci0 */ |
pci_data = dev_macepci_init(mem, 0x1f080000, MACE_PCI_BRIDGE); /* macepci0 */ |
3180 |
/* bus_pci_add(machine, pci_data, mem, 0, 0, 0, pci_ne2000_init, pci_ne2000_rr); TODO */ |
/* bus_pci_add(machine, pci_data, mem, 0, 0, 0, pci_ne2000_init, pci_ne2000_rr); TODO */ |
3181 |
#if 1 |
|
3182 |
bus_pci_add(machine, pci_data, mem, 0, 1, 0, pci_ahc_init, pci_ahc_rr); |
/* TODO: make this nicer */ |
3183 |
#endif |
if (diskimage_exist(machine, 0, DISKIMAGE_SCSI) || |
3184 |
|
diskimage_exist(machine, 1, DISKIMAGE_SCSI) || |
3185 |
|
diskimage_exist(machine, 2, DISKIMAGE_SCSI) || |
3186 |
|
diskimage_exist(machine, 3, DISKIMAGE_SCSI) || |
3187 |
|
diskimage_exist(machine, 4, DISKIMAGE_SCSI) || |
3188 |
|
diskimage_exist(machine, 5, DISKIMAGE_SCSI) || |
3189 |
|
diskimage_exist(machine, 6, DISKIMAGE_SCSI) || |
3190 |
|
diskimage_exist(machine, 7, DISKIMAGE_SCSI)) |
3191 |
|
bus_pci_add(machine, pci_data, mem, 0, 1, 0, pci_ahc_init, pci_ahc_rr); |
3192 |
|
|
3193 |
|
/* TODO: second ahc */ |
3194 |
/* bus_pci_add(machine, pci_data, mem, 0, 2, 0, pci_ahc_init, pci_ahc_rr); */ |
/* bus_pci_add(machine, pci_data, mem, 0, 2, 0, pci_ahc_init, pci_ahc_rr); */ |
3195 |
|
|
3196 |
break; |
break; |
3197 |
case 35: |
case 35: |
3198 |
strcat(machine->machine_name, " (Origin 3000)"); |
strlcat(machine->machine_name, |
3199 |
|
" (Origin 3000)", MACHINE_NAME_MAXBUF); |
3200 |
/* 4 cpus per node */ |
/* 4 cpus per node */ |
3201 |
|
|
3202 |
machine->main_console_handle = |
machine->main_console_handle = |
3204 |
0, 1, "zs console"); |
0, 1, "zs console"); |
3205 |
break; |
break; |
3206 |
case 53: |
case 53: |
3207 |
strcat(machine->machine_name, " (Origin 350)"); |
strlcat(machine->machine_name, |
3208 |
|
" (Origin 350)", MACHINE_NAME_MAXBUF); |
3209 |
/* |
/* |
3210 |
* According to http://kumba.drachentekh.net/xml/myguide.html |
* According to http://kumba.drachentekh.net/xml/myguide.html |
3211 |
* Origin 350, Tezro IP53 R16000 |
* Origin 350, Tezro IP53 R16000 |
3232 |
|
|
3233 |
switch (machine->machine_subtype) { |
switch (machine->machine_subtype) { |
3234 |
case MACHINE_ARC_NEC_RD94: |
case MACHINE_ARC_NEC_RD94: |
3235 |
strcat(machine->machine_name, " (NEC-RD94, NEC RISCstation 2250)"); |
strlcat(machine->machine_name, |
3236 |
|
" (NEC-RD94, NEC RISCstation 2250)", |
3237 |
|
MACHINE_NAME_MAXBUF); |
3238 |
break; |
break; |
3239 |
case MACHINE_ARC_NEC_R94: |
case MACHINE_ARC_NEC_R94: |
3240 |
strcat(machine->machine_name, " (NEC-R94; NEC RISCstation 2200)"); |
strlcat(machine->machine_name, " (NEC-R94; NEC RISCstation 2200)", |
3241 |
|
MACHINE_NAME_MAXBUF); |
3242 |
break; |
break; |
3243 |
case MACHINE_ARC_NEC_R96: |
case MACHINE_ARC_NEC_R96: |
3244 |
strcat(machine->machine_name, " (NEC-R96; NEC Express RISCserver)"); |
strlcat(machine->machine_name, " (NEC-R96; NEC Express RISCserver)", |
3245 |
|
MACHINE_NAME_MAXBUF); |
3246 |
break; |
break; |
3247 |
} |
} |
3248 |
|
|
3253 |
|
|
3254 |
device_add(machine, "sn addr=0x80001000 irq=0"); |
device_add(machine, "sn addr=0x80001000 irq=0"); |
3255 |
dev_mc146818_init(machine, mem, 0x80004000ULL, 0, MC146818_ARC_NEC, 1); |
dev_mc146818_init(machine, mem, 0x80004000ULL, 0, MC146818_ARC_NEC, 1); |
3256 |
i = dev_pckbc_init(machine, mem, 0x80005000ULL, PCKBC_8042, 0, 0, machine->use_x11); |
i = dev_pckbc_init(machine, mem, 0x80005000ULL, PCKBC_8042, 0, 0, machine->use_x11, 0); |
3257 |
j = dev_ns16550_init(machine, mem, 0x80006000ULL, |
|
3258 |
3, 1, machine->use_x11? 0 : 1, "serial 0"); /* com0 */ |
snprintf(tmpstr, sizeof(tmpstr), "ns16550 irq=3 addr=0x80006000 in_use=%i name2=tty0", machine->use_x11? 0 : 1); |
3259 |
dev_ns16550_init(machine, mem, 0x80007000ULL, |
j = (size_t)device_add(machine, tmpstr); |
3260 |
0, 1, 0, "serial 1"); /* com1 */ |
snprintf(tmpstr, sizeof(tmpstr), "ns16550 irq=0 addr=0x80007000 in_use=%i name2=tty1", 0); |
3261 |
|
device_add(machine, tmpstr); |
3262 |
|
|
3263 |
if (machine->use_x11) |
if (machine->use_x11) |
3264 |
machine->main_console_handle = i; |
machine->main_console_handle = i; |
3278 |
case MACHINE_ARC_NEC_R96: |
case MACHINE_ARC_NEC_R96: |
3279 |
dev_fb_init(machine, mem, 0x100e00000ULL, |
dev_fb_init(machine, mem, 0x100e00000ULL, |
3280 |
VFB_GENERIC, 640,480, 1024,480, |
VFB_GENERIC, 640,480, 1024,480, |
3281 |
8, "necvdfrb", 1); |
8, "necvdfrb"); |
3282 |
break; |
break; |
3283 |
} |
} |
3284 |
break; |
break; |
3297 |
* Parallel at "start: 0x 0 18c10278, length: 0x1000, level: 5, vector: 5" |
* Parallel at "start: 0x 0 18c10278, length: 0x1000, level: 5, vector: 5" |
3298 |
*/ |
*/ |
3299 |
|
|
3300 |
strcat(machine->machine_name, " (NEC-R98; NEC RISCserver 4200)"); |
strlcat(machine->machine_name, |
3301 |
|
" (NEC-R98; NEC RISCserver 4200)", |
3302 |
|
MACHINE_NAME_MAXBUF); |
3303 |
|
|
3304 |
/* |
/* |
3305 |
* Windows NT access stuff at these addresses: |
* Windows NT access stuff at these addresses: |
3355 |
|
|
3356 |
switch (machine->machine_subtype) { |
switch (machine->machine_subtype) { |
3357 |
case MACHINE_ARC_JAZZ_PICA: |
case MACHINE_ARC_JAZZ_PICA: |
3358 |
strcat(machine->machine_name, " (Microsoft Jazz, Acer PICA-61)"); |
strlcat(machine->machine_name, " (Microsoft Jazz, Acer PICA-61)", |
3359 |
|
MACHINE_NAME_MAXBUF); |
3360 |
break; |
break; |
3361 |
case MACHINE_ARC_JAZZ_MAGNUM: |
case MACHINE_ARC_JAZZ_MAGNUM: |
3362 |
strcat(machine->machine_name, " (Microsoft Jazz, MIPS Magnum)"); |
strlcat(machine->machine_name, " (Microsoft Jazz, MIPS Magnum)", |
3363 |
|
MACHINE_NAME_MAXBUF); |
3364 |
break; |
break; |
3365 |
default: |
default: |
3366 |
fatal("error in machine.c. jazz\n"); |
fatal("error in machine.c. jazz\n"); |
3367 |
exit(1); |
exit(1); |
3368 |
} |
} |
3369 |
|
|
3370 |
machine->jazz_data = device_add(machine, |
machine->md_int.jazz_data = device_add(machine, |
3371 |
"jazz addr=0x80000000"); |
"jazz addr=0x80000000"); |
3372 |
machine->md_interrupt = jazz_interrupt; |
machine->md_interrupt = jazz_interrupt; |
3373 |
|
|
3374 |
|
i = dev_pckbc_init(machine, mem, 0x80005000ULL, |
3375 |
|
PCKBC_JAZZ, 8 + 6, 8 + 7, machine->use_x11, 0); |
3376 |
|
|
3377 |
|
snprintf(tmpstr, sizeof(tmpstr), "ns16550 irq=16 addr=0x80006000 in_use=%i name2=tty0", machine->use_x11? 0 : 1); |
3378 |
|
j = (size_t)device_add(machine, tmpstr); |
3379 |
|
snprintf(tmpstr, sizeof(tmpstr), "ns16550 irq=17 addr=0x80007000 in_use=%i name2=tty1", 0); |
3380 |
|
device_add(machine, tmpstr); |
3381 |
|
|
3382 |
|
if (machine->use_x11) |
3383 |
|
machine->main_console_handle = i; |
3384 |
|
else |
3385 |
|
machine->main_console_handle = j; |
3386 |
|
|
3387 |
switch (machine->machine_subtype) { |
switch (machine->machine_subtype) { |
3388 |
case MACHINE_ARC_JAZZ_PICA: |
case MACHINE_ARC_JAZZ_PICA: |
3389 |
dev_vga_init(machine, mem, |
if (machine->use_x11) { |
3390 |
0x400b8000ULL, 0x600003c0ULL, |
dev_vga_init(machine, mem, |
3391 |
ARC_CONSOLE_MAX_X, ARC_CONSOLE_MAX_Y, machine->machine_name); |
0x400a0000ULL, 0x600003c0ULL, |
3392 |
arcbios_console_init(cpu, 0x400b8000ULL, |
machine->machine_name); |
3393 |
0x600003c0ULL, ARC_CONSOLE_MAX_X, |
arcbios_console_init(machine, |
3394 |
ARC_CONSOLE_MAX_Y); |
0x400b8000ULL, 0x600003c0ULL); |
3395 |
|
} |
3396 |
break; |
break; |
3397 |
case MACHINE_ARC_JAZZ_MAGNUM: |
case MACHINE_ARC_JAZZ_MAGNUM: |
3398 |
/* PROM mirror? */ |
/* PROM mirror? */ |
3403 |
/* control at 0x60100000? */ |
/* control at 0x60100000? */ |
3404 |
dev_fb_init(machine, mem, 0x60200000ULL, |
dev_fb_init(machine, mem, 0x60200000ULL, |
3405 |
VFB_GENERIC, 1024,768, 1024,768, |
VFB_GENERIC, 1024,768, 1024,768, |
3406 |
8, "VXL", 1); |
8, "VXL"); |
3407 |
break; |
break; |
3408 |
} |
} |
3409 |
|
|
3412 |
|
|
3413 |
dev_asc_init(machine, mem, |
dev_asc_init(machine, mem, |
3414 |
0x80002000ULL, 8 + 5, NULL, DEV_ASC_PICA, |
0x80002000ULL, 8 + 5, NULL, DEV_ASC_PICA, |
3415 |
dev_jazz_dma_controller, machine->jazz_data); |
dev_jazz_dma_controller, |
3416 |
|
machine->md_int.jazz_data); |
3417 |
|
|
3418 |
device_add(machine, "fdc addr=0x80003000, irq=0"); |
device_add(machine, "fdc addr=0x80003000, irq=0"); |
3419 |
|
|
3420 |
dev_mc146818_init(machine, mem, |
dev_mc146818_init(machine, mem, |
3421 |
0x80004000ULL, 2, MC146818_ARC_JAZZ, 1); |
0x80004000ULL, 2, MC146818_ARC_JAZZ, 1); |
3422 |
|
|
|
i = dev_pckbc_init(machine, mem, 0x80005000ULL, |
|
|
PCKBC_JAZZ, 8 + 6, 8 + 7, machine->use_x11); |
|
|
|
|
|
j = dev_ns16550_init(machine, mem, |
|
|
0x80006000ULL, 8 + 8, 1, |
|
|
machine->use_x11? 0 : 1, "serial 0"); |
|
|
dev_ns16550_init(machine, mem, |
|
|
0x80007000ULL, 8 + 9, 1, 0, "serial 1"); |
|
|
|
|
|
if (machine->use_x11) |
|
|
machine->main_console_handle = i; |
|
|
else |
|
|
machine->main_console_handle = j; |
|
|
|
|
3423 |
#if 0 |
#if 0 |
3424 |
Not yet. |
Not yet. |
3425 |
dev_wdc_init(machine, mem, 0x900001f0ULL, 8+16 + 14, 0); |
dev_wdc_init(machine, mem, 0x900001f0ULL, 8+16 + 14, 0); |
3437 |
* See http://mail-index.netbsd.org/port-arc/2000/10/18/0001.html. |
* See http://mail-index.netbsd.org/port-arc/2000/10/18/0001.html. |
3438 |
*/ |
*/ |
3439 |
|
|
3440 |
strcat(machine->machine_name, " (Microsoft Jazz, Olivetti M700)"); |
strlcat(machine->machine_name, " (Microsoft Jazz, Olivetti M700)", |
3441 |
|
MACHINE_NAME_MAXBUF); |
3442 |
|
|
3443 |
machine->jazz_data = device_add(machine, |
machine->md_int.jazz_data = device_add(machine, |
3444 |
"jazz addr=0x80000000"); |
"jazz addr=0x80000000"); |
3445 |
machine->md_interrupt = jazz_interrupt; |
machine->md_interrupt = jazz_interrupt; |
3446 |
|
|
3450 |
i = 0; /* TODO: Yuck! */ |
i = 0; /* TODO: Yuck! */ |
3451 |
#if 0 |
#if 0 |
3452 |
i = dev_pckbc_init(machine, mem, 0x80005000ULL, |
i = dev_pckbc_init(machine, mem, 0x80005000ULL, |
3453 |
PCKBC_JAZZ, 8 + 6, 8 + 7, machine->use_x11); |
PCKBC_JAZZ, 8 + 6, 8 + 7, machine->use_x11, 0); |
3454 |
#endif |
#endif |
3455 |
j = dev_ns16550_init(machine, mem, |
|
3456 |
0x80006000ULL, 8 + 8, 1, |
snprintf(tmpstr, sizeof(tmpstr), "ns16550 irq=16 addr=0x80006000 in_use=%i name2=tty0", machine->use_x11? 0 : 1); |
3457 |
machine->use_x11? 0 : 1, "serial 0"); |
j = (size_t)device_add(machine, tmpstr); |
3458 |
dev_ns16550_init(machine, mem, |
snprintf(tmpstr, sizeof(tmpstr), "ns16550 irq=17 addr=0x80007000 in_use=%i name2=tty1", 0); |
3459 |
0x80007000ULL, 8 + 9, 1, 0, "serial 1"); |
device_add(machine, tmpstr); |
3460 |
|
|
3461 |
if (machine->use_x11) |
if (machine->use_x11) |
3462 |
machine->main_console_handle = i; |
machine->main_console_handle = i; |
3476 |
* http://mail-index.netbsd.org/port-arc/2000/10/14/0000.html |
* http://mail-index.netbsd.org/port-arc/2000/10/14/0000.html |
3477 |
*/ |
*/ |
3478 |
|
|
3479 |
strcat(machine->machine_name, " (Deskstation Tyne)"); |
strlcat(machine->machine_name, " (Deskstation Tyne)", |
3480 |
|
MACHINE_NAME_MAXBUF); |
|
dev_vga_init(machine, mem, 0x1000b8000ULL, 0x9000003c0ULL, |
|
|
ARC_CONSOLE_MAX_X, ARC_CONSOLE_MAX_Y, machine->machine_name); |
|
3481 |
|
|
3482 |
arcbios_console_init(cpu, 0x1000b8000ULL, |
snprintf(tmpstr, sizeof(tmpstr), "ns16550 irq=0 addr=0x9000003f8 in_use=%i name2=tty0", machine->use_x11? 0 : 1); |
3483 |
0x9000003c0ULL, ARC_CONSOLE_MAX_X, |
i = (size_t)device_add(machine, tmpstr); |
3484 |
ARC_CONSOLE_MAX_Y); |
device_add(machine, "ns16550 irq=0 addr=0x9000002f8 in_use=0 name2=tty1"); |
3485 |
|
device_add(machine, "ns16550 irq=0 addr=0x9000003e8 in_use=0 name2=tty2"); |
3486 |
i = dev_ns16550_init(machine, mem, 0x9000003f8ULL, 0, 1, machine->use_x11? 0 : 1, "serial 0"); |
device_add(machine, "ns16550 irq=0 addr=0x9000002e8 in_use=0 name2=tty3"); |
|
dev_ns16550_init(machine, mem, 0x9000002f8ULL, 0, 1, 0, "serial 1"); |
|
|
dev_ns16550_init(machine, mem, 0x9000003e8ULL, 0, 1, 0, "serial 2"); |
|
|
dev_ns16550_init(machine, mem, 0x9000002e8ULL, 0, 1, 0, "serial 3"); |
|
3487 |
|
|
3488 |
dev_mc146818_init(machine, mem, |
dev_mc146818_init(machine, mem, |
3489 |
0x900000070ULL, 2, MC146818_PC_CMOS, 1); |
0x900000070ULL, 2, MC146818_PC_CMOS, 1); |
3494 |
#endif |
#endif |
3495 |
/* PC kbd */ |
/* PC kbd */ |
3496 |
j = dev_pckbc_init(machine, mem, 0x900000060ULL, |
j = dev_pckbc_init(machine, mem, 0x900000060ULL, |
3497 |
PCKBC_8042, 0, 0, machine->use_x11); |
PCKBC_8042, 0, 0, machine->use_x11, 0); |
3498 |
|
|
3499 |
if (machine->use_x11) |
if (machine->use_x11) |
3500 |
machine->main_console_handle = j; |
machine->main_console_handle = j; |
3501 |
else |
else |
3502 |
machine->main_console_handle = i; |
machine->main_console_handle = i; |
3503 |
|
|
3504 |
|
if (machine->use_x11) { |
3505 |
|
dev_vga_init(machine, mem, 0x1000a0000ULL, |
3506 |
|
0x9000003c0ULL, machine->machine_name); |
3507 |
|
|
3508 |
|
arcbios_console_init(machine, |
3509 |
|
0x1000b8000ULL, 0x9000003c0ULL); |
3510 |
|
} |
3511 |
break; |
break; |
3512 |
|
|
3513 |
default: |
default: |
3517 |
} |
} |
3518 |
} |
} |
3519 |
|
|
|
|
|
|
if (!machine->prom_emulation) |
|
|
goto no_arc_prom_emulation; /* TODO: ugly */ |
|
|
|
|
|
|
|
3520 |
/* |
/* |
3521 |
* This is important: :-) |
* This is important: :-) |
3522 |
* |
* |
3523 |
* TODO: There should not be any use of |
* TODO: There should not be any use of ARCBIOS before this |
3524 |
* ARCBIOS before this statement. |
* point. |
|
*/ |
|
|
if (arc_wordlen == sizeof(uint64_t)) |
|
|
arcbios_set_64bit_mode(1); |
|
|
|
|
|
if (machine->physical_ram_in_mb < 16) |
|
|
fprintf(stderr, "WARNING! The ARC platform specification doesn't allow less than 16 MB of RAM. Continuing anyway.\n"); |
|
|
|
|
|
arcbios_set_default_exception_handler(cpu); |
|
|
|
|
|
memset(&arcbios_sysid, 0, sizeof(arcbios_sysid)); |
|
|
if (machine->machine_type == MACHINE_SGI) { |
|
|
/* Vendor ID, max 8 chars: */ |
|
|
strncpy(arcbios_sysid.VendorId, "SGI", 3); |
|
|
switch (machine->machine_subtype) { |
|
|
case 22: |
|
|
strncpy(arcbios_sysid.ProductId, |
|
|
"87654321", 8); /* some kind of ID? */ |
|
|
break; |
|
|
case 32: |
|
|
strncpy(arcbios_sysid.ProductId, "8", 1); |
|
|
/* 6 or 8 (?) */ |
|
|
break; |
|
|
default: |
|
|
snprintf(arcbios_sysid.ProductId, 8, "IP%i", |
|
|
machine->machine_subtype); |
|
|
} |
|
|
} else { |
|
|
switch (machine->machine_subtype) { |
|
|
case MACHINE_ARC_NEC_RD94: |
|
|
strncpy(arcbios_sysid.VendorId, "NEC W&S", 8); /* NOTE: max 8 chars */ |
|
|
strncpy(arcbios_sysid.ProductId, "RD94", 4); /* NOTE: max 8 chars */ |
|
|
break; |
|
|
case MACHINE_ARC_NEC_R94: |
|
|
strncpy(arcbios_sysid.VendorId, "NEC W&S", 8); /* NOTE: max 8 chars */ |
|
|
strncpy(arcbios_sysid.ProductId, "ijkl", 4); /* NOTE: max 8 chars */ |
|
|
break; |
|
|
case MACHINE_ARC_NEC_R96: |
|
|
strncpy(arcbios_sysid.VendorId, "MIPS DUO", 8); /* NOTE: max 8 chars */ |
|
|
strncpy(arcbios_sysid.ProductId, "blahblah", 8); /* NOTE: max 8 chars */ |
|
|
break; |
|
|
case MACHINE_ARC_NEC_R98: |
|
|
strncpy(arcbios_sysid.VendorId, "NEC W&S", 8); /* NOTE: max 8 chars */ |
|
|
strncpy(arcbios_sysid.ProductId, "R98", 4); /* NOTE: max 8 chars */ |
|
|
break; |
|
|
case MACHINE_ARC_JAZZ_PICA: |
|
|
strncpy(arcbios_sysid.VendorId, "MIPS MAG", 8);/* NOTE: max 8 chars */ |
|
|
strncpy(arcbios_sysid.ProductId, "ijkl", 4); /* NOTE: max 8 chars */ |
|
|
break; |
|
|
case MACHINE_ARC_JAZZ_MAGNUM: |
|
|
strncpy(arcbios_sysid.VendorId, "MIPS MAG", 8);/* NOTE: max 8 chars */ |
|
|
strncpy(arcbios_sysid.ProductId, "ijkl", 4); /* NOTE: max 8 chars */ |
|
|
break; |
|
|
case MACHINE_ARC_JAZZ_M700: |
|
|
strncpy(arcbios_sysid.VendorId, "OLI00000", 8);/* NOTE: max 8 chars */ |
|
|
strncpy(arcbios_sysid.ProductId, "ijkl", 4); /* NOTE: max 8 chars */ |
|
|
break; |
|
|
case MACHINE_ARC_DESKTECH_TYNE: |
|
|
strncpy(arcbios_sysid.VendorId, "DESKTECH", 8);/* NOTE: max 8 chars */ |
|
|
strncpy(arcbios_sysid.ProductId, "ijkl", 4); /* NOTE: max 8 chars */ |
|
|
break; |
|
|
default: |
|
|
fatal("error in machine.c sysid\n"); |
|
|
exit(1); |
|
|
} |
|
|
} |
|
|
store_buf(cpu, SGI_SYSID_ADDR, (char *)&arcbios_sysid, sizeof(arcbios_sysid)); |
|
|
|
|
|
arcbios_get_dsp_stat(cpu, &arcbios_dsp_stat); |
|
|
store_buf(cpu, ARC_DSPSTAT_ADDR, (char *)&arcbios_dsp_stat, sizeof(arcbios_dsp_stat)); |
|
|
|
|
|
/* |
|
|
* The first 12 MBs of RAM are simply reserved... this simplifies things a lot. |
|
|
* If there's more than 512MB of RAM, it has to be split in two, according to |
|
|
* the ARC spec. This code creates a number of chunks of at most 512MB each. |
|
|
* |
|
|
* NOTE: The region of physical address space between 0x10000000 and 0x1fffffff |
|
|
* (256 - 512 MB) is usually occupied by memory mapped devices, so that portion is "lost". |
|
|
*/ |
|
|
|
|
|
arc_reserved = 0x2000; |
|
|
if (machine->machine_type == MACHINE_SGI) |
|
|
arc_reserved = 0x4000; |
|
|
|
|
|
arcbios_add_memory_descriptor(cpu, 0, arc_reserved, ARCBIOS_MEM_FirmwarePermanent); |
|
|
arcbios_add_memory_descriptor(cpu, sgi_ram_offset + arc_reserved, 0x60000-arc_reserved, ARCBIOS_MEM_FirmwareTemporary); |
|
|
|
|
|
mem_base = 12; |
|
|
mem_base += sgi_ram_offset / 1048576; |
|
|
|
|
|
while (mem_base < machine->physical_ram_in_mb + sgi_ram_offset/1048576) { |
|
|
mem_count = machine->physical_ram_in_mb + sgi_ram_offset/1048576 |
|
|
- mem_base; |
|
|
|
|
|
/* Skip the 256-512MB region (for devices) */ |
|
|
if (mem_base < 256 && mem_base + mem_count > 256) { |
|
|
mem_count = 256-mem_base; |
|
|
} |
|
|
|
|
|
/* At most 512MB per descriptor (at least the first 512MB |
|
|
must be separated this way, according to the ARC spec) */ |
|
|
if (mem_count > 512) |
|
|
mem_count = 512; |
|
|
|
|
|
arcbios_add_memory_descriptor(cpu, mem_base * 1048576, |
|
|
mem_count * 1048576, ARCBIOS_MEM_FreeMemory); |
|
|
|
|
|
mem_base += mem_count; |
|
|
|
|
|
/* Skip the devices: */ |
|
|
if (mem_base == 256) |
|
|
mem_base = 512; |
|
|
} |
|
|
|
|
|
|
|
|
/* |
|
|
* Components: (this is an example of what a system could look like) |
|
|
* |
|
|
* [System] |
|
|
* [CPU] (one for each cpu) |
|
|
* [FPU] (one for each cpu) |
|
|
* [CPU Caches] |
|
|
* [Memory] |
|
|
* [Ethernet] |
|
|
* [Serial] |
|
|
* [SCSI] |
|
|
* [Disk] |
|
|
* |
|
|
* Here's a good list of what hardware is in different IP-models: |
|
|
* http://www.linux-mips.org/archives/linux-mips/2001-03/msg00101.html |
|
|
*/ |
|
|
|
|
|
if (machine->machine_name == NULL) |
|
|
fatal("ERROR: machine_name == NULL\n"); |
|
|
if (short_machine_name == NULL) |
|
|
fatal("ERROR: short_machine_name == NULL\n"); |
|
|
|
|
|
switch (machine->machine_type) { |
|
|
case MACHINE_SGI: |
|
|
system = arcbios_addchild_manual(cpu, COMPONENT_CLASS_SystemClass, COMPONENT_TYPE_ARC, |
|
|
0, 1, 2, 0, 0xffffffff, short_machine_name, 0 /* ROOT */ , NULL, 0); |
|
|
break; |
|
|
default: |
|
|
/* ARC: */ |
|
|
switch (machine->machine_subtype) { |
|
|
case MACHINE_ARC_NEC_RD94: |
|
|
system = arcbios_addchild_manual(cpu, COMPONENT_CLASS_SystemClass, COMPONENT_TYPE_ARC, |
|
|
0, 1, 2, 0, 0xffffffff, "NEC-RD94", 0 /* ROOT */ , NULL, 0); |
|
|
break; |
|
|
case MACHINE_ARC_NEC_R94: |
|
|
system = arcbios_addchild_manual(cpu, COMPONENT_CLASS_SystemClass, COMPONENT_TYPE_ARC, |
|
|
0, 1, 2, 0, 0xffffffff, "NEC-R94", 0 /* ROOT */ , NULL, 0); |
|
|
break; |
|
|
case MACHINE_ARC_NEC_R96: |
|
|
system = arcbios_addchild_manual(cpu, COMPONENT_CLASS_SystemClass, COMPONENT_TYPE_ARC, |
|
|
0, 1, 2, 0, 0xffffffff, "NEC-R96", 0 /* ROOT */ , NULL, 0); |
|
|
break; |
|
|
case MACHINE_ARC_NEC_R98: |
|
|
system = arcbios_addchild_manual(cpu, COMPONENT_CLASS_SystemClass, COMPONENT_TYPE_ARC, |
|
|
0, 1, 2, 0, 0xffffffff, "NEC-R98", 0 /* ROOT */ , NULL, 0); |
|
|
break; |
|
|
case MACHINE_ARC_JAZZ_PICA: |
|
|
system = arcbios_addchild_manual(cpu, COMPONENT_CLASS_SystemClass, COMPONENT_TYPE_ARC, |
|
|
0, 1, 2, 0, 0xffffffff, "PICA-61", 0 /* ROOT */ , NULL, 0); |
|
|
break; |
|
|
case MACHINE_ARC_JAZZ_MAGNUM: |
|
|
system = arcbios_addchild_manual(cpu, COMPONENT_CLASS_SystemClass, COMPONENT_TYPE_ARC, |
|
|
0, 1, 2, 0, 0xffffffff, "Microsoft-Jazz", 0 /* ROOT */ , NULL, 0); |
|
|
break; |
|
|
case MACHINE_ARC_JAZZ_M700: |
|
|
system = arcbios_addchild_manual(cpu, COMPONENT_CLASS_SystemClass, COMPONENT_TYPE_ARC, |
|
|
0, 1, 2, 0, 0xffffffff, "Microsoft-Jazz", 0 /* ROOT */ , NULL, 0); |
|
|
break; |
|
|
case MACHINE_ARC_DESKTECH_TYNE: |
|
|
system = arcbios_addchild_manual(cpu, COMPONENT_CLASS_SystemClass, COMPONENT_TYPE_ARC, |
|
|
0, 1, 2, 0, 0xffffffff, "DESKTECH-TYNE", 0 /* ROOT */ , NULL, 0); |
|
|
break; |
|
|
default: |
|
|
fatal("Unimplemented ARC machine type %i\n", |
|
|
machine->machine_subtype); |
|
|
exit(1); |
|
|
} |
|
|
} |
|
|
|
|
|
|
|
|
/* |
|
|
* Common stuff for both SGI and ARC: |
|
3525 |
*/ |
*/ |
|
debug("ARC system @ 0x%llx\n", (long long)system); |
|
|
|
|
|
for (i=0; i<machine->ncpus; i++) { |
|
|
uint64_t cpuaddr, fpu=0, picache, pdcache, sdcache=0; |
|
|
int cache_size, cache_line_size; |
|
|
unsigned int jj; |
|
|
char arc_cpu_name[100]; |
|
|
char arc_fpc_name[105]; |
|
|
|
|
|
snprintf(arc_cpu_name, sizeof(arc_cpu_name), |
|
|
"MIPS-%s", machine->cpu_name); |
|
|
|
|
|
if (machine->machine_type == MACHINE_ARC && |
|
|
machine->machine_subtype == MACHINE_ARC_NEC_R96) |
|
|
snprintf(arc_cpu_name, sizeof(arc_cpu_name), |
|
|
"MIPS-%s - Pr 4/5.0, Fp 5/0", |
|
|
machine->cpu_name); |
|
|
|
|
|
arc_cpu_name[sizeof(arc_cpu_name)-1] = 0; |
|
|
for (jj=0; jj<strlen(arc_cpu_name); jj++) |
|
|
if (arc_cpu_name[jj] >= 'a' && arc_cpu_name[jj] <= 'z') |
|
|
arc_cpu_name[jj] += ('A' - 'a'); |
|
|
|
|
|
strcpy(arc_fpc_name, arc_cpu_name); |
|
|
strcat(arc_fpc_name, "FPC"); |
|
|
|
|
|
cpuaddr = arcbios_addchild_manual(cpu, COMPONENT_CLASS_ProcessorClass, COMPONENT_TYPE_CPU, |
|
|
0, 1, 2, i, 0xffffffff, arc_cpu_name, system, NULL, 0); |
|
|
|
|
|
/* |
|
|
* TODO: This was in the ARC specs, but it isn't |
|
|
* really used by ARC implementations? |
|
|
* At least SGI-IP32 uses it. |
|
|
*/ |
|
|
if (machine->machine_type == MACHINE_SGI) |
|
|
fpu = arcbios_addchild_manual(cpu, COMPONENT_CLASS_ProcessorClass, COMPONENT_TYPE_FPU, |
|
|
0, 1, 2, 0, 0xffffffff, arc_fpc_name, cpuaddr, NULL, 0); |
|
|
|
|
|
cache_size = DEFAULT_PCACHE_SIZE - 12; |
|
|
if (machine->cache_picache) |
|
|
cache_size = machine->cache_picache - 12; |
|
|
if (cache_size < 0) |
|
|
cache_size = 0; |
|
|
|
|
|
cache_line_size = DEFAULT_PCACHE_LINESIZE; |
|
|
if (machine->cache_picache_linesize) |
|
|
cache_line_size = machine->cache_picache_linesize; |
|
|
if (cache_line_size < 0) |
|
|
cache_line_size = 0; |
|
|
|
|
|
picache = arcbios_addchild_manual(cpu, COMPONENT_CLASS_CacheClass, |
|
|
COMPONENT_TYPE_PrimaryICache, 0, 1, 2, |
|
|
/* |
|
|
* Key bits: 0xXXYYZZZZ |
|
|
* XX is refill-size. |
|
|
* Cache line size is 1 << YY, |
|
|
* Cache size is 4KB << ZZZZ. |
|
|
*/ |
|
|
0x01000000 + (cache_line_size << 16) + cache_size, |
|
|
/* 32 bytes per line, default = 32 KB total */ |
|
|
0xffffffff, NULL, cpuaddr, NULL, 0); |
|
|
|
|
|
cache_size = DEFAULT_PCACHE_SIZE - 12; |
|
|
if (machine->cache_pdcache) |
|
|
cache_size = machine->cache_pdcache - 12; |
|
|
if (cache_size < 0) |
|
|
cache_size = 0; |
|
|
|
|
|
cache_line_size = DEFAULT_PCACHE_LINESIZE; |
|
|
if (machine->cache_pdcache_linesize) |
|
|
cache_line_size = machine->cache_pdcache_linesize; |
|
|
if (cache_line_size < 0) |
|
|
cache_line_size = 0; |
|
|
|
|
|
pdcache = arcbios_addchild_manual(cpu, COMPONENT_CLASS_CacheClass, |
|
|
COMPONENT_TYPE_PrimaryDCache, 0, 1, 2, |
|
|
/* |
|
|
* Key bits: 0xYYZZZZ |
|
|
* Cache line size is 1 << YY, |
|
|
* Cache size is 4KB << ZZZZ. |
|
|
*/ |
|
|
0x01000000 + (cache_line_size << 16) + cache_size, |
|
|
/* 32 bytes per line, default = 32 KB total */ |
|
|
0xffffffff, NULL, cpuaddr, NULL, 0); |
|
|
|
|
|
if (machine->cache_secondary >= 12) { |
|
|
cache_size = machine->cache_secondary - 12; |
|
|
|
|
|
cache_line_size = 6; /* 64 bytes default */ |
|
|
if (machine->cache_secondary_linesize) |
|
|
cache_line_size = machine->cache_secondary_linesize; |
|
|
if (cache_line_size < 0) |
|
|
cache_line_size = 0; |
|
|
|
|
|
sdcache = arcbios_addchild_manual(cpu, COMPONENT_CLASS_CacheClass, |
|
|
COMPONENT_TYPE_SecondaryDCache, 0, 1, 2, |
|
|
/* |
|
|
* Key bits: 0xYYZZZZ |
|
|
* Cache line size is 1 << YY, |
|
|
* Cache size is 4KB << ZZZZ. |
|
|
*/ |
|
|
0x01000000 + (cache_line_size << 16) + cache_size, |
|
|
/* 64 bytes per line, default = 1 MB total */ |
|
|
0xffffffff, NULL, cpuaddr, NULL, 0); |
|
|
} |
|
|
|
|
|
debug("ARC cpu%i @ 0x%llx", i, (long long)cpuaddr); |
|
|
|
|
|
if (fpu != 0) |
|
|
debug(" (fpu @ 0x%llx)\n", (long long)fpu); |
|
|
else |
|
|
debug("\n"); |
|
|
|
|
|
debug(" picache @ 0x%llx, pdcache @ 0x%llx\n", |
|
|
(long long)picache, (long long)pdcache); |
|
|
|
|
|
if (machine->cache_secondary >= 12) |
|
|
debug(" sdcache @ 0x%llx\n", |
|
|
(long long)sdcache); |
|
|
|
|
|
if (machine->machine_type == MACHINE_SGI) { |
|
|
/* TODO: Memory amount (and base address?)! */ |
|
|
uint64_t memory = arcbios_addchild_manual(cpu, COMPONENT_CLASS_MemoryClass, |
|
|
COMPONENT_TYPE_MemoryUnit, |
|
|
0, 1, 2, 0, 0xffffffff, "memory", cpuaddr, NULL, 0); |
|
|
debug(" memory @ 0x%llx\n", (long long)memory); |
|
|
} |
|
|
} |
|
3526 |
|
|
3527 |
|
if (machine->prom_emulation) |
3528 |
|
arcbios_init(machine, arc_wordlen == sizeof(uint64_t), |
3529 |
|
sgi_ram_offset); |
3530 |
|
else |
3531 |
|
goto no_arc_prom_emulation; /* TODO: ugly */ |
3532 |
|
|
3533 |
/* |
/* |
|
* Other components, and default TLB entries: |
|
|
* |
|
3534 |
* TODO: How to build the component tree intermixed with |
* TODO: How to build the component tree intermixed with |
3535 |
* the rest of device initialization? |
* the rest of device initialization? |
3536 |
*/ |
*/ |
3537 |
|
|
|
if (machine->machine_type == MACHINE_SGI) { |
|
|
/* TODO: On which models is this required? */ |
|
|
mips_coproc_tlb_set_entry(cpu, 0, 1048576*16, |
|
|
0xc000000000000000ULL, |
|
|
0x0, 1048576*16, |
|
|
1, 1, 1, 1, 1, 0, 2, 2); |
|
|
} |
|
|
|
|
|
if (machine->machine_type == MACHINE_ARC && |
|
|
( machine->machine_subtype == MACHINE_ARC_NEC_RD94 || |
|
|
machine->machine_subtype == MACHINE_ARC_NEC_R94 || |
|
|
machine->machine_subtype == MACHINE_ARC_NEC_R96 )) { |
|
|
uint64_t jazzbus, eisa, other; |
|
|
|
|
|
jazzbus = arcbios_addchild_manual(cpu, |
|
|
COMPONENT_CLASS_AdapterClass, |
|
|
COMPONENT_TYPE_MultiFunctionAdapter, |
|
|
0, 1, 2, 0, 0xffffffff, "Jazz-Internal Bus", |
|
|
system, NULL, 0); |
|
|
|
|
|
switch (machine->machine_subtype) { |
|
|
case MACHINE_ARC_NEC_RD94: |
|
|
case MACHINE_ARC_NEC_R94: |
|
|
if (machine->use_x11) |
|
|
arcbios_addchild_manual(cpu, |
|
|
COMPONENT_CLASS_ControllerClass, |
|
|
COMPONENT_TYPE_DisplayController, |
|
|
0, 1, 2, 0, 0x0, "10110004", |
|
|
system, NULL, 0); |
|
|
break; |
|
|
case MACHINE_ARC_NEC_R96: |
|
|
if (machine->use_x11) { |
|
|
uint64_t x; |
|
|
x = arcbios_addchild_manual(cpu, |
|
|
COMPONENT_CLASS_ControllerClass, |
|
|
COMPONENT_TYPE_DisplayController, |
|
|
COMPONENT_FLAG_ConsoleOut | |
|
|
COMPONENT_FLAG_Output, |
|
|
1, 2, 0, 0x0, "necvdfrb", |
|
|
jazzbus, NULL, 0); |
|
|
arcbios_addchild_manual(cpu, |
|
|
COMPONENT_CLASS_PeripheralClass, |
|
|
COMPONENT_TYPE_MonitorPeripheral, |
|
|
COMPONENT_FLAG_ConsoleOut | |
|
|
COMPONENT_FLAG_Output, |
|
|
1, 2, 0, 0xffffffff, "640x480", |
|
|
x, NULL, 0); |
|
|
} |
|
|
|
|
|
/* TODO: R[D]94 too? */ |
|
|
eisa = arcbios_addchild_manual(cpu, |
|
|
COMPONENT_CLASS_AdapterClass, |
|
|
COMPONENT_TYPE_EISAAdapter, |
|
|
0, 1, 2, 0, 0xffffffff, "EISA", |
|
|
system, NULL, 0); |
|
|
|
|
|
other = arcbios_addchild_manual(cpu, |
|
|
COMPONENT_CLASS_ControllerClass, |
|
|
COMPONENT_TYPE_OtherController, |
|
|
0, 1, 2, 0, 0xffffffff, "NEC1C01", |
|
|
eisa, NULL, 0); |
|
|
|
|
|
break; |
|
|
} |
|
|
} |
|
|
|
|
|
if (machine->machine_type == MACHINE_ARC && |
|
|
(machine->machine_subtype == MACHINE_ARC_JAZZ_PICA |
|
|
|| machine->machine_subtype == MACHINE_ARC_JAZZ_MAGNUM)) { |
|
|
uint64_t jazzbus, ali_s3, vxl; |
|
|
uint64_t diskcontroller, floppy, kbdctl, kbd; |
|
|
uint64_t ptrctl, ptr, paral, audio; |
|
|
uint64_t eisa, scsi; |
|
|
/* uint64_t serial1, serial2; */ |
|
|
|
|
|
jazzbus = arcbios_addchild_manual(cpu, |
|
|
COMPONENT_CLASS_AdapterClass, |
|
|
COMPONENT_TYPE_MultiFunctionAdapter, |
|
|
0, 1, 2, 0, 0xffffffff, "Jazz-Internal Bus", |
|
|
system, NULL, 0); |
|
|
|
|
|
/* |
|
|
* DisplayController, needed by NetBSD: |
|
|
* TODO: NetBSD still doesn't use it :( |
|
|
*/ |
|
|
switch (machine->machine_subtype) { |
|
|
case MACHINE_ARC_JAZZ_PICA: |
|
|
/* Default TLB entries on PICA-61: */ |
|
|
|
|
|
/* 7: 256K, asid: 0x0, v: 0xe1000000, |
|
|
p0: 0xfff00000(2.VG), p1: 0x0(0..G) */ |
|
|
mips_coproc_tlb_set_entry(cpu, 7, 262144, |
|
|
0xffffffffe1000000ULL, |
|
|
0x0fff00000ULL, 0, |
|
|
1, 0, 0, 0, 1, 0, 2, 0); |
|
|
|
|
|
/* 8: 64K, asid: 0x0, v: 0xe0000000, |
|
|
p0: 0x80000000(2DVG), p1: 0x0(0..G) */ |
|
|
mips_coproc_tlb_set_entry(cpu, 8, 65536, |
|
|
0xffffffffe0000000ULL, |
|
|
0x080000000ULL, 0, |
|
|
1, 0, 1, 0, 1, 0, 2, 0); |
|
|
|
|
|
/* 9: 64K, asid: 0x0, v: 0xe00e0000, |
|
|
p0: 0x800e0000(2DVG), p1: 0x800f0000(2DVG) */ |
|
|
mips_coproc_tlb_set_entry(cpu, 9, 65536, |
|
|
(uint64_t)0xffffffffe00e0000ULL, |
|
|
(uint64_t)0x0800e0000ULL, |
|
|
(uint64_t)0x0800f0000ULL, |
|
|
1, 1, 1, 1, 1, 0, 2, 2); |
|
|
|
|
|
/* 10: 4K, asid: 0x0, v: 0xe0100000, |
|
|
p0: 0xf0000000(2DVG), p1: 0x0(0..G) */ |
|
|
mips_coproc_tlb_set_entry(cpu, 10, 4096, |
|
|
(uint64_t)0xffffffffe0100000ULL, |
|
|
(uint64_t)0x0f0000000ULL, 0, |
|
|
1, 0, 1, 0, 1, 0, 2, 0); |
|
|
|
|
|
/* 11: 1M, asid: 0x0, v: 0xe0200000, |
|
|
p0: 0x60000000(2DVG), p1: 0x60100000(2DVG) */ |
|
|
mips_coproc_tlb_set_entry(cpu, 11, 1048576, |
|
|
0xffffffffe0200000ULL, |
|
|
0x060000000ULL, 0x060100000ULL, |
|
|
1, 1, 1, 1, 1, 0, 2, 2); |
|
|
|
|
|
/* 12: 1M, asid: 0x0, v: 0xe0400000, |
|
|
p0: 0x60200000(2DVG), p1: 0x60300000(2DVG) */ |
|
|
mips_coproc_tlb_set_entry(cpu, 12, 1048576, |
|
|
0xffffffffe0400000ULL, |
|
|
0x060200000ULL, 0x060300000ULL, |
|
|
1, 1, 1, 1, 1, 0, 2, 2); |
|
|
|
|
|
/* 13: 4M, asid: 0x0, v: 0xe0800000, |
|
|
p0: 0x40000000(2DVG), p1: 0x40400000(2DVG) */ |
|
|
mips_coproc_tlb_set_entry(cpu, 13, 1048576*4, |
|
|
0xffffffffe0800000ULL, |
|
|
0x040000000ULL, 0x040400000ULL, |
|
|
1, 1, 1, 1, 1, 0, 2, 2); |
|
|
|
|
|
/* 14: 16M, asid: 0x0, v: 0xe2000000, |
|
|
p0: 0x90000000(2DVG), p1: 0x91000000(2DVG) */ |
|
|
mips_coproc_tlb_set_entry(cpu, 14, 1048576*16, |
|
|
0xffffffffe2000000ULL, |
|
|
0x090000000ULL, 0x091000000ULL, |
|
|
1, 1, 1, 1, 1, 0, 2, 2); |
|
|
|
|
|
if (machine->use_x11) { |
|
|
ali_s3 = arcbios_addchild_manual(cpu, |
|
|
COMPONENT_CLASS_ControllerClass, |
|
|
COMPONENT_TYPE_DisplayController, |
|
|
COMPONENT_FLAG_ConsoleOut | |
|
|
COMPONENT_FLAG_Output, |
|
|
1, 2, 0, 0xffffffff, "ALI_S3", |
|
|
jazzbus, NULL, 0); |
|
|
|
|
|
arcbios_addchild_manual(cpu, |
|
|
COMPONENT_CLASS_PeripheralClass, |
|
|
COMPONENT_TYPE_MonitorPeripheral, |
|
|
COMPONENT_FLAG_ConsoleOut | |
|
|
COMPONENT_FLAG_Output, |
|
|
1, 2, 0, 0xffffffff, "1024x768", |
|
|
ali_s3, NULL, 0); |
|
|
} |
|
|
break; |
|
|
case MACHINE_ARC_JAZZ_MAGNUM: |
|
|
if (machine->use_x11) { |
|
|
vxl = arcbios_addchild_manual(cpu, |
|
|
COMPONENT_CLASS_ControllerClass, |
|
|
COMPONENT_TYPE_DisplayController, |
|
|
COMPONENT_FLAG_ConsoleOut | |
|
|
COMPONENT_FLAG_Output, |
|
|
1, 2, 0, 0xffffffff, "VXL", |
|
|
jazzbus, NULL, 0); |
|
|
|
|
|
arcbios_addchild_manual(cpu, |
|
|
COMPONENT_CLASS_PeripheralClass, |
|
|
COMPONENT_TYPE_MonitorPeripheral, |
|
|
COMPONENT_FLAG_ConsoleOut | |
|
|
COMPONENT_FLAG_Output, |
|
|
1, 2, 0, 0xffffffff, "1024x768", |
|
|
vxl, NULL, 0); |
|
|
} |
|
|
break; |
|
|
} |
|
|
|
|
|
diskcontroller = arcbios_addchild_manual(cpu, |
|
|
COMPONENT_CLASS_ControllerClass, |
|
|
COMPONENT_TYPE_DiskController, |
|
|
COMPONENT_FLAG_Input | |
|
|
COMPONENT_FLAG_Output, |
|
|
1, 2, 0, 0xffffffff, "I82077", |
|
|
jazzbus, NULL, 0); |
|
|
|
|
|
floppy = arcbios_addchild_manual(cpu, |
|
|
COMPONENT_CLASS_PeripheralClass, |
|
|
COMPONENT_TYPE_FloppyDiskPeripheral, |
|
|
COMPONENT_FLAG_Removable | |
|
|
COMPONENT_FLAG_Input | |
|
|
COMPONENT_FLAG_Output, |
|
|
1, 2, 0, 0xffffffff, NULL, |
|
|
diskcontroller, NULL, 0); |
|
|
|
|
|
kbdctl = arcbios_addchild_manual(cpu, |
|
|
COMPONENT_CLASS_ControllerClass, |
|
|
COMPONENT_TYPE_KeyboardController, |
|
|
COMPONENT_FLAG_ConsoleIn | |
|
|
COMPONENT_FLAG_Input, |
|
|
1, 2, 0, 0xffffffff, "I8742", |
|
|
jazzbus, NULL, 0); |
|
|
|
|
|
kbd = arcbios_addchild_manual(cpu, |
|
|
COMPONENT_CLASS_PeripheralClass, |
|
|
COMPONENT_TYPE_KeyboardPeripheral, |
|
|
COMPONENT_FLAG_ConsoleIn | |
|
|
COMPONENT_FLAG_Input, |
|
|
1, 2, 0, 0xffffffff, "PCAT_ENHANCED", |
|
|
kbdctl, NULL, 0); |
|
|
|
|
|
ptrctl = arcbios_addchild_manual(cpu, |
|
|
COMPONENT_CLASS_ControllerClass, |
|
|
COMPONENT_TYPE_PointerController, |
|
|
COMPONENT_FLAG_Input, |
|
|
1, 2, 0, 0xffffffff, "I8742", |
|
|
jazzbus, NULL, 0); |
|
|
|
|
|
ptr = arcbios_addchild_manual(cpu, |
|
|
COMPONENT_CLASS_PeripheralClass, |
|
|
COMPONENT_TYPE_PointerPeripheral, |
|
|
COMPONENT_FLAG_Input, |
|
|
1, 2, 0, 0xffffffff, "PS2 MOUSE", |
|
|
ptrctl, NULL, 0); |
|
|
|
|
|
/* These cause Windows NT to bug out. */ |
|
|
#if 0 |
|
|
serial1 = arcbios_addchild_manual(cpu, |
|
|
COMPONENT_CLASS_ControllerClass, |
|
|
COMPONENT_TYPE_SerialController, |
|
|
COMPONENT_FLAG_Input | |
|
|
COMPONENT_FLAG_Output, |
|
|
1, 2, 0, 0xffffffff, "COM1", |
|
|
jazzbus, NULL, 0); |
|
|
|
|
|
serial2 = arcbios_addchild_manual(cpu, |
|
|
COMPONENT_CLASS_ControllerClass, |
|
|
COMPONENT_TYPE_SerialController, |
|
|
COMPONENT_FLAG_Input | |
|
|
COMPONENT_FLAG_Output, |
|
|
1, 2, 0, 0xffffffff, "COM1", |
|
|
jazzbus, NULL, 0); |
|
|
#endif |
|
|
|
|
|
paral = arcbios_addchild_manual(cpu, |
|
|
COMPONENT_CLASS_ControllerClass, |
|
|
COMPONENT_TYPE_ParallelController, |
|
|
COMPONENT_FLAG_Input | |
|
|
COMPONENT_FLAG_Output, |
|
|
1, 2, 0, 0xffffffff, "LPT1", |
|
|
jazzbus, NULL, 0); |
|
|
|
|
|
audio = arcbios_addchild_manual(cpu, |
|
|
COMPONENT_CLASS_ControllerClass, |
|
|
COMPONENT_TYPE_AudioController, |
|
|
COMPONENT_FLAG_Input | |
|
|
COMPONENT_FLAG_Output, |
|
|
1, 2, 0, 0xffffffff, "MAGNUM", |
|
|
jazzbus, NULL, 0); |
|
|
|
|
|
eisa = arcbios_addchild_manual(cpu, |
|
|
COMPONENT_CLASS_AdapterClass, |
|
|
COMPONENT_TYPE_EISAAdapter, |
|
|
0, 1, 2, 0, 0xffffffff, "EISA", |
|
|
system, NULL, 0); |
|
|
|
|
|
{ |
|
|
unsigned char config[78]; |
|
|
memset(config, 0, sizeof(config)); |
|
|
|
|
|
/* config data version: 1, revision: 2, count: 4 */ |
|
|
config[0] = 0x01; config[1] = 0x00; |
|
|
config[2] = 0x02; config[3] = 0x00; |
|
|
config[4] = 0x04; config[5] = 0x00; config[6] = 0x00; config[7] = 0x00; |
|
|
|
|
|
/* |
|
|
type: Interrupt |
|
|
share_disposition: DeviceExclusive, flags: LevelSensitive |
|
|
level: 4, vector: 22, reserved1: 0 |
|
|
*/ |
|
|
config[8] = arc_CmResourceTypeInterrupt; |
|
|
config[9] = arc_CmResourceShareDeviceExclusive; |
|
|
config[10] = arc_CmResourceInterruptLevelSensitive; |
|
|
config[12] = 4; |
|
|
config[16] = 22; |
|
|
config[20] = 0; |
|
|
|
|
|
/* |
|
|
type: Memory |
|
|
share_disposition: DeviceExclusive, flags: ReadWrite |
|
|
start: 0x 0 80002000, length: 0x1000 |
|
|
*/ |
|
|
config[24] = arc_CmResourceTypeMemory; |
|
|
config[25] = arc_CmResourceShareDeviceExclusive; |
|
|
config[26] = arc_CmResourceMemoryReadWrite; |
|
|
config[28] = 0x00; config[29] = 0x20; config[30] = 0x00; config[31] = 0x80; |
|
|
config[32] = 0x00; config[33] = 0x00; config[34] = 0x00; config[35] = 0x00; |
|
|
config[36] = 0x00; config[37] = 0x10; config[38] = 0x00; config[39] = 0x00; |
|
|
|
|
|
/* |
|
|
type: DMA |
|
|
share_disposition: DeviceExclusive, flags: 0x0 |
|
|
channel: 0, port: 0, reserved1: 0 |
|
|
*/ |
|
|
config[40] = arc_CmResourceTypeDMA; |
|
|
config[41] = arc_CmResourceShareDeviceExclusive; |
|
|
/* 42..43 = flags, 44,45,46,47 = channel, 48,49,50,51 = port, 52,53,54,55 = reserved */ |
|
|
|
|
|
/* type: DeviceSpecific |
|
|
share_disposition: DeviceExclusive, flags: 0x0 |
|
|
datasize: 6, reserved1: 0, reserved2: 0 |
|
|
data: [0x1:0x0:0x2:0x0:0x7:0x30] |
|
|
*/ |
|
|
config[56] = arc_CmResourceTypeDeviceSpecific; |
|
|
config[57] = arc_CmResourceShareDeviceExclusive; |
|
|
/* 58,59 = flags 60,61,62,63 = data size, 64..71 = reserved */ |
|
|
config[60] = 6; |
|
|
/* 72..77 = the data */ |
|
|
config[72] = 0x01; |
|
|
config[73] = 0x00; |
|
|
config[74] = 0x02; |
|
|
config[75] = 0x00; |
|
|
config[76] = 0x07; |
|
|
config[77] = 0x30; |
|
|
scsi = arcbios_addchild_manual(cpu, |
|
|
COMPONENT_CLASS_AdapterClass, |
|
|
COMPONENT_TYPE_SCSIAdapter, |
|
|
0, 1, 2, 0, 0xffffffff, "ESP216", |
|
|
system, config, sizeof(config)); |
|
|
|
|
|
arcbios_register_scsicontroller(scsi); |
|
|
} |
|
|
|
|
|
} |
|
|
|
|
|
|
|
|
add_symbol_name(&machine->symbol_context, |
|
|
ARC_FIRMWARE_ENTRIES, 0x10000, "[ARCBIOS entry]", 0); |
|
|
|
|
|
switch (arc_wordlen) { |
|
|
case sizeof(uint64_t): |
|
|
for (i=0; i<100; i++) |
|
|
store_64bit_word(cpu, ARC_FIRMWARE_VECTORS + i*8, |
|
|
ARC_FIRMWARE_ENTRIES + i*8); |
|
|
for (i=0; i<100; i++) |
|
|
store_64bit_word(cpu, ARC_PRIVATE_VECTORS + i*8, |
|
|
ARC_PRIVATE_ENTRIES + i*8); |
|
|
break; |
|
|
default: |
|
|
for (i=0; i<100; i++) |
|
|
store_32bit_word(cpu, ARC_FIRMWARE_VECTORS + i*4, |
|
|
ARC_FIRMWARE_ENTRIES + i*4); |
|
|
for (i=0; i<100; i++) |
|
|
store_32bit_word(cpu, ARC_PRIVATE_VECTORS + i*4, |
|
|
ARC_PRIVATE_ENTRIES + i*4); |
|
|
} |
|
|
|
|
|
switch (arc_wordlen) { |
|
|
case sizeof(uint64_t): |
|
|
/* |
|
|
* ARCS64 SPD (TODO: This is just a guess) |
|
|
*/ |
|
|
memset(&arcbios_spb_64, 0, sizeof(arcbios_spb_64)); |
|
|
store_64bit_word_in_host(cpu, (unsigned char *)&arcbios_spb_64.SPBSignature, ARCBIOS_SPB_SIGNATURE); |
|
|
store_16bit_word_in_host(cpu, (unsigned char *)&arcbios_spb_64.Version, 64); |
|
|
store_16bit_word_in_host(cpu, (unsigned char *)&arcbios_spb_64.Revision, 0); |
|
|
store_64bit_word_in_host(cpu, (unsigned char *)&arcbios_spb_64.FirmwareVector, ARC_FIRMWARE_VECTORS); |
|
|
store_buf(cpu, SGI_SPB_ADDR, (char *)&arcbios_spb_64, sizeof(arcbios_spb_64)); |
|
|
break; |
|
|
default: /* 32-bit */ |
|
|
/* |
|
|
* ARCBIOS SPB: (For ARC and 32-bit SGI modes) |
|
|
*/ |
|
|
memset(&arcbios_spb, 0, sizeof(arcbios_spb)); |
|
|
store_32bit_word_in_host(cpu, (unsigned char *)&arcbios_spb.SPBSignature, ARCBIOS_SPB_SIGNATURE); |
|
|
store_32bit_word_in_host(cpu, (unsigned char *)&arcbios_spb.SPBLength, sizeof(arcbios_spb)); |
|
|
store_16bit_word_in_host(cpu, (unsigned char *)&arcbios_spb.Version, 1); |
|
|
store_16bit_word_in_host(cpu, (unsigned char *)&arcbios_spb.Revision, machine->machine_type == MACHINE_SGI? 10 : 2); |
|
|
store_32bit_word_in_host(cpu, (unsigned char *)&arcbios_spb.FirmwareVector, ARC_FIRMWARE_VECTORS); |
|
|
store_32bit_word_in_host(cpu, (unsigned char *)&arcbios_spb.FirmwareVectorLength, 100 * 4); /* ? */ |
|
|
store_32bit_word_in_host(cpu, (unsigned char *)&arcbios_spb.PrivateVector, ARC_PRIVATE_VECTORS); |
|
|
store_32bit_word_in_host(cpu, (unsigned char *)&arcbios_spb.PrivateVectorLength, 100 * 4); /* ? */ |
|
|
store_buf(cpu, SGI_SPB_ADDR, (char *)&arcbios_spb, sizeof(arcbios_spb)); |
|
|
} |
|
|
|
|
3538 |
/* |
/* |
3539 |
* Boot string in ARC format: |
* Boot string in ARC format: |
3540 |
* |
* |
3554 |
/* TODO: Make this nicer. */ |
/* TODO: Make this nicer. */ |
3555 |
if (machine->machine_type == MACHINE_SGI) { |
if (machine->machine_type == MACHINE_SGI) { |
3556 |
if (machine->machine_subtype == 30) |
if (machine->machine_subtype == 30) |
3557 |
strcat(init_bootpath, "xio(0)pci(15)"); |
strlcat(init_bootpath, "xio(0)pci(15)", |
3558 |
|
MACHINE_NAME_MAXBUF); |
3559 |
if (machine->machine_subtype == 32) |
if (machine->machine_subtype == 32) |
3560 |
strcat(init_bootpath, "pci(0)"); |
strlcat(init_bootpath, "pci(0)", |
3561 |
|
MACHINE_NAME_MAXBUF); |
3562 |
} |
} |
3563 |
|
|
3564 |
if (diskimage_is_a_cdrom(machine, bootdev_id)) |
if (diskimage_is_a_cdrom(machine, bootdev_id, |
3565 |
snprintf(init_bootpath + strlen(init_bootpath), 400, |
bootdev_type)) |
3566 |
"scsi(0)cdrom(%i)fdisk(0)", bootdev_id); |
snprintf(init_bootpath + strlen(init_bootpath), |
3567 |
|
400,"scsi(0)cdrom(%i)fdisk(0)", bootdev_id); |
3568 |
else |
else |
3569 |
snprintf(init_bootpath + strlen(init_bootpath), 400, |
snprintf(init_bootpath + strlen(init_bootpath), |
3570 |
"scsi(0)disk(%i)rdisk(0)partition(1)", bootdev_id); |
400,"scsi(0)disk(%i)rdisk(0)partition(1)", |
3571 |
|
bootdev_id); |
3572 |
} |
} |
3573 |
|
|
3574 |
if (machine->machine_type == MACHINE_ARC) |
if (machine->machine_type == MACHINE_ARC) |
3575 |
strcat(init_bootpath, "\\"); |
strlcat(init_bootpath, "\\", MACHINE_NAME_MAXBUF); |
3576 |
|
|
3577 |
bootstr = malloc(strlen(init_bootpath) + |
bootstr = malloc(BOOTSTR_BUFLEN); |
3578 |
strlen(machine->boot_kernel_filename) + 1); |
if (bootstr == NULL) { |
3579 |
strcpy(bootstr, init_bootpath); |
fprintf(stderr, "out of memory\n"); |
3580 |
strcat(bootstr, machine->boot_kernel_filename); |
exit(1); |
3581 |
|
} |
3582 |
|
strlcpy(bootstr, init_bootpath, BOOTSTR_BUFLEN); |
3583 |
|
if (strlcat(bootstr, machine->boot_kernel_filename, |
3584 |
|
BOOTSTR_BUFLEN) >= BOOTSTR_BUFLEN) { |
3585 |
|
fprintf(stderr, "boot string too long?\n"); |
3586 |
|
exit(1); |
3587 |
|
} |
3588 |
|
|
3589 |
/* Boot args., eg "-a" */ |
/* Boot args., eg "-a" */ |
3590 |
bootarg = machine->boot_string_argument; |
bootarg = machine->boot_string_argument; |
3593 |
cpu->cd.mips.gpr[MIPS_GPR_A0] = 0; /* note: argc is increased later */ |
cpu->cd.mips.gpr[MIPS_GPR_A0] = 0; /* note: argc is increased later */ |
3594 |
|
|
3595 |
/* TODO: not needed? */ |
/* TODO: not needed? */ |
3596 |
cpu->cd.mips.gpr[MIPS_GPR_SP] = machine->physical_ram_in_mb * 1048576 + 0x80000000 - 0x2080; |
cpu->cd.mips.gpr[MIPS_GPR_SP] = (int64_t)(int32_t) |
3597 |
|
(machine->physical_ram_in_mb * 1048576 + 0x80000000 - 0x2080); |
3598 |
|
|
3599 |
/* Set up argc/argv: */ |
/* Set up argc/argv: */ |
3600 |
addr = ARC_ENV_STRINGS; |
addr = ARC_ENV_STRINGS; |
3712 |
add_environment_string(cpu, "kernname=unix", &addr); |
add_environment_string(cpu, "kernname=unix", &addr); |
3713 |
} else { |
} else { |
3714 |
char *tmp; |
char *tmp; |
3715 |
tmp = malloc(strlen(bootarg) + strlen("OSLOADOPTIONS=") + 2); |
size_t mlen = strlen(bootarg) + strlen("OSLOADOPTIONS=") + 2; |
3716 |
sprintf(tmp, "OSLOADOPTIONS=%s", bootarg); |
tmp = malloc(mlen); |
3717 |
|
snprintf(tmp, mlen, "OSLOADOPTIONS=%s", bootarg); |
3718 |
store_pointer_and_advance(cpu, &addr2, addr, arc_wordlen==sizeof(uint64_t)); |
store_pointer_and_advance(cpu, &addr2, addr, arc_wordlen==sizeof(uint64_t)); |
3719 |
add_environment_string(cpu, tmp, &addr); |
add_environment_string(cpu, tmp, &addr); |
3720 |
|
|
3748 |
|
|
3749 |
/* First of all, the MeshCube has an Au1500 in it: */ |
/* First of all, the MeshCube has an Au1500 in it: */ |
3750 |
machine->md_interrupt = au1x00_interrupt; |
machine->md_interrupt = au1x00_interrupt; |
3751 |
machine->au1x00_ic_data = dev_au1x00_init(machine, mem); |
machine->md_int.au1x00_ic_data = dev_au1x00_init(machine, mem); |
3752 |
|
|
3753 |
/* |
/* |
3754 |
* TODO: Which non-Au1500 devices, and at what addresses? |
* TODO: Which non-Au1500 devices, and at what addresses? |
3796 |
device_add(machine, "8250 addr=0x18000800 addr_mult=4 irq=0"); |
device_add(machine, "8250 addr=0x18000800 addr_mult=4 irq=0"); |
3797 |
break; |
break; |
3798 |
|
|
|
case MACHINE_WRT54G: |
|
|
machine->machine_name = "Linksys WRT54G"; |
|
|
|
|
|
if (machine->use_x11) |
|
|
fprintf(stderr, "WARNING! Linksys WRT54G with -X is meaningless. Continuing anyway.\n"); |
|
|
|
|
|
/* 200 MHz default */ |
|
|
if (machine->emulated_hz == 0) |
|
|
machine->emulated_hz = 200000000; |
|
|
|
|
|
/* |
|
|
* Linux should be loaded at 0x80001000. |
|
|
* RAM: 16 or 32 MB, Flash RAM: 4 or 8 MB. |
|
|
* http://www.bumpclub.ee/~jaanus/wrt54g/vana/minicom.cap: |
|
|
* |
|
|
* Starting program at 0x80001000 |
|
|
* CPU revision is: 00029007 |
|
|
* Primary instruction cache 8kb, linesize 16 bytes (2 ways) |
|
|
* Primary data cache 4kb, linesize 16 bytes (2 ways) |
|
|
* memory: 01000000 @ 00000000 (usable) |
|
|
* Kernel command line: root=/dev/mtdblock2 rootfstype=squashfs init=/etc/preinit noinitrd console=ttyS0,115200 |
|
|
* CPU: BCM4712 rev 1 at 200 MHz |
|
|
* Calibrating delay loop... 199.47 BogoMIPS |
|
|
* ttyS00 at 0xb8000300 (irq = 3) is a 16550A |
|
|
* ttyS01 at 0xb8000400 (irq = 0) is a 16550A |
|
|
* Flash device: 0x400000 at 0x1c000000 |
|
|
* .. |
|
|
*/ |
|
|
|
|
|
/* TODO: What should the initial register contents be? */ |
|
|
#if 1 |
|
|
{ |
|
|
int i; |
|
|
for (i=0; i<32; i++) |
|
|
cpu->cd.mips.gpr[i] = 0x01230000 + (i << 8) + 0x55; |
|
|
} |
|
|
#endif |
|
|
|
|
|
break; |
|
|
|
|
3799 |
case MACHINE_SONYNEWS: |
case MACHINE_SONYNEWS: |
3800 |
/* |
/* |
3801 |
* There are several models, according to |
* There are several models, according to |
3833 |
|
|
3834 |
break; |
break; |
3835 |
|
|
3836 |
|
case MACHINE_EVBMIPS: |
3837 |
|
/* http://www.netbsd.org/Ports/evbmips/ */ |
3838 |
|
cpu->byte_order = EMUL_LITTLE_ENDIAN; |
3839 |
|
|
3840 |
|
switch (machine->machine_subtype) { |
3841 |
|
case MACHINE_EVBMIPS_MALTA: |
3842 |
|
case MACHINE_EVBMIPS_MALTA_BE: |
3843 |
|
machine->machine_name = "MALTA (evbmips, little endian)"; |
3844 |
|
cpu->byte_order = EMUL_LITTLE_ENDIAN; |
3845 |
|
|
3846 |
|
if (machine->machine_subtype == MACHINE_EVBMIPS_MALTA_BE) { |
3847 |
|
machine->machine_name = "MALTA (evbmips, big endian)"; |
3848 |
|
cpu->byte_order = EMUL_BIG_ENDIAN; |
3849 |
|
} |
3850 |
|
|
3851 |
|
/* ISA interrupt controllers: */ |
3852 |
|
snprintf(tmpstr, sizeof(tmpstr), "8259 irq=24 addr=0x18000020"); |
3853 |
|
machine->md_int.isa_pic_data.pic1 = device_add(machine, tmpstr); |
3854 |
|
snprintf(tmpstr, sizeof(tmpstr), "8259 irq=24 addr=0x180000a0"); |
3855 |
|
machine->md_int.isa_pic_data.pic2 = device_add(machine, tmpstr); |
3856 |
|
machine->md_interrupt = malta_interrupt; |
3857 |
|
|
3858 |
|
dev_mc146818_init(machine, mem, 0x18000070, 8 + 8, MC146818_PC_CMOS, 1); |
3859 |
|
|
3860 |
|
machine->main_console_handle = (size_t) |
3861 |
|
device_add(machine, "ns16550 irq=12 addr=0x180003f8 name2=tty0"); |
3862 |
|
device_add(machine, "ns16550 irq=11 addr=0x180002f8 name2=tty1"); |
3863 |
|
|
3864 |
|
snprintf(tmpstr, sizeof(tmpstr), "ns16550 irq=4 addr=0x%x name2=tty2", MALTA_CBUSUART); |
3865 |
|
device_add(machine, tmpstr); |
3866 |
|
/* TODO: Irqs */ |
3867 |
|
pci_data = dev_gt_init(machine, mem, 0x1be00000, 8+9, 8+9, 120); |
3868 |
|
|
3869 |
|
/* TODO: Haha, this is bogus. Just a cut&paste |
3870 |
|
from the Cobalt emulation above. */ |
3871 |
|
bus_pci_add(machine, pci_data, mem, 0, 9, 0, pci_vt82c586_isa_init, pci_vt82c586_isa_rr); |
3872 |
|
bus_pci_add(machine, pci_data, mem, 0, 9, 1, pci_vt82c586_ide_init, pci_vt82c586_ide_rr); |
3873 |
|
|
3874 |
|
device_add(machine, "malta_lcd addr=0x1f000400"); |
3875 |
|
break; |
3876 |
|
case MACHINE_EVBMIPS_PB1000: |
3877 |
|
machine->machine_name = "PB1000 (evbmips)"; |
3878 |
|
cpu->byte_order = EMUL_BIG_ENDIAN; |
3879 |
|
|
3880 |
|
machine->md_interrupt = au1x00_interrupt; |
3881 |
|
machine->md_int.au1x00_ic_data = dev_au1x00_init(machine, mem); |
3882 |
|
/* TODO */ |
3883 |
|
break; |
3884 |
|
default: |
3885 |
|
fatal("Unimplemented EVBMIPS model.\n"); |
3886 |
|
exit(1); |
3887 |
|
} |
3888 |
|
|
3889 |
|
if (machine->prom_emulation) { |
3890 |
|
/* This is just a test. TODO */ |
3891 |
|
for (i=0; i<32; i++) |
3892 |
|
cpu->cd.mips.gpr[i] = |
3893 |
|
0x01230000 + (i << 8) + 0x55; |
3894 |
|
|
3895 |
|
/* NetBSD/evbmips wants these: (at least for Malta) */ |
3896 |
|
|
3897 |
|
/* a0 = argc */ |
3898 |
|
cpu->cd.mips.gpr[MIPS_GPR_A0] = 2; |
3899 |
|
|
3900 |
|
/* a1 = argv */ |
3901 |
|
cpu->cd.mips.gpr[MIPS_GPR_A1] = (int32_t)0x9fc01000; |
3902 |
|
store_32bit_word(cpu, (int32_t)0x9fc01000, 0x9fc01040); |
3903 |
|
store_32bit_word(cpu, (int32_t)0x9fc01004, 0x9fc01200); |
3904 |
|
store_32bit_word(cpu, (int32_t)0x9fc01008, 0); |
3905 |
|
|
3906 |
|
bootstr = strdup(machine->boot_kernel_filename); |
3907 |
|
bootarg = strdup(machine->boot_string_argument); |
3908 |
|
store_string(cpu, (int32_t)0x9fc01040, bootstr); |
3909 |
|
store_string(cpu, (int32_t)0x9fc01200, bootarg); |
3910 |
|
|
3911 |
|
/* a2 = (yamon_env_var *)envp */ |
3912 |
|
cpu->cd.mips.gpr[MIPS_GPR_A2] = (int32_t)0x9fc01800; |
3913 |
|
{ |
3914 |
|
uint64_t env = cpu->cd.mips.gpr[MIPS_GPR_A2]; |
3915 |
|
uint64_t tmpptr = 0xffffffff9fc01c00ULL; |
3916 |
|
char tmps[50]; |
3917 |
|
|
3918 |
|
snprintf(tmps, sizeof(tmps), "0x%08x", |
3919 |
|
machine->physical_ram_in_mb * 1048576); |
3920 |
|
add_environment_string_dual(cpu, |
3921 |
|
&env, &tmpptr, "memsize", tmps); |
3922 |
|
|
3923 |
|
add_environment_string_dual(cpu, |
3924 |
|
&env, &tmpptr, "yamonrev", "02.06"); |
3925 |
|
|
3926 |
|
/* End of env: */ |
3927 |
|
tmpptr = 0; |
3928 |
|
add_environment_string_dual(cpu, |
3929 |
|
&env, &tmpptr, NULL, NULL); |
3930 |
|
} |
3931 |
|
|
3932 |
|
/* a3 = memsize */ |
3933 |
|
cpu->cd.mips.gpr[MIPS_GPR_A3] = |
3934 |
|
machine->physical_ram_in_mb * 1048576; |
3935 |
|
/* Hm. Linux ignores a3. */ |
3936 |
|
|
3937 |
|
/* |
3938 |
|
* TODO: |
3939 |
|
* Core ID numbers. |
3940 |
|
* How much of this is not valid for PBxxxx? |
3941 |
|
* |
3942 |
|
* See maltareg.h for more info. |
3943 |
|
*/ |
3944 |
|
store_32bit_word(cpu, (int32_t)(0x80000000 + MALTA_REVISION), (1 << 10) + 0x26); |
3945 |
|
|
3946 |
|
/* Call vectors at 0x9fc005xx: */ |
3947 |
|
for (i=0; i<0x100; i+=4) |
3948 |
|
store_32bit_word(cpu, (int64_t)(int32_t)0x9fc00500 + i, |
3949 |
|
(int64_t)(int32_t)0x9fc00800 + i); |
3950 |
|
} |
3951 |
|
break; |
3952 |
|
|
3953 |
|
case MACHINE_PSP: |
3954 |
|
/* |
3955 |
|
* The Playstation Portable seems to be a strange beast. |
3956 |
|
* |
3957 |
|
* http://yun.cup.com/psppg004.html (in Japanese) seems to |
3958 |
|
* suggest that virtual addresses are not displaced by |
3959 |
|
* 0x80000000 as on normal CPUs, but by 0x40000000? |
3960 |
|
*/ |
3961 |
|
machine->machine_name = "Playstation Portable"; |
3962 |
|
cpu->byte_order = EMUL_LITTLE_ENDIAN; |
3963 |
|
|
3964 |
|
if (!machine->use_x11 && !quiet_mode) |
3965 |
|
fprintf(stderr, "-------------------------------------" |
3966 |
|
"------------------------------------------\n" |
3967 |
|
"\n WARNING! You are emulating a PSP without -X. " |
3968 |
|
"You will miss graphical output!\n\n" |
3969 |
|
"-------------------------------------" |
3970 |
|
"------------------------------------------\n"); |
3971 |
|
|
3972 |
|
/* 480 x 272 pixels framebuffer (512 bytes per line) */ |
3973 |
|
fb = dev_fb_init(machine, mem, 0x04000000, VFB_HPCMIPS, |
3974 |
|
480,272, 512,1088, -15, "Playstation Portable"); |
3975 |
|
|
3976 |
|
/* |
3977 |
|
* TODO/NOTE: This is ugly, but necessary since GXemul doesn't |
3978 |
|
* emulate any MIPS CPU without MMU right now. |
3979 |
|
*/ |
3980 |
|
mips_coproc_tlb_set_entry(cpu, 0, 1048576*16, |
3981 |
|
0x44000000 /*vaddr*/, 0x4000000, 0x4000000 + 1048576*16, |
3982 |
|
1,1,1,1,1, 0, 2, 2); |
3983 |
|
mips_coproc_tlb_set_entry(cpu, 1, 1048576*16, |
3984 |
|
0x8000000 /*vaddr*/, 0x0, 0x0 + 1048576*16, |
3985 |
|
1,1,1,1,1, 0, 2, 2); |
3986 |
|
mips_coproc_tlb_set_entry(cpu, 2, 1048576*16, |
3987 |
|
0x9000000 /*vaddr*/, 0x01000000, 0x01000000 + 1048576*16, |
3988 |
|
1,1,1,1,1, 0, 2, 2); |
3989 |
|
mips_coproc_tlb_set_entry(cpu, 3, 1048576*16, |
3990 |
|
0x0 /*vaddr*/, 0, 0 + 1048576*16, 1,1,1,1,1, 0, 2, 2); |
3991 |
|
|
3992 |
|
cpu->cd.mips.gpr[MIPS_GPR_SP] = 0xfff0; |
3993 |
|
|
3994 |
|
break; |
3995 |
|
#endif /* ENABLE_MIPS */ |
3996 |
|
|
3997 |
|
#ifdef ENABLE_PPC |
3998 |
case MACHINE_BAREPPC: |
case MACHINE_BAREPPC: |
3999 |
/* |
/* |
4000 |
* A "bare" PPC machine. |
* A "bare" PPC machine. |
4011 |
machine->machine_name = "PPC test machine"; |
machine->machine_name = "PPC test machine"; |
4012 |
|
|
4013 |
/* TODO: interrupt for PPC? */ |
/* TODO: interrupt for PPC? */ |
4014 |
machine->main_console_handle = dev_cons_init( |
snprintf(tmpstr, sizeof(tmpstr), "cons addr=0x%llx irq=0", |
4015 |
machine, mem, DEV_CONS_ADDRESS, "console", 0); |
(long long)DEV_CONS_ADDRESS); |
4016 |
|
cons_data = device_add(machine, tmpstr); |
4017 |
|
machine->main_console_handle = cons_data->console_handle; |
4018 |
|
|
4019 |
snprintf(tmpstr, sizeof(tmpstr) - 1, "mp addr=0x%llx", |
snprintf(tmpstr, sizeof(tmpstr), "mp addr=0x%llx", |
4020 |
(long long)DEV_MP_ADDRESS); |
(long long)DEV_MP_ADDRESS); |
4021 |
device_add(machine, tmpstr); |
device_add(machine, tmpstr); |
4022 |
|
|
4023 |
fb = dev_fb_init(machine, mem, 0x12000000, VFB_GENERIC, |
fb = dev_fb_init(machine, mem, DEV_FB_ADDRESS, VFB_GENERIC, |
4024 |
640,480, 640,480, 24, "generic", 1); |
640,480, 640,480, 24, "testppc generic"); |
4025 |
|
|
4026 |
|
snprintf(tmpstr, sizeof(tmpstr), "disk addr=0x%llx", |
4027 |
|
(long long)DEV_DISK_ADDRESS); |
4028 |
|
device_add(machine, tmpstr); |
4029 |
|
|
4030 |
|
snprintf(tmpstr, sizeof(tmpstr), "ether addr=0x%llx irq=0", |
4031 |
|
(long long)DEV_ETHER_ADDRESS); |
4032 |
|
device_add(machine, tmpstr); |
4033 |
|
|
4034 |
break; |
break; |
4035 |
|
|
4036 |
case MACHINE_WALNUT: |
case MACHINE_WALNUT: |
4050 |
dev_pmppc_init(mem); |
dev_pmppc_init(mem); |
4051 |
|
|
4052 |
/* com0 = 0xff600300, com1 = 0xff600400 */ |
/* com0 = 0xff600300, com1 = 0xff600400 */ |
4053 |
machine->main_console_handle = dev_ns16550_init(machine, mem, |
|
4054 |
0xff600300, 0, 1, 1, "serial 0"); |
machine->main_console_handle = (size_t)device_add(machine, "ns16550 irq=0 addr=0xff600300 name2=tty0"); |
4055 |
dev_ns16550_init(machine, mem, |
device_add(machine, "ns16550 irq=0 addr=0xff600400 in_use=0 name2=tty1"); |
|
0xff600400, 0, 1, 0, "serial 1"); |
|
4056 |
|
|
4057 |
break; |
break; |
4058 |
|
|
4079 |
|
|
4080 |
device_add(machine, "bebox"); |
device_add(machine, "bebox"); |
4081 |
|
|
4082 |
/* Serial, used by NetBSD: */ |
machine->main_console_handle = (size_t) |
4083 |
machine->main_console_handle = dev_ns16550_init(machine, mem, |
device_add(machine, "ns16550 irq=0 addr=0x800003f8 name2=tty0"); |
4084 |
0x800003f8, 0, 1, 1, "serial 0"); |
device_add(machine, "ns16550 irq=0 addr=0x800002f8 name2=tty1 in_use=0"); |
4085 |
|
|
4086 |
/* Serial, used by Linux: */ |
if (machine->use_x11) |
4087 |
dev_ns16550_init(machine, mem, 0x800002f8, 0, 1, 0, "serial 1"); |
dev_vga_init(machine, mem, 0xc00a0000ULL, 0x800003c0ULL, |
4088 |
|
machine->machine_name); |
|
/* This is used by Linux too: */ |
|
|
dev_vga_init(machine, mem, 0xc00b8000ULL, 0x800003c0ULL, 80, 25, |
|
|
machine->machine_name); |
|
4089 |
|
|
4090 |
store_32bit_word(cpu, 0x3010, |
store_32bit_word(cpu, 0x3010, |
4091 |
machine->physical_ram_in_mb * 1048576); |
machine->physical_ram_in_mb * 1048576); |
4112 |
|
|
4113 |
store_32bit_word(cpu, cpu->cd.ppc.gpr[6] + 12, 20); /* next */ |
store_32bit_word(cpu, cpu->cd.ppc.gpr[6] + 12, 20); /* next */ |
4114 |
store_32bit_word(cpu, cpu->cd.ppc.gpr[6] + 16, 1); /* console */ |
store_32bit_word(cpu, cpu->cd.ppc.gpr[6] + 16, 1); /* console */ |
4115 |
store_buf(cpu, cpu->cd.ppc.gpr[6] + 20, "com", 4); |
store_buf(cpu, cpu->cd.ppc.gpr[6] + 20, |
4116 |
|
machine->use_x11? "vga" : "com", 4); |
4117 |
store_32bit_word(cpu, cpu->cd.ppc.gpr[6] + 24, 0x3f8);/* addr */ |
store_32bit_word(cpu, cpu->cd.ppc.gpr[6] + 24, 0x3f8);/* addr */ |
4118 |
store_32bit_word(cpu, cpu->cd.ppc.gpr[6] + 28, 9600);/* speed */ |
store_32bit_word(cpu, cpu->cd.ppc.gpr[6] + 28, 9600);/* speed */ |
4119 |
|
|
4162 |
/* For playing with PMON2000 for PPC: */ |
/* For playing with PMON2000 for PPC: */ |
4163 |
machine->machine_name = "DB64360"; |
machine->machine_name = "DB64360"; |
4164 |
|
|
4165 |
machine->main_console_handle = dev_ns16550_init(machine, mem, |
machine->main_console_handle = (size_t)device_add(machine, "ns16550 irq=0 addr=0x1d000020"); |
|
0x1d000020, 0, 4, 1, "serial console"); |
|
4166 |
|
|
4167 |
{ |
{ |
4168 |
int i; |
int i; |
4172 |
} |
} |
4173 |
|
|
4174 |
break; |
break; |
4175 |
|
#endif /* ENABLE_PPC */ |
4176 |
|
|
4177 |
|
#ifdef ENABLE_SPARC |
4178 |
case MACHINE_BARESPARC: |
case MACHINE_BARESPARC: |
4179 |
/* A bare SPARC machine, with no devices. */ |
/* A bare SPARC machine, with no devices. */ |
4180 |
machine->machine_name = "\"Bare\" SPARC machine"; |
machine->machine_name = "\"Bare\" SPARC machine"; |
4181 |
break; |
break; |
4182 |
|
|
4183 |
|
case MACHINE_TESTSPARC: |
4184 |
|
machine->machine_name = "SPARC test machine"; |
4185 |
|
|
4186 |
|
snprintf(tmpstr, sizeof(tmpstr), "cons addr=0x%llx irq=0", |
4187 |
|
(long long)DEV_CONS_ADDRESS); |
4188 |
|
cons_data = device_add(machine, tmpstr); |
4189 |
|
machine->main_console_handle = cons_data->console_handle; |
4190 |
|
|
4191 |
|
snprintf(tmpstr, sizeof(tmpstr), "mp addr=0x%llx", |
4192 |
|
(long long)DEV_MP_ADDRESS); |
4193 |
|
device_add(machine, tmpstr); |
4194 |
|
|
4195 |
|
fb = dev_fb_init(machine, mem, DEV_FB_ADDRESS, VFB_GENERIC, |
4196 |
|
640,480, 640,480, 24, "testsparc generic"); |
4197 |
|
|
4198 |
|
snprintf(tmpstr, sizeof(tmpstr), "disk addr=0x%llx", |
4199 |
|
(long long)DEV_DISK_ADDRESS); |
4200 |
|
device_add(machine, tmpstr); |
4201 |
|
|
4202 |
|
snprintf(tmpstr, sizeof(tmpstr), "ether addr=0x%llx irq=0", |
4203 |
|
(long long)DEV_ETHER_ADDRESS); |
4204 |
|
device_add(machine, tmpstr); |
4205 |
|
|
4206 |
|
break; |
4207 |
|
|
4208 |
case MACHINE_ULTRA1: |
case MACHINE_ULTRA1: |
4209 |
/* |
/* |
4210 |
* NetBSD/sparc64 (http://www.netbsd.org/Ports/sparc64/) |
* NetBSD/sparc64 (http://www.netbsd.org/Ports/sparc64/) |
4212 |
*/ |
*/ |
4213 |
machine->machine_name = "Sun Ultra1"; |
machine->machine_name = "Sun Ultra1"; |
4214 |
break; |
break; |
4215 |
|
#endif /* ENABLE_SPARC */ |
4216 |
|
|
4217 |
case MACHINE_BAREURISC: |
#ifdef ENABLE_ALPHA |
4218 |
machine->machine_name = "\"Bare\" URISC machine"; |
case MACHINE_BAREALPHA: |
4219 |
|
machine->machine_name = "\"Bare\" Alpha machine"; |
4220 |
break; |
break; |
4221 |
|
|
4222 |
case MACHINE_TESTURISC: |
case MACHINE_TESTALPHA: |
4223 |
machine->machine_name = "URISC test machine"; |
machine->machine_name = "Alpha test machine"; |
4224 |
|
|
4225 |
|
snprintf(tmpstr, sizeof(tmpstr), "cons addr=0x%llx irq=0", |
4226 |
|
(long long)DEV_CONS_ADDRESS); |
4227 |
|
cons_data = device_add(machine, tmpstr); |
4228 |
|
machine->main_console_handle = cons_data->console_handle; |
4229 |
|
|
4230 |
|
snprintf(tmpstr, sizeof(tmpstr), "mp addr=0x%llx", |
4231 |
|
(long long)DEV_MP_ADDRESS); |
4232 |
|
device_add(machine, tmpstr); |
4233 |
|
|
4234 |
/* TODO */ |
fb = dev_fb_init(machine, mem, DEV_FB_ADDRESS, VFB_GENERIC, |
4235 |
/* A special "device" for accessing normal devices |
640,480, 640,480, 24, "testalpha generic"); |
|
using urisc accesses? */ |
|
4236 |
|
|
4237 |
device_add(machine, "urisc addr=0x12341234"); |
snprintf(tmpstr, sizeof(tmpstr), "disk addr=0x%llx", |
4238 |
|
(long long)DEV_DISK_ADDRESS); |
4239 |
|
device_add(machine, tmpstr); |
4240 |
|
|
4241 |
|
snprintf(tmpstr, sizeof(tmpstr), "ether addr=0x%llx irq=0", |
4242 |
|
(long long)DEV_ETHER_ADDRESS); |
4243 |
|
device_add(machine, tmpstr); |
4244 |
|
|
4245 |
|
break; |
4246 |
|
|
4247 |
|
case MACHINE_ALPHA: |
4248 |
|
/* TODO: Most of these... They are used by NetBSD/alpha: */ |
4249 |
|
/* a0 = First free Page Frame Number */ |
4250 |
|
/* a1 = PFN of current Level 1 page table */ |
4251 |
|
/* a2 = Bootinfo magic */ |
4252 |
|
/* a3 = Bootinfo pointer */ |
4253 |
|
/* a4 = Bootinfo version */ |
4254 |
|
cpu->cd.alpha.r[ALPHA_A0] = 16*1024*1024 / 8192; |
4255 |
|
cpu->cd.alpha.r[ALPHA_A1] = 0; |
4256 |
|
cpu->cd.alpha.r[ALPHA_A2] = 0; |
4257 |
|
cpu->cd.alpha.r[ALPHA_A3] = 0; |
4258 |
|
cpu->cd.alpha.r[ALPHA_A4] = 0; |
4259 |
|
|
4260 |
|
if (machine->prom_emulation) { |
4261 |
|
struct rpb rpb; |
4262 |
|
struct crb crb; |
4263 |
|
struct ctb ctb; |
4264 |
|
|
4265 |
|
/* HWRPB: Hardware Restart Parameter Block */ |
4266 |
|
memset(&rpb, 0, sizeof(struct rpb)); |
4267 |
|
store_64bit_word_in_host(cpu, (unsigned char *) |
4268 |
|
&(rpb.rpb_phys), HWRPB_ADDR); |
4269 |
|
strlcpy((char *)&(rpb.rpb_magic), "HWRPB", 8); |
4270 |
|
store_64bit_word_in_host(cpu, (unsigned char *) |
4271 |
|
&(rpb.rpb_size), sizeof(struct rpb)); |
4272 |
|
store_64bit_word_in_host(cpu, (unsigned char *) |
4273 |
|
&(rpb.rpb_page_size), 8192); |
4274 |
|
store_64bit_word_in_host(cpu, (unsigned char *) |
4275 |
|
&(rpb.rpb_type), machine->machine_subtype); |
4276 |
|
store_64bit_word_in_host(cpu, (unsigned char *) |
4277 |
|
&(rpb.rpb_cc_freq), 100000000); |
4278 |
|
store_64bit_word_in_host(cpu, (unsigned char *) |
4279 |
|
&(rpb.rpb_ctb_off), CTB_ADDR - HWRPB_ADDR); |
4280 |
|
store_64bit_word_in_host(cpu, (unsigned char *) |
4281 |
|
&(rpb.rpb_crb_off), CRB_ADDR - HWRPB_ADDR); |
4282 |
|
|
4283 |
|
/* CTB: Console Terminal Block */ |
4284 |
|
memset(&ctb, 0, sizeof(struct ctb)); |
4285 |
|
store_64bit_word_in_host(cpu, (unsigned char *) |
4286 |
|
&(ctb.ctb_term_type), machine->use_x11? |
4287 |
|
CTB_GRAPHICS : CTB_PRINTERPORT); |
4288 |
|
|
4289 |
|
/* CRB: Console Routine Block */ |
4290 |
|
memset(&crb, 0, sizeof(struct crb)); |
4291 |
|
store_64bit_word_in_host(cpu, (unsigned char *) |
4292 |
|
&(crb.crb_v_dispatch), CRB_ADDR - 0x100); |
4293 |
|
store_64bit_word(cpu, CRB_ADDR - 0x100 + 8, 0x10000); |
4294 |
|
|
4295 |
|
/* |
4296 |
|
* Place a special "hack" palcode call at 0x10000: |
4297 |
|
* (Hopefully nothing else will be there.) |
4298 |
|
*/ |
4299 |
|
store_32bit_word(cpu, 0x10000, 0x3fffffe); |
4300 |
|
|
4301 |
|
store_buf(cpu, HWRPB_ADDR, (char *)&rpb, sizeof(struct rpb)); |
4302 |
|
store_buf(cpu, CTB_ADDR, (char *)&ctb, sizeof(struct ctb)); |
4303 |
|
store_buf(cpu, CRB_ADDR, (char *)&crb, sizeof(struct crb)); |
4304 |
|
} |
4305 |
|
|
4306 |
|
switch (machine->machine_subtype) { |
4307 |
|
case ST_DEC_3000_300: |
4308 |
|
machine->machine_name = "DEC 3000/300"; |
4309 |
|
break; |
4310 |
|
default:fatal("Unimplemented Alpha machine type %i\n", |
4311 |
|
machine->machine_subtype); |
4312 |
|
exit(1); |
4313 |
|
} |
4314 |
|
|
4315 |
break; |
break; |
4316 |
|
#endif /* ENABLE_ALPHA */ |
4317 |
|
|
4318 |
case MACHINE_BAREHPPA: |
#ifdef ENABLE_ARM |
4319 |
machine->machine_name = "\"Bare\" HPPA machine"; |
case MACHINE_BAREARM: |
4320 |
|
machine->machine_name = "\"Bare\" ARM machine"; |
4321 |
break; |
break; |
4322 |
|
|
4323 |
case MACHINE_TESTHPPA: |
case MACHINE_TESTARM: |
4324 |
machine->machine_name = "HPPA test machine"; |
machine->machine_name = "ARM test machine"; |
4325 |
|
|
4326 |
|
snprintf(tmpstr, sizeof(tmpstr), "cons addr=0x%llx irq=0", |
4327 |
|
(long long)DEV_CONS_ADDRESS); |
4328 |
|
cons_data = device_add(machine, tmpstr); |
4329 |
|
machine->main_console_handle = cons_data->console_handle; |
4330 |
|
|
4331 |
|
snprintf(tmpstr, sizeof(tmpstr), "mp addr=0x%llx", |
4332 |
|
(long long)DEV_MP_ADDRESS); |
4333 |
|
device_add(machine, tmpstr); |
4334 |
|
|
4335 |
|
fb = dev_fb_init(machine, mem, DEV_FB_ADDRESS, VFB_GENERIC, |
4336 |
|
640,480, 640,480, 24, "testarm generic"); |
4337 |
|
|
4338 |
|
snprintf(tmpstr, sizeof(tmpstr), "disk addr=0x%llx", |
4339 |
|
(long long)DEV_DISK_ADDRESS); |
4340 |
|
device_add(machine, tmpstr); |
4341 |
|
|
4342 |
|
snprintf(tmpstr, sizeof(tmpstr), "ether addr=0x%llx irq=0", |
4343 |
|
(long long)DEV_ETHER_ADDRESS); |
4344 |
|
device_add(machine, tmpstr); |
4345 |
|
|
4346 |
|
/* Place a tiny stub at end of memory, and set the link |
4347 |
|
register to point to it. This stub halts the machine. */ |
4348 |
|
cpu->cd.arm.r[ARM_SP] = |
4349 |
|
machine->physical_ram_in_mb * 1048576 - 4096; |
4350 |
|
cpu->cd.arm.r[ARM_LR] = cpu->cd.arm.r[ARM_SP] + 32; |
4351 |
|
store_32bit_word(cpu, cpu->cd.arm.r[ARM_LR] + 0, 0xe3a00201); |
4352 |
|
store_32bit_word(cpu, cpu->cd.arm.r[ARM_LR] + 4, 0xe5c00010); |
4353 |
|
store_32bit_word(cpu, cpu->cd.arm.r[ARM_LR] + 8, |
4354 |
|
0xeafffffe); |
4355 |
|
break; |
4356 |
|
#endif /* ENABLE_ARM */ |
4357 |
|
|
4358 |
|
#ifdef ENABLE_IA64 |
4359 |
|
case MACHINE_BAREIA64: |
4360 |
|
machine->machine_name = "\"Bare\" IA64 machine"; |
4361 |
|
break; |
4362 |
|
|
4363 |
|
case MACHINE_TESTIA64: |
4364 |
|
machine->machine_name = "IA64 test machine"; |
4365 |
|
|
4366 |
|
snprintf(tmpstr, sizeof(tmpstr), "cons addr=0x%llx irq=0", |
4367 |
|
(long long)DEV_CONS_ADDRESS); |
4368 |
|
cons_data = device_add(machine, tmpstr); |
4369 |
|
machine->main_console_handle = cons_data->console_handle; |
4370 |
|
|
4371 |
|
snprintf(tmpstr, sizeof(tmpstr), "mp addr=0x%llx", |
4372 |
|
(long long)DEV_MP_ADDRESS); |
4373 |
|
device_add(machine, tmpstr); |
4374 |
|
|
4375 |
|
fb = dev_fb_init(machine, mem, DEV_FB_ADDRESS, VFB_GENERIC, |
4376 |
|
640,480, 640,480, 24, "testia64 generic"); |
4377 |
|
|
4378 |
|
snprintf(tmpstr, sizeof(tmpstr), "disk addr=0x%llx", |
4379 |
|
(long long)DEV_DISK_ADDRESS); |
4380 |
|
device_add(machine, tmpstr); |
4381 |
|
|
4382 |
|
snprintf(tmpstr, sizeof(tmpstr), "ether addr=0x%llx irq=0", |
4383 |
|
(long long)DEV_ETHER_ADDRESS); |
4384 |
|
device_add(machine, tmpstr); |
4385 |
|
|
|
/* TODO */ |
|
4386 |
break; |
break; |
4387 |
|
#endif /* ENABLE_IA64 */ |
4388 |
|
|
4389 |
case MACHINE_BAREALPHA: |
#ifdef ENABLE_M68K |
4390 |
machine->machine_name = "\"Bare\" Alpha machine"; |
case MACHINE_BAREM68K: |
4391 |
|
machine->machine_name = "\"Bare\" M68K machine"; |
4392 |
break; |
break; |
4393 |
|
|
4394 |
case MACHINE_TESTALPHA: |
case MACHINE_TESTM68K: |
4395 |
machine->machine_name = "Alpha test machine"; |
machine->machine_name = "M68K test machine"; |
4396 |
|
|
4397 |
|
snprintf(tmpstr, sizeof(tmpstr), "cons addr=0x%llx irq=0", |
4398 |
|
(long long)DEV_CONS_ADDRESS); |
4399 |
|
cons_data = device_add(machine, tmpstr); |
4400 |
|
machine->main_console_handle = cons_data->console_handle; |
4401 |
|
|
4402 |
/* TODO */ |
snprintf(tmpstr, sizeof(tmpstr), "mp addr=0x%llx", |
4403 |
|
(long long)DEV_MP_ADDRESS); |
4404 |
|
device_add(machine, tmpstr); |
4405 |
|
|
4406 |
|
fb = dev_fb_init(machine, mem, DEV_FB_ADDRESS, VFB_GENERIC, |
4407 |
|
640,480, 640,480, 24, "testm68k generic"); |
4408 |
|
|
4409 |
|
snprintf(tmpstr, sizeof(tmpstr), "disk addr=0x%llx", |
4410 |
|
(long long)DEV_DISK_ADDRESS); |
4411 |
|
device_add(machine, tmpstr); |
4412 |
|
|
4413 |
|
snprintf(tmpstr, sizeof(tmpstr), "ether addr=0x%llx irq=0", |
4414 |
|
(long long)DEV_ETHER_ADDRESS); |
4415 |
|
device_add(machine, tmpstr); |
4416 |
|
|
4417 |
|
break; |
4418 |
|
#endif /* ENABLE_M68K */ |
4419 |
|
|
4420 |
|
#ifdef ENABLE_X86 |
4421 |
|
case MACHINE_BAREX86: |
4422 |
|
machine->machine_name = "\"Bare\" x86 machine"; |
4423 |
break; |
break; |
4424 |
|
|
4425 |
|
case MACHINE_X86: |
4426 |
|
if (machine->machine_subtype == MACHINE_X86_XT) |
4427 |
|
machine->machine_name = "PC XT"; |
4428 |
|
else |
4429 |
|
machine->machine_name = "Generic x86 PC"; |
4430 |
|
|
4431 |
|
/* Interrupt controllers: */ |
4432 |
|
snprintf(tmpstr, sizeof(tmpstr), "8259 irq=16 addr=0x%llx", |
4433 |
|
(long long)(X86_IO_BASE + 0x20)); |
4434 |
|
machine->md.pc.pic1 = device_add(machine, tmpstr); |
4435 |
|
if (machine->machine_subtype != MACHINE_X86_XT) { |
4436 |
|
snprintf(tmpstr, sizeof(tmpstr), "8259 irq=16 addr=0x%llx irq=2", |
4437 |
|
(long long)(X86_IO_BASE + 0xa0)); |
4438 |
|
machine->md.pc.pic2 = device_add(machine, tmpstr); |
4439 |
|
} |
4440 |
|
|
4441 |
|
machine->md_interrupt = x86_pc_interrupt; |
4442 |
|
|
4443 |
|
/* Timer: */ |
4444 |
|
snprintf(tmpstr, sizeof(tmpstr), "8253 addr=0x%llx irq=0", |
4445 |
|
(long long)(X86_IO_BASE + 0x40)); |
4446 |
|
device_add(machine, tmpstr); |
4447 |
|
|
4448 |
|
snprintf(tmpstr, sizeof(tmpstr), "pccmos addr=0x%llx", |
4449 |
|
(long long)(X86_IO_BASE + 0x70)); |
4450 |
|
device_add(machine, tmpstr); |
4451 |
|
|
4452 |
|
/* TODO: IRQ when emulating a PC XT? */ |
4453 |
|
|
4454 |
|
/* IDE controllers: */ |
4455 |
|
if (diskimage_exist(machine, 0, DISKIMAGE_IDE) || |
4456 |
|
diskimage_exist(machine, 1, DISKIMAGE_IDE)) |
4457 |
|
dev_wdc_init(machine, mem, X86_IO_BASE + 0x1f0, 14, 0); |
4458 |
|
if (diskimage_exist(machine, 2, DISKIMAGE_IDE) || |
4459 |
|
diskimage_exist(machine, 3, DISKIMAGE_IDE)) |
4460 |
|
dev_wdc_init(machine, mem, X86_IO_BASE + 0x170, 15, 2); |
4461 |
|
|
4462 |
|
/* Floppy controller at irq 6 */ |
4463 |
|
snprintf(tmpstr, sizeof(tmpstr), "fdc addr=0x%llx irq=6", |
4464 |
|
(long long)(X86_IO_BASE + 0x3f0)); |
4465 |
|
device_add(machine, tmpstr); |
4466 |
|
|
4467 |
|
/* TODO: sound blaster (eventually) at irq 7? */ |
4468 |
|
|
4469 |
|
/* TODO: parallel port */ |
4470 |
|
|
4471 |
|
/* Serial ports: (TODO: 8250 for PC XT?) */ |
4472 |
|
|
4473 |
|
snprintf(tmpstr, sizeof(tmpstr), "ns16550 irq=4 addr=0x%llx name2=com1 in_use=0", |
4474 |
|
(long long)X86_IO_BASE + 0x3f8); |
4475 |
|
device_add(machine, tmpstr); |
4476 |
|
snprintf(tmpstr, sizeof(tmpstr), "ns16550 irq=3 addr=0x%llx name2=com2 in_use=0", |
4477 |
|
(long long)X86_IO_BASE + 0x2f8); |
4478 |
|
device_add(machine, tmpstr); |
4479 |
|
|
4480 |
|
/* VGA + keyboard: */ |
4481 |
|
dev_vga_init(machine, mem, 0xa0000ULL, X86_IO_BASE + 0x3c0, |
4482 |
|
"Generic x86 PC"); |
4483 |
|
machine->main_console_handle = dev_pckbc_init(machine, |
4484 |
|
mem, X86_IO_BASE + 0x60, PCKBC_8042, 1, 12, 1, 1); |
4485 |
|
|
4486 |
|
if (machine->prom_emulation) |
4487 |
|
pc_bios_init(cpu); |
4488 |
|
|
4489 |
|
if (!machine->use_x11 && !quiet_mode) |
4490 |
|
fprintf(stderr, "-------------------------------------" |
4491 |
|
"------------------------------------------\n" |
4492 |
|
"\n WARNING! You are emulating a PC without -X. " |
4493 |
|
"You will miss graphical output!\n\n" |
4494 |
|
"-------------------------------------" |
4495 |
|
"------------------------------------------\n"); |
4496 |
|
break; |
4497 |
|
#endif /* ENABLE_X86 */ |
4498 |
|
|
4499 |
default: |
default: |
4500 |
fatal("Unknown emulation type %i\n", machine->machine_type); |
fatal("Unknown emulation type %i\n", machine->machine_type); |
4501 |
exit(1); |
exit(1); |
4563 |
case MACHINE_NETGEAR: |
case MACHINE_NETGEAR: |
4564 |
m->physical_ram_in_mb = 16; |
m->physical_ram_in_mb = 16; |
4565 |
break; |
break; |
4566 |
case MACHINE_WRT54G: |
case MACHINE_EVBMIPS: |
4567 |
m->physical_ram_in_mb = 32; |
m->physical_ram_in_mb = 64; |
4568 |
|
break; |
4569 |
|
case MACHINE_PSP: |
4570 |
|
/* |
4571 |
|
* According to |
4572 |
|
* http://wiki.ps2dev.org/psp:memory_map: |
4573 |
|
* 0×08000000 = 8 MB kernel memory |
4574 |
|
* 0×08800000 = 24 MB user memory |
4575 |
|
*/ |
4576 |
|
m->physical_ram_in_mb = 8 + 24; |
4577 |
break; |
break; |
4578 |
case MACHINE_ARC: |
case MACHINE_ARC: |
4579 |
switch (m->machine_subtype) { |
switch (m->machine_subtype) { |
4596 |
m->physical_ram_in_mb = 32; |
m->physical_ram_in_mb = 32; |
4597 |
} |
} |
4598 |
break; |
break; |
4599 |
|
case MACHINE_ALPHA: |
4600 |
|
m->physical_ram_in_mb = 64; |
4601 |
|
break; |
4602 |
case MACHINE_BEBOX: |
case MACHINE_BEBOX: |
4603 |
m->physical_ram_in_mb = 64; |
m->physical_ram_in_mb = 64; |
4604 |
break; |
break; |
4605 |
case MACHINE_BAREURISC: |
case MACHINE_X86: |
4606 |
case MACHINE_TESTURISC: |
if (m->machine_subtype == MACHINE_X86_XT) |
4607 |
m->physical_ram_in_mb = 2; |
m->physical_ram_in_mb = 1; |
4608 |
break; |
break; |
4609 |
} |
} |
4610 |
} |
} |
4611 |
|
|
4612 |
/* Special hack for WRT54G and hpcmips machines: */ |
/* Special hack for hpcmips machines: */ |
4613 |
if (m->machine_type == MACHINE_WRT54G || |
if (m->machine_type == MACHINE_HPCMIPS) { |
|
m->machine_type == MACHINE_HPCMIPS) { |
|
4614 |
m->dbe_on_nonexistant_memaccess = 0; |
m->dbe_on_nonexistant_memaccess = 0; |
4615 |
} |
} |
4616 |
|
|
4706 |
case MACHINE_NETGEAR: |
case MACHINE_NETGEAR: |
4707 |
m->cpu_name = strdup("RC32334"); |
m->cpu_name = strdup("RC32334"); |
4708 |
break; |
break; |
|
case MACHINE_WRT54G: |
|
|
m->cpu_name = strdup("BCM4712"); |
|
|
break; |
|
4709 |
case MACHINE_ARC: |
case MACHINE_ARC: |
4710 |
switch (m->machine_subtype) { |
switch (m->machine_subtype) { |
4711 |
case MACHINE_ARC_JAZZ_PICA: |
case MACHINE_ARC_JAZZ_PICA: |
4737 |
if (m->cpu_name == NULL) |
if (m->cpu_name == NULL) |
4738 |
m->cpu_name = strdup("R4400"); |
m->cpu_name = strdup("R4400"); |
4739 |
break; |
break; |
4740 |
|
case MACHINE_EVBMIPS: |
4741 |
|
switch (m->machine_subtype) { |
4742 |
|
case MACHINE_EVBMIPS_MALTA: |
4743 |
|
case MACHINE_EVBMIPS_MALTA_BE: |
4744 |
|
m->cpu_name = strdup("5Kc"); |
4745 |
|
break; |
4746 |
|
case MACHINE_EVBMIPS_PB1000: |
4747 |
|
m->cpu_name = strdup("AU1000"); |
4748 |
|
break; |
4749 |
|
default:fatal("Unimpl. evbmips.\n"); |
4750 |
|
exit(1); |
4751 |
|
} |
4752 |
|
break; |
4753 |
|
case MACHINE_PSP: |
4754 |
|
m->cpu_name = strdup("Allegrex"); |
4755 |
|
break; |
4756 |
|
|
4757 |
/* PowerPC: */ |
/* PowerPC: */ |
4758 |
case MACHINE_BAREPPC: |
case MACHINE_BAREPPC: |
4800 |
|
|
4801 |
/* SPARC: */ |
/* SPARC: */ |
4802 |
case MACHINE_BARESPARC: |
case MACHINE_BARESPARC: |
4803 |
m->cpu_name = strdup("SPARCV9"); |
case MACHINE_TESTSPARC: |
|
break; |
|
4804 |
case MACHINE_ULTRA1: |
case MACHINE_ULTRA1: |
4805 |
m->cpu_name = strdup("SPARCV9"); |
m->cpu_name = strdup("SPARCv9"); |
4806 |
break; |
break; |
4807 |
|
|
4808 |
/* URISC: */ |
/* Alpha: */ |
4809 |
case MACHINE_BAREURISC: |
case MACHINE_BAREALPHA: |
4810 |
case MACHINE_TESTURISC: |
case MACHINE_TESTALPHA: |
4811 |
m->cpu_name = strdup("URISC"); |
case MACHINE_ALPHA: |
4812 |
|
m->cpu_name = strdup("Alpha"); |
4813 |
break; |
break; |
4814 |
|
|
4815 |
/* HPPA: */ |
/* ARM: */ |
4816 |
case MACHINE_BAREHPPA: |
case MACHINE_BAREARM: |
4817 |
case MACHINE_TESTHPPA: |
case MACHINE_TESTARM: |
4818 |
m->cpu_name = strdup("HPPA2.0"); |
m->cpu_name = strdup("ARM"); |
4819 |
break; |
break; |
4820 |
|
|
4821 |
/* Alpha: */ |
/* IA64: */ |
4822 |
case MACHINE_BAREALPHA: |
case MACHINE_BAREIA64: |
4823 |
case MACHINE_TESTALPHA: |
case MACHINE_TESTIA64: |
4824 |
m->cpu_name = strdup("EV4"); |
m->cpu_name = strdup("IA64"); |
4825 |
|
break; |
4826 |
|
|
4827 |
|
/* M68K: */ |
4828 |
|
case MACHINE_BAREM68K: |
4829 |
|
case MACHINE_TESTM68K: |
4830 |
|
m->cpu_name = strdup("68020"); |
4831 |
|
break; |
4832 |
|
|
4833 |
|
/* x86: */ |
4834 |
|
case MACHINE_BAREX86: |
4835 |
|
case MACHINE_X86: |
4836 |
|
if (m->machine_subtype == MACHINE_X86_XT) |
4837 |
|
m->cpu_name = strdup("8086"); |
4838 |
|
else |
4839 |
|
m->cpu_name = strdup("AMD64"); |
4840 |
break; |
break; |
4841 |
} |
} |
4842 |
|
|
4876 |
if (m->single_step_on_bad_addr) |
if (m->single_step_on_bad_addr) |
4877 |
debug("single-step on bad addresses\n"); |
debug("single-step on bad addresses\n"); |
4878 |
|
|
4879 |
if (m->bintrans_enable) |
if (m->arch == ARCH_MIPS) { |
4880 |
debug("bintrans enabled (%i MB cache)\n", |
if (m->bintrans_enable) |
4881 |
(int) (m->bintrans_size / 1048576)); |
debug("bintrans enabled (%i MB cache)\n", |
4882 |
else |
(int) (m->bintrans_size / 1048576)); |
4883 |
debug("bintrans disabled, other speedtricks %s\n", |
else |
4884 |
m->speed_tricks? "enabled" : "disabled"); |
debug("bintrans disabled, other speedtricks %s\n", |
4885 |
|
m->speed_tricks? "enabled" : "disabled"); |
4886 |
|
} |
4887 |
|
|
4888 |
debug("clock: "); |
debug("clock: "); |
4889 |
if (m->automatic_clock_adjustment) |
if (m->automatic_clock_adjustment) |
5070 |
debug("\n"); |
debug("\n"); |
5071 |
|
|
5072 |
useremul_list_emuls(); |
useremul_list_emuls(); |
5073 |
|
debug("Userland emulation works for programs with the complexity" |
5074 |
|
" of Hello World,\nbut not much more.\n"); |
5075 |
} |
} |
5076 |
|
|
5077 |
|
|
5090 |
* entries will appear in normal order when listed. :-) |
* entries will appear in normal order when listed. :-) |
5091 |
*/ |
*/ |
5092 |
|
|
5093 |
|
/* X86 machine: */ |
5094 |
|
me = machine_entry_new("x86-based PC", ARCH_X86, |
5095 |
|
MACHINE_X86, 2, 2); |
5096 |
|
me->aliases[0] = "pc"; |
5097 |
|
me->aliases[1] = "x86"; |
5098 |
|
me->subtype[0] = machine_entry_subtype_new("Generic PC", |
5099 |
|
MACHINE_X86_GENERIC, 1); |
5100 |
|
me->subtype[0]->aliases[0] = "generic"; |
5101 |
|
me->subtype[1] = machine_entry_subtype_new("PC XT", MACHINE_X86_XT, 1); |
5102 |
|
me->subtype[1]->aliases[0] = "xt"; |
5103 |
|
if (cpu_family_ptr_by_number(ARCH_X86) != NULL) { |
5104 |
|
me->next = first_machine_entry; first_machine_entry = me; |
5105 |
|
} |
5106 |
|
|
5107 |
/* Walnut: (NetBSD/evbppc) */ |
/* Walnut: (NetBSD/evbppc) */ |
5108 |
me = machine_entry_new("Walnut evaluation board", ARCH_PPC, |
me = machine_entry_new("Walnut evaluation board", ARCH_PPC, |
5109 |
MACHINE_WALNUT, 2, 0); |
MACHINE_WALNUT, 2, 0); |
5113 |
me->next = first_machine_entry; first_machine_entry = me; |
me->next = first_machine_entry; first_machine_entry = me; |
5114 |
} |
} |
5115 |
|
|
5116 |
/* Test-machine for URISC: */ |
/* Test-machine for SPARC: */ |
5117 |
me = machine_entry_new("Test-machine for URISC", ARCH_URISC, |
me = machine_entry_new("Test-machine for SPARC", ARCH_SPARC, |
5118 |
MACHINE_TESTURISC, 1, 0); |
MACHINE_TESTSPARC, 1, 0); |
5119 |
me->aliases[0] = "testurisc"; |
me->aliases[0] = "testsparc"; |
5120 |
if (cpu_family_ptr_by_number(ARCH_URISC) != NULL) { |
if (cpu_family_ptr_by_number(ARCH_SPARC) != NULL) { |
5121 |
me->next = first_machine_entry; first_machine_entry = me; |
me->next = first_machine_entry; first_machine_entry = me; |
5122 |
} |
} |
5123 |
|
|
5137 |
me->next = first_machine_entry; first_machine_entry = me; |
me->next = first_machine_entry; first_machine_entry = me; |
5138 |
} |
} |
5139 |
|
|
5140 |
/* Test-machine for HPPA: */ |
/* Test-machine for M68K: */ |
5141 |
me = machine_entry_new("Test-machine for HPPA", ARCH_HPPA, |
me = machine_entry_new("Test-machine for M68K", ARCH_M68K, |
5142 |
MACHINE_TESTHPPA, 1, 0); |
MACHINE_TESTM68K, 1, 0); |
5143 |
me->aliases[0] = "testhppa"; |
me->aliases[0] = "testm68k"; |
5144 |
if (cpu_family_ptr_by_number(ARCH_HPPA) != NULL) { |
if (cpu_family_ptr_by_number(ARCH_M68K) != NULL) { |
5145 |
|
me->next = first_machine_entry; first_machine_entry = me; |
5146 |
|
} |
5147 |
|
|
5148 |
|
/* Test-machine for IA64: */ |
5149 |
|
me = machine_entry_new("Test-machine for IA64", ARCH_IA64, |
5150 |
|
MACHINE_TESTIA64, 1, 0); |
5151 |
|
me->aliases[0] = "testia64"; |
5152 |
|
if (cpu_family_ptr_by_number(ARCH_IA64) != NULL) { |
5153 |
|
me->next = first_machine_entry; first_machine_entry = me; |
5154 |
|
} |
5155 |
|
|
5156 |
|
/* Test-machine for ARM: */ |
5157 |
|
me = machine_entry_new("Test-machine for ARM", ARCH_ARM, |
5158 |
|
MACHINE_TESTARM, 1, 0); |
5159 |
|
me->aliases[0] = "testarm"; |
5160 |
|
if (cpu_family_ptr_by_number(ARCH_ARM) != NULL) { |
5161 |
me->next = first_machine_entry; first_machine_entry = me; |
me->next = first_machine_entry; first_machine_entry = me; |
5162 |
} |
} |
5163 |
|
|
5195 |
} |
} |
5196 |
|
|
5197 |
/* SGI: */ |
/* SGI: */ |
5198 |
me = machine_entry_new("SGI", ARCH_MIPS, MACHINE_SGI, 2, 9); |
me = machine_entry_new("SGI", ARCH_MIPS, MACHINE_SGI, 2, 10); |
5199 |
me->aliases[0] = "silicon graphics"; |
me->aliases[0] = "silicon graphics"; |
5200 |
me->aliases[1] = "sgi"; |
me->aliases[1] = "sgi"; |
5201 |
me->subtype[0] = machine_entry_subtype_new("IP19", 19, 1); |
me->subtype[0] = machine_entry_subtype_new("IP12", 12, 1); |
5202 |
me->subtype[0]->aliases[0] = "ip19"; |
me->subtype[0]->aliases[0] = "ip12"; |
5203 |
me->subtype[1] = machine_entry_subtype_new("IP20", 20, 1); |
me->subtype[1] = machine_entry_subtype_new("IP19", 19, 1); |
5204 |
me->subtype[1]->aliases[0] = "ip20"; |
me->subtype[1]->aliases[0] = "ip19"; |
5205 |
me->subtype[2] = machine_entry_subtype_new("IP22", 22, 2); |
me->subtype[2] = machine_entry_subtype_new("IP20", 20, 1); |
5206 |
me->subtype[2]->aliases[0] = "ip22"; |
me->subtype[2]->aliases[0] = "ip20"; |
5207 |
me->subtype[2]->aliases[1] = "indy"; |
me->subtype[3] = machine_entry_subtype_new("IP22", 22, 2); |
5208 |
me->subtype[3] = machine_entry_subtype_new("IP24", 24, 1); |
me->subtype[3]->aliases[0] = "ip22"; |
5209 |
me->subtype[3]->aliases[0] = "ip24"; |
me->subtype[3]->aliases[1] = "indy"; |
5210 |
me->subtype[4] = machine_entry_subtype_new("IP27", 27, 3); |
me->subtype[4] = machine_entry_subtype_new("IP24", 24, 1); |
5211 |
me->subtype[4]->aliases[0] = "ip27"; |
me->subtype[4]->aliases[0] = "ip24"; |
5212 |
me->subtype[4]->aliases[1] = "origin 200"; |
me->subtype[5] = machine_entry_subtype_new("IP27", 27, 3); |
5213 |
me->subtype[4]->aliases[2] = "origin 2000"; |
me->subtype[5]->aliases[0] = "ip27"; |
5214 |
me->subtype[5] = machine_entry_subtype_new("IP28", 28, 1); |
me->subtype[5]->aliases[1] = "origin 200"; |
5215 |
me->subtype[5]->aliases[0] = "ip28"; |
me->subtype[5]->aliases[2] = "origin 2000"; |
5216 |
me->subtype[6] = machine_entry_subtype_new("IP30", 30, 2); |
me->subtype[6] = machine_entry_subtype_new("IP28", 28, 1); |
5217 |
me->subtype[6]->aliases[0] = "ip30"; |
me->subtype[6]->aliases[0] = "ip28"; |
5218 |
me->subtype[6]->aliases[1] = "octane"; |
me->subtype[7] = machine_entry_subtype_new("IP30", 30, 2); |
5219 |
me->subtype[7] = machine_entry_subtype_new("IP32", 32, 2); |
me->subtype[7]->aliases[0] = "ip30"; |
5220 |
me->subtype[7]->aliases[0] = "ip32"; |
me->subtype[7]->aliases[1] = "octane"; |
5221 |
me->subtype[7]->aliases[1] = "o2"; |
me->subtype[8] = machine_entry_subtype_new("IP32", 32, 2); |
5222 |
me->subtype[8] = machine_entry_subtype_new("IP35", 35, 1); |
me->subtype[8]->aliases[0] = "ip32"; |
5223 |
me->subtype[8]->aliases[0] = "ip35"; |
me->subtype[8]->aliases[1] = "o2"; |
5224 |
|
me->subtype[9] = machine_entry_subtype_new("IP35", 35, 1); |
5225 |
|
me->subtype[9]->aliases[0] = "ip35"; |
5226 |
if (cpu_family_ptr_by_number(ARCH_MIPS) != NULL) { |
if (cpu_family_ptr_by_number(ARCH_MIPS) != NULL) { |
5227 |
me->next = first_machine_entry; first_machine_entry = me; |
me->next = first_machine_entry; first_machine_entry = me; |
5228 |
} |
} |
5235 |
me->next = first_machine_entry; first_machine_entry = me; |
me->next = first_machine_entry; first_machine_entry = me; |
5236 |
} |
} |
5237 |
|
|
5238 |
|
/* Playstation Portable: */ |
5239 |
|
me = machine_entry_new("Playstation Portable", ARCH_MIPS, |
5240 |
|
MACHINE_PSP, 1, 0); |
5241 |
|
me->aliases[0] = "psp"; |
5242 |
|
if (cpu_family_ptr_by_number(ARCH_MIPS) != NULL) { |
5243 |
|
me->next = first_machine_entry; first_machine_entry = me; |
5244 |
|
} |
5245 |
|
|
5246 |
/* NetGear: */ |
/* NetGear: */ |
5247 |
me = machine_entry_new("NetGear WG602", ARCH_MIPS, |
me = machine_entry_new("NetGear WG602", ARCH_MIPS, |
5248 |
MACHINE_NETGEAR, 2, 0); |
MACHINE_NETGEAR, 2, 0); |
5281 |
me->next = first_machine_entry; first_machine_entry = me; |
me->next = first_machine_entry; first_machine_entry = me; |
5282 |
} |
} |
5283 |
|
|
|
/* Linksys: */ |
|
|
me = machine_entry_new("Linksys WRT54G", ARCH_MIPS, |
|
|
MACHINE_WRT54G, 2, 0); |
|
|
me->aliases[0] = "linksys"; |
|
|
me->aliases[1] = "wrt54g"; |
|
|
if (cpu_family_ptr_by_number(ARCH_MIPS) != NULL) { |
|
|
me->next = first_machine_entry; first_machine_entry = me; |
|
|
} |
|
|
|
|
5284 |
/* HPCmips: */ |
/* HPCmips: */ |
5285 |
me = machine_entry_new("Handheld MIPS (HPC)", |
me = machine_entry_new("Handheld MIPS (HPCmips)", |
5286 |
ARCH_MIPS, MACHINE_HPCMIPS, 2, 8); |
ARCH_MIPS, MACHINE_HPCMIPS, 1, 8); |
5287 |
me->aliases[0] = "hpcmips"; |
me->aliases[0] = "hpcmips"; |
|
me->aliases[1] = "hpc"; |
|
5288 |
me->subtype[0] = machine_entry_subtype_new( |
me->subtype[0] = machine_entry_subtype_new( |
5289 |
"Casio Cassiopeia BE-300", MACHINE_HPCMIPS_CASIO_BE300, 2); |
"Casio Cassiopeia BE-300", MACHINE_HPCMIPS_CASIO_BE300, 2); |
5290 |
me->subtype[0]->aliases[0] = "be-300"; |
me->subtype[0]->aliases[0] = "be-300"; |
5317 |
me->next = first_machine_entry; first_machine_entry = me; |
me->next = first_machine_entry; first_machine_entry = me; |
5318 |
} |
} |
5319 |
|
|
5320 |
/* Generic "bare" URISC machine: */ |
/* Generic "bare" X86 machine: */ |
5321 |
me = machine_entry_new("Generic \"bare\" URISC machine", ARCH_URISC, |
me = machine_entry_new("Generic \"bare\" X86 machine", ARCH_X86, |
5322 |
MACHINE_BAREURISC, 1, 0); |
MACHINE_BAREX86, 1, 0); |
5323 |
me->aliases[0] = "bareurisc"; |
me->aliases[0] = "barex86"; |
5324 |
if (cpu_family_ptr_by_number(ARCH_URISC) != NULL) { |
if (cpu_family_ptr_by_number(ARCH_X86) != NULL) { |
5325 |
me->next = first_machine_entry; first_machine_entry = me; |
me->next = first_machine_entry; first_machine_entry = me; |
5326 |
} |
} |
5327 |
|
|
5349 |
me->next = first_machine_entry; first_machine_entry = me; |
me->next = first_machine_entry; first_machine_entry = me; |
5350 |
} |
} |
5351 |
|
|
5352 |
/* Generic "bare" HPPA machine: */ |
/* Generic "bare" M68K machine: */ |
5353 |
me = machine_entry_new("Generic \"bare\" HPPA machine", ARCH_HPPA, |
me = machine_entry_new("Generic \"bare\" M68K machine", ARCH_M68K, |
5354 |
MACHINE_BAREHPPA, 1, 0); |
MACHINE_BAREM68K, 1, 0); |
5355 |
me->aliases[0] = "barehppa"; |
me->aliases[0] = "barem68k"; |
5356 |
if (cpu_family_ptr_by_number(ARCH_HPPA) != NULL) { |
if (cpu_family_ptr_by_number(ARCH_M68K) != NULL) { |
5357 |
|
me->next = first_machine_entry; first_machine_entry = me; |
5358 |
|
} |
5359 |
|
|
5360 |
|
/* Generic "bare" IA64 machine: */ |
5361 |
|
me = machine_entry_new("Generic \"bare\" IA64 machine", ARCH_IA64, |
5362 |
|
MACHINE_BAREIA64, 1, 0); |
5363 |
|
me->aliases[0] = "bareia64"; |
5364 |
|
if (cpu_family_ptr_by_number(ARCH_IA64) != NULL) { |
5365 |
|
me->next = first_machine_entry; first_machine_entry = me; |
5366 |
|
} |
5367 |
|
|
5368 |
|
/* Generic "bare" ARM machine: */ |
5369 |
|
me = machine_entry_new("Generic \"bare\" ARM machine", ARCH_ARM, |
5370 |
|
MACHINE_BAREARM, 1, 0); |
5371 |
|
me->aliases[0] = "barearm"; |
5372 |
|
if (cpu_family_ptr_by_number(ARCH_ARM) != NULL) { |
5373 |
me->next = first_machine_entry; first_machine_entry = me; |
me->next = first_machine_entry; first_machine_entry = me; |
5374 |
} |
} |
5375 |
|
|
5381 |
me->next = first_machine_entry; first_machine_entry = me; |
me->next = first_machine_entry; first_machine_entry = me; |
5382 |
} |
} |
5383 |
|
|
5384 |
|
/* Evaluation Boards (MALTA etc): */ |
5385 |
|
me = machine_entry_new("Evaluation boards (evbmips)", ARCH_MIPS, |
5386 |
|
MACHINE_EVBMIPS, 1, 3); |
5387 |
|
me->aliases[0] = "evbmips"; |
5388 |
|
me->subtype[0] = machine_entry_subtype_new("Malta", |
5389 |
|
MACHINE_EVBMIPS_MALTA, 1); |
5390 |
|
me->subtype[0]->aliases[0] = "malta"; |
5391 |
|
me->subtype[1] = machine_entry_subtype_new("Malta (Big-Endian)", |
5392 |
|
MACHINE_EVBMIPS_MALTA_BE, 1); |
5393 |
|
me->subtype[1]->aliases[0] = "maltabe"; |
5394 |
|
me->subtype[2] = machine_entry_subtype_new("PB1000", |
5395 |
|
MACHINE_EVBMIPS_PB1000, 1); |
5396 |
|
me->subtype[2]->aliases[0] = "pb1000"; |
5397 |
|
if (cpu_family_ptr_by_number(ARCH_MIPS) != NULL) { |
5398 |
|
me->next = first_machine_entry; first_machine_entry = me; |
5399 |
|
} |
5400 |
|
|
5401 |
/* DECstation: */ |
/* DECstation: */ |
5402 |
me = machine_entry_new("DECstation/DECsystem", |
me = machine_entry_new("DECstation/DECsystem", |
5403 |
ARCH_MIPS, MACHINE_DEC, 3, 9); |
ARCH_MIPS, MACHINE_DEC, 3, 9); |
5529 |
if (cpu_family_ptr_by_number(ARCH_MIPS) != NULL) { |
if (cpu_family_ptr_by_number(ARCH_MIPS) != NULL) { |
5530 |
me->next = first_machine_entry; first_machine_entry = me; |
me->next = first_machine_entry; first_machine_entry = me; |
5531 |
} |
} |
5532 |
|
|
5533 |
|
/* Alpha: */ |
5534 |
|
me = machine_entry_new("Alpha", ARCH_ALPHA, MACHINE_ALPHA, 1, 1); |
5535 |
|
me->aliases[0] = "alpha"; |
5536 |
|
me->subtype[0] = machine_entry_subtype_new( |
5537 |
|
"DEC 3000/300", ST_DEC_3000_300, 1); |
5538 |
|
me->subtype[0]->aliases[0] = "3000/300"; |
5539 |
|
if (cpu_family_ptr_by_number(ARCH_ALPHA) != NULL) { |
5540 |
|
me->next = first_machine_entry; first_machine_entry = me; |
5541 |
|
} |
5542 |
} |
} |
5543 |
|
|