/[gxemul]/trunk/src/include/opcodes_ppc.h
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Contents of /trunk/src/include/opcodes_ppc.h

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Revision 20 - (show annotations)
Mon Oct 8 16:19:23 2007 UTC (16 years, 7 months ago) by dpavlin
File MIME type: text/plain
File size: 7443 byte(s)
++ trunk/HISTORY	(local)
$Id: HISTORY,v 1.1055 2005/11/25 22:48:36 debug Exp $
20051031	Adding disassembly support for more ARM instructions (clz,
		smul* etc), and adding a hack to support "new tiny" pages
		for StrongARM.
20051101	Minor documentation updates (NetBSD 2.0.2 -> 2.1, and OpenBSD
		3.7 -> 3.8, and lots of testing).
		Changing from 1-sector PIO mode 0 transfers to 128-sector PIO
		mode 3 (in dev_wdc).
		Various minor ARM dyntrans updates (pc-relative loads from
		within the same page as the instruction are now treated as
		constant "mov").
20051102	Re-enabling instruction combinations (they were accidentally
		disabled).
		Dyntrans TLB entries are now overwritten using a round-robin
		scheme instead of randomly. This increases performance.
		Fixing a typo in file.c (thanks to Chuan-Hua Chang for
		noticing it).
		Experimenting with adding ATAPI support to dev_wdc (to make
		emulated *BSD detect cdroms as cdroms, not harddisks).
20051104	Various minor updates.
20051105	Continuing on the ATAPI emulation. Seems to work well enough
		for a NetBSD/cats installation, but not OpenBSD/cats.
		Various other updates.
20051106	Modifying the -Y command line option to allow scaleup with
		certain graphic controllers (only dev_vga so far), not just
		scaledown.
		Some minor dyntrans cleanups.
20051107	Beginning a cleanup up the PCI subsystem (removing the
		read_register hack, etc).
20051108	Continuing the cleanup; splitting up some pci devices into a
		normal autodev device and some separate pci glue code.
20051109	Continuing on the PCI bus stuff; all old pci_*.c have been
		incorporated into normal devices and/or rewritten as glue code
		only, adding a dummy Intel 82371AB PIIX4 for Malta (not really
		tested yet).
		Minor pckbc fix so that Linux doesn't complain.
		Working on the DEC 21143 NIC (ethernet mac rom stuff mostly).
		Various other minor fixes.
20051110	Some more ARM dyntrans fine-tuning (e.g. some instruction
		combinations (cmps followed by conditional branch within the
		same page) and special cases for DPIs with regform when the
		shifter isn't used).
20051111	ARM dyntrans updates: O(n)->O(1) for just-mark-as-non-
		writable in the generic pc_to_pointers function, and some other
		minor hacks.
		Merging Cobalt and evbmips (Malta) ISA interrupt handling,
		and some minor fixes to allow Linux to accept harddisk irqs.
20051112	Minor device updates (pckbc, dec21143, lpt, ...), most
		importantly fixing the ALI M1543/M5229 so that harddisk irqs
		work with Linux/CATS.
20051113	Some more generalizations of the PCI subsystem.
		Finally took the time to add a hack for SCSI CDROM TOCs; this
		enables OpenBSD to use partition 'a' (as needed by the OpenBSD
		installer), and Windows NT's installer to get a bit further.
		Also fixing dev_wdc to allow Linux to detect ATAPI CDROMs.
		Continuing on the DEC 21143.
20051114	Minor ARM dyntrans tweaks; ARM cmps+branch optimization when
		comparing with 0, and generalizing the xchg instr. comb.
		Adding disassembly of ARM mrrc/mcrr and q{,d}{add,sub}.
20051115	Continuing on various PPC things (BATs, other address trans-
		lation things, various loads/stores, BeBox emulation, etc.).
		Beginning to work on PPC interrupt/exception support.
20051116	Factoring out some code which initializes legacy ISA devices
		from those machines that use them (bus_isa).
		Continuing on PPC interrupt/exception support.
20051117	Minor Malta fixes: RTC year offset = 80, disabling a speed hack
		which caused NetBSD to detect a too fast cpu, and adding a new
		hack to make Linux detect a faster cpu.
		Continuing on the Artesyn PM/PPC emulation mode.
		Adding an Algor emulation skeleton (P4032 and P5064);
		implementing some of the basics.
		Continuing on PPC emulation in general; usage of unimplemented
		SPRs is now easier to track, continuing on memory/exception
		related issues, etc.
20051118	More work on PPC emulation (tgpr0..3, exception handling,
		memory stuff, syscalls, etc.).
20051119	Changing the ARM dyntrans code to mostly use cpu->pc, and not
		necessarily use arm reg 15. Seems to work.
		Various PPC updates; continuing on the PReP emulation mode.
20051120	Adding a workaround/hack to dev_mc146818 to allow NetBSD/prep
		to detect the clock.
20051121	More cleanup of the PCI bus (memory and I/O bases, etc).
		Continuing on various PPC things (decrementer and timebase,
		WDCs on obio (on PReP) use irq 13, not 14/15).
20051122	Continuing on the CPC700 controller (interrupts etc) for PMPPC,
		and on PPC stuff in general.
		Finally! After some bug fixes to the virtual to physical addr
		translation, NetBSD/{prep,pmppc} 2.1 reach userland and are
		stable enough to be interacted with.
		More PCI updates; reverse-endian device access for PowerPC etc.
20051123	Generalizing the IEEE floating point subsystem (moving it out
		from src/cpus/cpu_mips_coproc.c into a new src/float_emul.c).
		Input via slave xterms was sometimes not really working; fixing
		this for ns16550, and a warning message is now displayed if
		multiple non-xterm consoles are active.
		Adding some PPC floating point support, etc.
		Various interrupt related updates (dev_wdc, _ns16550, _8259,
		and the isa32 common code in machine.c).
		NetBSD/prep can now be installed! :-) (Well, with some manual
		commands necessary before running sysinst.) Updating the
		documentation and various other things to reflect this.
20051124	Various minor documentation updates.
		Continuing the work on the DEC 21143 NIC.
20051125	LOTS of work on the 21143. Both OpenBSD and NetBSD work fine
		with it now, except that OpenBSD sometimes gives a time-out
		warning.
		Minor documentation updates.

==============  RELEASE 0.3.7  ==============


1 #ifndef OPCODES_PPC_H
2 #define OPCODES_PPC_H
3
4 /*
5 * Copyright (C) 2005 Anders Gavare. All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions are met:
9 *
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * 3. The name of the author may not be used to endorse or promote products
16 * derived from this software without specific prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 * SUCH DAMAGE.
29 *
30 *
31 * $Id: opcodes_ppc.h,v 1.42 2005/11/24 01:15:07 debug Exp $
32 *
33 *
34 * PPC and POWER opcodes. These are gathered from various sources.
35 * Note: The define uses the PPC name, not the POWER name, when they differ.
36 */
37
38 #define PPC_HI6_MULLI 0x07
39 #define PPC_HI6_SUBFIC 0x08
40
41 #define PPC_HI6_CMPLI 0x0a
42 #define PPC_HI6_CMPI 0x0b
43 #define PPC_HI6_ADDIC 0x0c
44 #define PPC_HI6_ADDIC_DOT 0x0d
45 #define PPC_HI6_ADDI 0x0e
46 #define PPC_HI6_ADDIS 0x0f
47 #define PPC_HI6_BC 0x10
48 #define PPC_HI6_SC 0x11
49 #define PPC_HI6_B 0x12
50 #define PPC_HI6_19 0x13
51 #define PPC_19_MCRF 0
52 #define PPC_19_BCLR 16
53 #define PPC_19_RFID 18
54 #define PPC_19_CRNOR 33
55 #define PPC_19_RFI 50
56 #define PPC_19_RFSVC 82
57 #define PPC_19_CRANDC 129
58 #define PPC_19_ISYNC 150
59 #define PPC_19_CRXOR 193
60 #define PPC_19_CRNAND 225
61 #define PPC_19_CRAND 257
62 #define PPC_19_CREQV 289
63 #define PPC_19_CRORC 417
64 #define PPC_19_CROR 449
65 #define PPC_19_BCCTR 528
66 #define PPC_HI6_RLWIMI 0x14
67 #define PPC_HI6_RLWINM 0x15
68
69 #define PPC_HI6_RLWNM 0x17
70 #define PPC_HI6_ORI 0x18
71 #define PPC_HI6_ORIS 0x19
72 #define PPC_HI6_XORI 0x1a
73 #define PPC_HI6_XORIS 0x1b
74 #define PPC_HI6_ANDI_DOT 0x1c
75 #define PPC_HI6_ANDIS_DOT 0x1d
76 #define PPC_HI6_30 0x1e
77 #define PPC_30_RLDICL 0x0
78 #define PPC_30_RLDICR 0x1
79 #define PPC_HI6_31 0x1f
80 #define PPC_31_CMP 0
81 #define PPC_31_TW 4
82 #define PPC_31_SUBFC 8
83 #define PPC_31_ADDC 10
84 #define PPC_31_MULHWU 11
85 #define PPC_31_MFCR 19
86 #define PPC_31_LWARX 20
87 #define PPC_31_LWZX 23
88 #define PPC_31_SLW 24
89 #define PPC_31_CNTLZW 26
90 #define PPC_31_AND 28
91 #define PPC_31_CMPL 32
92 #define PPC_31_SUBF 40
93 #define PPC_31_DCBST 54
94 #define PPC_31_LWZUX 55
95 #define PPC_31_ANDC 60
96 #define PPC_31_TD 68
97 #define PPC_31_MULHW 75
98 #define PPC_31_MFMSR 83
99 #define PPC_31_LDARX 84
100 #define PPC_31_DCBF 86
101 #define PPC_31_LBZX 87
102 #define PPC_31_NEG 104
103 #define PPC_31_CLF 118
104 #define PPC_31_LBZUX 119
105 #define PPC_31_NOR 124
106 #define PPC_31_SUBFE 136
107 #define PPC_31_ADDE 138
108 #define PPC_31_MTCRF 144
109 #define PPC_31_MTMSR 146
110 #define PPC_31_STDX 149
111 #define PPC_31_STWCX_DOT 150
112 #define PPC_31_STWX 151
113 #define PPC_31_STDUX 181
114 #define PPC_31_STWUX 183
115 #define PPC_31_SUBFZE 200
116 #define PPC_31_ADDZE 202
117 #define PPC_31_MTSR 210
118 #define PPC_31_STDCX_DOT 214
119 #define PPC_31_STBX 215
120 #define PPC_31_SUBFME 232
121 #define PPC_31_ADDME 234
122 #define PPC_31_MULLW 235
123 #define PPC_31_MTSRIN 242
124 #define PPC_31_DCBTST 246
125 #define PPC_31_STBUX 247
126 #define PPC_31_ADD 266
127 #define PPC_31_DCBT 278
128 #define PPC_31_LHZX 279
129 #define PPC_31_TLBIE 306
130 #define PPC_31_LHZUX 311
131 #define PPC_31_XOR 316
132 #define PPC_31_MFSPR 339
133 #define PPC_31_LHAX 343
134 #define PPC_31_TLBIA 370
135 #define PPC_31_MFTB 371
136 #define PPC_31_LHAUX 375
137 #define PPC_31_STHX 407
138 #define PPC_31_ORC 412
139 #define PPC_31_SLBIE 434
140 #define PPC_31_STHUX 439
141 #define PPC_31_OR 444
142 #define PPC_31_DCCCI 454
143 #define PPC_31_DIVWU 459
144 #define PPC_31_MTSPR 467
145 #define PPC_31_DCBI 470
146 #define PPC_31_NAND 476
147 #define PPC_31_DIVW 491
148 #define PPC_31_SLBIA 498
149 #define PPC_31_CLI 502
150 #define PPC_31_SUBFCO 520
151 #define PPC_31_ADDCO 522
152 #define PPC_31_LWBRX 534
153 #define PPC_31_LFSX 535
154 #define PPC_31_SRW 536
155 #define PPC_31_SUBFO 552
156 #define PPC_31_TLBSYNC 566
157 #define PPC_31_MFSR 595
158 #define PPC_31_LSWI 597
159 #define PPC_31_SYNC 598
160 #define PPC_31_LFDX 599
161 #define PPC_31_NEGO 616
162 #define PPC_31_DCLST 630
163 #define PPC_31_SUBFEO 648
164 #define PPC_31_ADDEO 650
165 #define PPC_31_MFSRIN 659
166 #define PPC_31_STWBRX 662
167 #define PPC_31_STFSX 663
168 #define PPC_31_SUBFZEO 712
169 #define PPC_31_ADDZEO 714
170 #define PPC_31_STSWI 725
171 #define PPC_31_STFDX 727
172 #define PPC_31_SUBFMEO 744
173 #define PPC_31_ADDMEO 746
174 #define PPC_31_MULLWO 747
175 #define PPC_31_ADDO 778
176 #define PPC_31_LHBRX 790
177 #define PPC_31_SRAW 792
178 #define PPC_31_SRAWI 824
179 #define PPC_31_EIEIO 854
180 #define PPC_31_STHBRX 918
181 #define PPC_31_EXTSH 922
182 #define PPC_31_EXTSB 954
183 #define PPC_31_ICCCI 966
184 #define PPC_31_DIVWUO 971
185 #define PPC_31_TLBLD 978
186 #define PPC_31_ICBI 982
187 #define PPC_31_EXTSW 986
188 #define PPC_31_DIVWO 1003
189 #define PPC_31_TLBLI 1010
190 #define PPC_31_DCBZ 1014
191 #define PPC_HI6_LWZ 0x20
192 #define PPC_HI6_LWZU 0x21
193 #define PPC_HI6_LBZ 0x22
194 #define PPC_HI6_LBZU 0x23
195 #define PPC_HI6_STW 0x24
196 #define PPC_HI6_STWU 0x25
197 #define PPC_HI6_STB 0x26
198 #define PPC_HI6_STBU 0x27
199 #define PPC_HI6_LHZ 0x28
200 #define PPC_HI6_LHZU 0x29
201 #define PPC_HI6_LHA 0x2a
202 #define PPC_HI6_LHAU 0x2b
203 #define PPC_HI6_STH 0x2c
204 #define PPC_HI6_STHU 0x2d
205 #define PPC_HI6_LMW 0x2e
206 #define PPC_HI6_STMW 0x2f
207 #define PPC_HI6_LFS 0x30
208
209 #define PPC_HI6_LFD 0x32
210
211 #define PPC_HI6_STFS 0x34
212
213 #define PPC_HI6_STFD 0x36
214
215 #define PPC_HI6_LD 0x3a
216 #define PPC_HI6_59 0x3b
217 #define PPC_59_FDIVS 18
218 #define PPC_59_FSUBS 20
219 #define PPC_59_FADDS 21
220 #define PPC_59_FMULS 25
221 #define PPC_59_FMADDS 29
222
223 #define PPC_HI6_STD 0x3e
224 #define PPC_HI6_63 0x3f
225 #define PPC_63_FCMPU 0
226 #define PPC_63_FRSP 12
227 #define PPC_63_FCTIWZ 15
228 #define PPC_63_FDIV 18
229 #define PPC_63_FSUB 20
230 #define PPC_63_FADD 21
231 #define PPC_63_FMUL 25
232 #define PPC_63_FMSUB 28
233 #define PPC_63_FMADD 29
234 #define PPC_63_FNEG 40
235 #define PPC_63_FMR 72
236 #define PPC_63_FNABS 136
237 #define PPC_63_FABS 264
238 #define PPC_63_MFFS 583
239 #define PPC_63_MTFSF 711
240
241 #endif /* OPCODES_PPC_H */

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