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#ifndef DEVICES_H |
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#define DEVICES_H |
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|
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/* |
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* Copyright (C) 2003-2006 Anders Gavare. All rights reserved. |
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* |
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* Redistribution and use in source and binary forms, with or without |
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* modification, are permitted provided that the following conditions are met: |
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* |
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* 1. Redistributions of source code must retain the above copyright |
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* notice, this list of conditions and the following disclaimer. |
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* 2. Redistributions in binary form must reproduce the above copyright |
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* notice, this list of conditions and the following disclaimer in the |
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* documentation and/or other materials provided with the distribution. |
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* 3. The name of the author may not be used to endorse or promote products |
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* derived from this software without specific prior written permission. |
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* |
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND |
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE |
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS |
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) |
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY |
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF |
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* SUCH DAMAGE. |
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* |
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* |
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* $Id: devices.h,v 1.213 2006/07/08 12:30:03 debug Exp $ |
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* |
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* Memory mapped devices. |
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* |
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* TODO: Separate into lots of smaller files? That might speed up a compile, |
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* but I'm not sure that it's a price worth paying. |
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*/ |
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|
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#include <sys/types.h> |
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#include <inttypes.h> |
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|
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struct cpu; |
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struct machine; |
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struct memory; |
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struct pci_data; |
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|
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/* #ifdef WITH_X11 |
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#include <X11/Xlib.h> |
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#endif */ |
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|
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/* dev_8259.c: */ |
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struct pic8259_data { |
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int irq_nr; /* if connected to another 8259 */ |
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|
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int irq_base; |
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int current_command; |
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|
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int init_state; |
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|
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int priority_reg; |
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uint8_t irr; /* interrupt request register */ |
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uint8_t isr; /* interrupt in-service register */ |
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uint8_t ier; /* interrupt enable register */ |
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}; |
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|
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/* dev_dec_ioasic.c: */ |
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#define DEV_DEC_IOASIC_LENGTH 0x80100 |
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#define N_DEC_IOASIC_REGS (0x1f0 / 0x10) |
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#define MAX_IOASIC_DMA_FUNCTIONS 8 |
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struct dec_ioasic_data { |
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uint32_t reg[N_DEC_IOASIC_REGS]; |
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int (*(dma_func[MAX_IOASIC_DMA_FUNCTIONS]))(struct cpu *, void *, uint64_t addr, size_t dma_len, int tx); |
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void *dma_func_extra[MAX_IOASIC_DMA_FUNCTIONS]; |
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int rackmount_flag; |
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}; |
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int dev_dec_ioasic_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *); |
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struct dec_ioasic_data *dev_dec_ioasic_init(struct cpu *cpu, struct memory *mem, uint64_t baseaddr, int rackmount_flag); |
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|
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/* dev_algor.c: */ |
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struct algor_data { |
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uint64_t base_addr; |
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}; |
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|
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/* dev_asc.c: */ |
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#define DEV_ASC_DEC_LENGTH 0x40000 |
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#define DEV_ASC_PICA_LENGTH 0x1000 |
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#define DEV_ASC_DEC 1 |
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#define DEV_ASC_PICA 2 |
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int dev_asc_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *); |
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void dev_asc_init(struct machine *machine, struct memory *mem, uint64_t baseaddr, |
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int irq_nr, void *turbochannel, int mode, |
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size_t (*dma_controller)(void *dma_controller_data, |
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unsigned char *data, size_t len, int writeflag), |
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void *dma_controller_data); |
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|
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/* dev_au1x00.c: */ |
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struct au1x00_ic_data { |
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int ic_nr; |
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uint32_t request0_int; |
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uint32_t request1_int; |
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uint32_t config0; |
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uint32_t config1; |
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uint32_t config2; |
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uint32_t source; |
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uint32_t assign_request; |
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uint32_t wakeup; |
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uint32_t mask; |
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}; |
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|
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int dev_au1x00_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *); |
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struct au1x00_ic_data *dev_au1x00_init(struct machine *machine, struct memory *mem); |
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|
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/* dev_bebox.c: */ |
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struct bebox_data { |
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/* The 5 motherboard registers: */ |
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uint32_t cpu0_int_mask; |
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uint32_t cpu1_int_mask; |
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uint32_t int_status; |
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uint32_t xpi; |
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uint32_t resets; |
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}; |
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|
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/* dev_bt431.c: */ |
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#define DEV_BT431_LENGTH 0x20 |
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#define DEV_BT431_NREGS 0x800 /* ? */ |
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int dev_bt431_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *); |
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struct vfb_data; |
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void dev_bt431_init(struct memory *mem, uint64_t baseaddr, struct vfb_data *vfb_data, int color_fb_flag); |
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|
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/* dev_bt455.c: */ |
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#define DEV_BT455_LENGTH 0x20 |
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int dev_bt455_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *); |
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struct vfb_data; |
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void dev_bt455_init(struct memory *mem, uint64_t baseaddr, struct vfb_data *vfb_data); |
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|
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/* dev_bt459.c: */ |
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#define DEV_BT459_LENGTH 0x20 |
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#define DEV_BT459_NREGS 0x1000 |
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#define BT459_PX 1 /* px[g] */ |
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#define BT459_BA 2 /* cfb */ |
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#define BT459_BBA 3 /* sfb */ |
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int dev_bt459_access(struct cpu *cpu, struct memory *mem, |
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uint64_t relative_addr, unsigned char *data, size_t len, |
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int writeflag, void *); |
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struct vfb_data; |
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void dev_bt459_init(struct machine *machine, struct memory *mem, |
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uint64_t baseaddr, uint64_t baseaddr_irq, struct vfb_data *vfb_data, |
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int color_fb_flag, int irq_nr, int type); |
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|
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/* dev_cons.c: */ |
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struct cons_data { |
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int console_handle; |
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int irq_nr; |
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int in_use; |
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}; |
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|
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/* dev_colorplanemask.c: */ |
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#define DEV_COLORPLANEMASK_LENGTH 0x0000000000000010 |
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int dev_colorplanemask_access(struct cpu *cpu, struct memory *mem, |
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uint64_t relative_addr, unsigned char *data, size_t len, |
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int writeflag, void *); |
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void dev_colorplanemask_init(struct memory *mem, uint64_t baseaddr, |
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unsigned char *color_plane_mask); |
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|
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/* dev_cpc700.c: */ |
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struct cpc700_data { |
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struct pci_data *pci_data; |
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uint32_t sr; /* Status register (interrupt) */ |
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uint32_t er; /* Enable register */ |
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}; |
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struct cpc700_data *dev_cpc700_init(struct machine *, struct memory *); |
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|
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/* dev_dc7085.c: */ |
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#define DEV_DC7085_LENGTH 0x0000000000000080 |
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/* see dc7085.h for more info */ |
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void dev_dc7085_tick(struct cpu *cpu, void *); |
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int dev_dc7085_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *); |
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int dev_dc7085_init(struct machine *machine, struct memory *mem, uint64_t baseaddr, int irq_nr, int use_fb); |
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|
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/* dev_dec5800.c: */ |
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#define DEV_DEC5800_LENGTH 0x1000 /* ? */ |
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struct dec5800_data { |
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uint32_t csr; |
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uint32_t vector_0x50; |
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}; |
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int dev_dec5800_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *); |
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struct dec5800_data *dev_dec5800_init(struct machine *machine, struct memory *mem, uint64_t baseaddr); |
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/* 16 slots, 0x2000 bytes each */ |
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#define DEV_DECBI_LENGTH 0x20000 |
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int dev_decbi_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *); |
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void dev_decbi_init(struct memory *mem, uint64_t baseaddr); |
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#define DEV_DECCCA_LENGTH 0x10000 /* ? */ |
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#define DEC_DECCCA_BASEADDR 0x19000000 /* ? I just made this up */ |
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int dev_deccca_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *); |
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void dev_deccca_init(struct memory *mem, uint64_t baseaddr); |
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#define DEV_DECXMI_LENGTH 0x800000 |
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int dev_decxmi_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *); |
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void dev_decxmi_init(struct memory *mem, uint64_t baseaddr); |
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|
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/* dev_eagle.c: */ |
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struct pci_data *dev_eagle_init(struct machine *machine, struct memory *mem, |
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int irqbase, int pciirq); |
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|
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/* dev_fb.c: */ |
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#define DEV_FB_LENGTH 0x3c0000 /* 3c0000 to not colide with */ |
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/* turbochannel rom, */ |
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/* otherwise size = 4MB */ |
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/* Type: */ |
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#define VFB_GENERIC 0 |
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#define VFB_HPC 1 |
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#define VFB_DEC_VFB01 2 |
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#define VFB_DEC_VFB02 3 |
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#define VFB_DEC_MAXINE 4 |
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#define VFB_PLAYSTATION2 5 |
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/* Extra flags: */ |
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#define VFB_REVERSE_START 0x10000 |
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struct vfb_data { |
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struct memory *memory; |
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int vfb_type; |
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|
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int vfb_scaledown; |
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|
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int xsize; |
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int ysize; |
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int bit_depth; |
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int color32k; /* hack for 16-bit HPCmips */ |
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int psp_15bit; /* playstation portable hack */ |
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|
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unsigned char color_plane_mask; |
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|
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int bytes_per_line; /* cached */ |
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|
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int visible_xsize; |
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int visible_ysize; |
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|
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size_t framebuffer_size; |
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int x11_xsize, x11_ysize; |
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|
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int update_x1, update_y1, update_x2, update_y2; |
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|
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/* RGB palette for <= 8 bit modes: (r,g,b bytes for each) */ |
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unsigned char rgb_palette[256 * 3]; |
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|
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char *name; |
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char title[100]; |
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|
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void (*redraw_func)(struct vfb_data *, int, int); |
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|
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/* These should always be in sync: */ |
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unsigned char *framebuffer; |
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struct fb_window *fb_window; |
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}; |
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#define VFB_MFB_BT455 0x100000 |
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#define VFB_MFB_BT431 0x180000 |
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#define VFB_MFB_VRAM 0x200000 |
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#define VFB_CFB_BT459 0x200000 |
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void set_grayscale_palette(struct vfb_data *d, int ncolors); |
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void dev_fb_resize(struct vfb_data *d, int new_xsize, int new_ysize); |
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void dev_fb_setcursor(struct vfb_data *d, int cursor_x, int cursor_y, int on, |
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int cursor_xsize, int cursor_ysize); |
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void framebuffer_blockcopyfill(struct vfb_data *d, int fillflag, int fill_r, |
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int fill_g, int fill_b, int x1, int y1, int x2, int y2, |
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int from_x, int from_y); |
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void dev_fb_tick(struct cpu *, void *); |
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int dev_fb_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, |
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unsigned char *data, size_t len, int writeflag, void *); |
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struct vfb_data *dev_fb_init(struct machine *machine, struct memory *mem, |
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uint64_t baseaddr, int vfb_type, int visible_xsize, int visible_ysize, |
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int xsize, int ysize, int bit_depth, char *name); |
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|
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/* dev_footbridge: */ |
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#define N_FOOTBRIDGE_TIMERS 4 |
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struct footbridge_data { |
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struct pci_data *pcibus; |
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|
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int console_handle; |
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|
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int timer_tick_countdown[N_FOOTBRIDGE_TIMERS]; |
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uint32_t timer_load[N_FOOTBRIDGE_TIMERS]; |
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uint32_t timer_value[N_FOOTBRIDGE_TIMERS]; |
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uint32_t timer_control[N_FOOTBRIDGE_TIMERS]; |
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int timer_being_read; |
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int timer_poll_mode; |
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|
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uint32_t irq_status; |
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uint32_t irq_enable; |
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|
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uint32_t fiq_status; |
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uint32_t fiq_enable; |
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}; |
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|
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/* dev_gc.c: */ |
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struct gc_data { |
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int reassert_irq; |
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uint32_t status_hi; |
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uint32_t status_lo; |
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uint32_t enable_hi; |
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uint32_t enable_lo; |
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}; |
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struct gc_data *dev_gc_init(struct machine *, struct memory *, uint64_t addr, |
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int reassert_irq); |
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|
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/* dev_gt.c: */ |
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#define DEV_GT_LENGTH 0x1000 |
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int dev_gt_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, |
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unsigned char *data, size_t len, int writeflag, void *); |
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struct pci_data *dev_gt_init(struct machine *machine, struct memory *mem, |
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uint64_t baseaddr, int irq_nr, int pciirq, int type); |
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|
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/* dev_i80321.c: */ |
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struct i80321_data { |
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/* Interrupt Controller */ |
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int reassert_irq; |
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uint32_t status; |
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uint32_t enable; |
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|
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uint32_t pci_addr; |
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struct pci_data *pci_bus; |
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|
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/* Memory Controller: */ |
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uint32_t mcu_reg[0x100 / sizeof(uint32_t)]; |
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}; |
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|
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/* dev_jazz.c: */ |
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#define DEV_JAZZ_LENGTH 0x280 |
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struct jazz_data { |
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struct cpu *cpu; |
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|
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/* Jazz stuff: */ |
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uint32_t int_enable_mask; |
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uint32_t int_asserted; |
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|
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/* ISA stuff: */ |
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uint32_t isa_int_enable_mask; |
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uint32_t isa_int_asserted; |
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|
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int interval; |
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int interval_start; |
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|
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int jazz_timer_value; |
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int jazz_timer_current; |
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|
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uint64_t dma_translation_table_base; |
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uint64_t dma_translation_table_limit; |
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|
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uint32_t dma0_mode; |
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uint32_t dma0_enable; |
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uint32_t dma0_count; |
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uint32_t dma0_addr; |
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|
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uint32_t dma1_mode; |
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/* same for dma1,2,3 actually (TODO) */ |
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|
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int led; |
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}; |
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size_t dev_jazz_dma_controller(void *dma_controller_data, |
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unsigned char *data, size_t len, int writeflag); |
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|
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/* dev_kn01.c: */ |
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#define DEV_KN01_CSR_LENGTH 0x0000000000000004 |
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int dev_kn01_csr_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *); |
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void dev_kn01_csr_init(struct memory *mem, uint64_t baseaddr, int color_fb); |
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#define DEV_VDAC_LENGTH 0x20 |
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#define DEV_VDAC_MAPWA 0x00 |
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#define DEV_VDAC_MAP 0x04 |
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#define DEV_VDAC_MASK 0x08 |
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#define DEV_VDAC_MAPRA 0x0c |
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#define DEV_VDAC_OVERWA 0x10 |
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#define DEV_VDAC_OVER 0x14 |
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#define DEV_VDAC_OVERRA 0x1c |
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int dev_vdac_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *); |
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void dev_vdac_init(struct memory *mem, uint64_t baseaddr, unsigned char *rgb_palette, int color_fb_flag); |
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|
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/* dev_kn02.c: */ |
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struct kn02_csr { |
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uint8_t csr[sizeof(uint32_t)]; |
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uint8_t filler[4096 - sizeof(uint32_t)]; /* for dyntrans mapping */ |
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}; |
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int dev_kn02_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *); |
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struct kn02_csr *dev_kn02_init(struct cpu *cpu, struct memory *mem, |
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uint64_t baseaddr); |
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|
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/* dev_kn220.c: */ |
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#define DEV_DEC5500_IOBOARD_LENGTH 0x100000 |
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int dev_dec5500_ioboard_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *); |
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struct dec5500_ioboard_data *dev_dec5500_ioboard_init(struct cpu *cpu, struct memory *mem, uint64_t baseaddr); |
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#define DEV_SGEC_LENGTH 0x1000 |
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int dev_sgec_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *); |
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void dev_sgec_init(struct memory *mem, uint64_t baseaddr, int irq_nr); |
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|
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/* dev_kn230.c: */ |
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struct kn230_csr { |
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uint32_t csr; |
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}; |
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|
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/* dev_le.c: */ |
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#define DEV_LE_LENGTH 0x1c0200 |
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int dev_le_access(struct cpu *cpu, struct memory *mem, |
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uint64_t relative_addr, unsigned char *data, size_t len, |
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int writeflag, void *); |
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void dev_le_init(struct machine *machine, struct memory *mem, |
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uint64_t baseaddr, uint64_t buf_start, uint64_t buf_end, |
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int irq_nr, int len); |
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|
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/* dev_m700_fb.c: */ |
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#define DEV_M700_FB_LENGTH 0x10000 /* TODO? */ |
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int dev_m700_fb_access(struct cpu *cpu, struct memory *mem, |
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uint64_t relative_addr, unsigned char *data, size_t len, |
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int writeflag, void *); |
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void dev_m700_fb_init(struct machine *machine, struct memory *mem, |
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uint64_t baseaddr, uint64_t baseaddr2); |
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|
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/* dev_malta.c: */ |
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struct malta_data { |
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uint8_t assert_lo; |
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uint8_t assert_hi; |
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uint8_t disable_lo; |
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uint8_t disable_hi; |
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int poll_mode; |
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}; |
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|
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/* dev_mc146818.c: */ |
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#define DEV_MC146818_LENGTH 0x0000000000000100 |
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#define MC146818_DEC 0 |
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#define MC146818_PC_CMOS 1 |
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#define MC146818_ARC_NEC 2 |
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#define MC146818_ARC_JAZZ 3 |
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#define MC146818_SGI 4 |
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#define MC146818_CATS 5 |
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#define MC146818_ALGOR 6 |
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#define MC146818_PMPPC 7 |
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/* see mc146818reg.h for more info */ |
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void dev_mc146818_tick(struct cpu *cpu, void *); |
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int dev_mc146818_access(struct cpu *cpu, struct memory *mem, |
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uint64_t relative_addr, unsigned char *data, size_t len, |
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int writeflag, void *); |
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void dev_mc146818_init(struct machine *machine, struct memory *mem, |
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uint64_t baseaddr, int irq_nr, int access_style, int addrdiv); |
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|
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/* dev_pckbc.c: */ |
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#define DEV_PCKBC_LENGTH 0x10 |
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#define PCKBC_8042 0 |
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#define PCKBC_8242 1 |
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#define PCKBC_JAZZ 3 |
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int dev_pckbc_access(struct cpu *cpu, struct memory *mem, |
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uint64_t relative_addr, unsigned char *data, size_t len, |
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int writeflag, void *); |
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int dev_pckbc_init(struct machine *machine, struct memory *mem, |
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uint64_t baseaddr, int type, int keyboard_irqnr, int mouse_irqnr, |
450 |
int in_use, int pc_style_flag); |
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|
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/* dev_pmppc.c: */ |
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int dev_pmppc_board_access(struct cpu *cpu, struct memory *mem, |
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uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, |
455 |
void *); |
456 |
void dev_pmppc_init(struct memory *mem); |
457 |
|
458 |
/* dev_ps2_spd.c: */ |
459 |
#define DEV_PS2_SPD_LENGTH 0x800 |
460 |
int dev_ps2_spd_access(struct cpu *cpu, struct memory *mem, |
461 |
uint64_t relative_addr, unsigned char *data, size_t len, |
462 |
int writeflag, void *); |
463 |
void dev_ps2_spd_init(struct machine *machine, struct memory *mem, |
464 |
uint64_t baseaddr); |
465 |
|
466 |
/* dev_ps2_stuff.c: */ |
467 |
#include "ps2_dmacreg.h" |
468 |
#define N_PS2_DMA_CHANNELS 10 |
469 |
#define N_PS2_TIMERS 4 |
470 |
struct ps2_data { |
471 |
uint32_t timer_count[N_PS2_TIMERS]; |
472 |
uint32_t timer_comp[N_PS2_TIMERS]; |
473 |
uint32_t timer_mode[N_PS2_TIMERS]; |
474 |
uint32_t timer_hold[N_PS2_TIMERS]; /* NOTE: only 0 and 1 are valid */ |
475 |
|
476 |
uint64_t dmac_reg[DMAC_REGSIZE / 0x10]; |
477 |
|
478 |
uint64_t other_memory_base[N_PS2_DMA_CHANNELS]; |
479 |
|
480 |
uint32_t intr; |
481 |
uint32_t imask; |
482 |
uint32_t sbus_smflg; |
483 |
}; |
484 |
#define DEV_PS2_STUFF_LENGTH 0x10000 |
485 |
int dev_ps2_stuff_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *); |
486 |
struct ps2_data *dev_ps2_stuff_init(struct machine *machine, struct memory *mem, uint64_t baseaddr); |
487 |
|
488 |
/* dev_pmagja.c: */ |
489 |
#define DEV_PMAGJA_LENGTH 0x3c0000 |
490 |
int dev_pmagja_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *); |
491 |
void dev_pmagja_init(struct machine *machine, struct memory *mem, uint64_t baseaddr, int irq_nr); |
492 |
|
493 |
/* dev_prep.c: */ |
494 |
struct prep_data { |
495 |
uint32_t int_status; |
496 |
}; |
497 |
|
498 |
/* dev_px.c: */ |
499 |
struct px_data { |
500 |
struct memory *fb_mem; |
501 |
struct vfb_data *vfb_data; |
502 |
int type; |
503 |
char *px_name; |
504 |
int irq_nr; |
505 |
int bitdepth; |
506 |
int xconfig; |
507 |
int yconfig; |
508 |
|
509 |
uint32_t intr; |
510 |
unsigned char sram[128 * 1024]; |
511 |
}; |
512 |
/* TODO: perhaps these types are wrong? */ |
513 |
#define DEV_PX_TYPE_PX 0 |
514 |
#define DEV_PX_TYPE_PXG 1 |
515 |
#define DEV_PX_TYPE_PXGPLUS 2 |
516 |
#define DEV_PX_TYPE_PXGPLUSTURBO 3 |
517 |
#define DEV_PX_LENGTH 0x3c0000 |
518 |
int dev_px_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, |
519 |
unsigned char *data, size_t len, int writeflag, void *); |
520 |
void dev_px_init(struct machine *machine, struct memory *mem, uint64_t baseaddr, |
521 |
int px_type, int irq_nr); |
522 |
|
523 |
/* dev_ram.c: */ |
524 |
#define DEV_RAM_RAM 0 |
525 |
#define DEV_RAM_MIRROR 1 |
526 |
#define DEV_RAM_MIGHT_POINT_TO_DEVICES 0x10 |
527 |
int dev_ram_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, |
528 |
unsigned char *data, size_t len, int writeflag, void *); |
529 |
void dev_ram_init(struct machine *machine, uint64_t baseaddr, uint64_t length, |
530 |
int mode, uint64_t otheraddr); |
531 |
|
532 |
/* dev_scc.c: */ |
533 |
#define DEV_SCC_LENGTH 0x1000 |
534 |
int dev_scc_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, |
535 |
unsigned char *data, size_t len, int writeflag, void *); |
536 |
int dev_scc_dma_func(struct cpu *cpu, void *extra, uint64_t addr, |
537 |
size_t dma_len, int tx); |
538 |
void *dev_scc_init(struct machine *machine, struct memory *mem, |
539 |
uint64_t baseaddr, int irq_nr, int use_fb, int scc_nr, int addrmul); |
540 |
|
541 |
/* dev_sfb.c: */ |
542 |
#define DEV_SFB_LENGTH 0x400000 |
543 |
int dev_sfb_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, |
544 |
unsigned char *data, size_t len, int writeflag, void *); |
545 |
void dev_sfb_init(struct machine *machine, struct memory *mem, |
546 |
uint64_t baseaddr, struct vfb_data *vfb_data); |
547 |
|
548 |
/* dev_sgi_gbe.c: */ |
549 |
#define DEV_SGI_GBE_LENGTH 0x1000000 |
550 |
int dev_sgi_gbe_access(struct cpu *cpu, struct memory *mem, |
551 |
uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, |
552 |
void *); |
553 |
void dev_sgi_gbe_init(struct machine *machine, struct memory *mem, |
554 |
uint64_t baseaddr); |
555 |
|
556 |
/* dev_sgi_ip20.c: */ |
557 |
#define DEV_SGI_IP20_LENGTH 0x40 |
558 |
#define DEV_SGI_IP20_BASE 0x1fb801c0 |
559 |
struct sgi_ip20_data { |
560 |
int dummy; |
561 |
}; |
562 |
int dev_sgi_ip20_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *); |
563 |
struct sgi_ip20_data *dev_sgi_ip20_init(struct cpu *cpu, struct memory *mem, uint64_t baseaddr); |
564 |
|
565 |
/* dev_sgi_ip22.c: */ |
566 |
#define DEV_SGI_IP22_LENGTH 0x100 |
567 |
#define DEV_SGI_IP22_IMC_LENGTH 0x100 |
568 |
#define DEV_SGI_IP22_UNKNOWN2_LENGTH 0x100 |
569 |
#define IP22_IMC_BASE 0x1fa00000 |
570 |
#define IP22_UNKNOWN2_BASE 0x1fb94000 |
571 |
struct sgi_ip22_data { |
572 |
int guiness_flag; |
573 |
uint32_t reg[DEV_SGI_IP22_LENGTH / 4]; |
574 |
uint32_t imc_reg[DEV_SGI_IP22_IMC_LENGTH / 4]; |
575 |
uint32_t unknown2_reg[DEV_SGI_IP22_UNKNOWN2_LENGTH / 4]; |
576 |
uint32_t unknown_timer; |
577 |
}; |
578 |
int dev_sgi_ip22_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *); |
579 |
struct sgi_ip22_data *dev_sgi_ip22_init(struct machine *machine, struct memory *mem, uint64_t baseaddr, int guiness_flag); |
580 |
|
581 |
/* dev_sgi_ip30.c: */ |
582 |
#define DEV_SGI_IP30_LENGTH 0x80000 |
583 |
struct sgi_ip30_data { |
584 |
/* ip30: */ |
585 |
uint64_t imask0; /* 0x10000 */ |
586 |
uint64_t reg_0x10018; |
587 |
uint64_t isr; /* 0x10030 */ |
588 |
uint64_t reg_0x20000; |
589 |
uint64_t reg_0x30000; |
590 |
|
591 |
/* ip30_2: */ |
592 |
uint64_t reg_0x0029c; |
593 |
|
594 |
/* ip30_3: */ |
595 |
uint64_t reg_0x00284; |
596 |
|
597 |
/* ip30_4: */ |
598 |
uint64_t reg_0x000b0; |
599 |
|
600 |
/* ip30_5: */ |
601 |
uint64_t reg_0x00000; |
602 |
}; |
603 |
int dev_sgi_ip30_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *); |
604 |
struct sgi_ip30_data *dev_sgi_ip30_init(struct machine *machine, struct memory *mem, uint64_t baseaddr); |
605 |
|
606 |
/* dev_sgi_ip32.c: */ |
607 |
#define DEV_CRIME_LENGTH 0x0000000000001000 |
608 |
struct crime_data { |
609 |
unsigned char reg[DEV_CRIME_LENGTH]; |
610 |
int irq_nr; |
611 |
int use_fb; |
612 |
}; |
613 |
int dev_crime_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *); |
614 |
struct crime_data *dev_crime_init(struct machine *machine, struct memory *mem, uint64_t baseaddr, int irq_nr, int use_fb); |
615 |
#define DEV_MACE_LENGTH 0x100 |
616 |
struct mace_data { |
617 |
unsigned char reg[DEV_MACE_LENGTH]; |
618 |
int irqnr; |
619 |
}; |
620 |
int dev_mace_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *); |
621 |
struct mace_data *dev_mace_init(struct memory *mem, uint64_t baseaddr, int irqnr); |
622 |
#define DEV_MACEPCI_LENGTH 0x1000 |
623 |
int dev_macepci_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *); |
624 |
struct pci_data *dev_macepci_init(struct machine *machine, struct memory *mem, uint64_t baseaddr, int pciirq); |
625 |
#define DEV_SGI_MEC_LENGTH 0x1000 |
626 |
int dev_sgi_mec_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *); |
627 |
void dev_sgi_mec_init(struct machine *machine, struct memory *mem, uint64_t baseaddr, int irq_nr, unsigned char *macaddr); |
628 |
#define DEV_SGI_UST_LENGTH 0x10000 |
629 |
int dev_sgi_ust_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *); |
630 |
void dev_sgi_ust_init(struct memory *mem, uint64_t baseaddr); |
631 |
#define DEV_SGI_MTE_LENGTH 0x10000 |
632 |
int dev_sgi_mte_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *); |
633 |
void dev_sgi_mte_init(struct memory *mem, uint64_t baseaddr); |
634 |
|
635 |
/* dev_sii.c: */ |
636 |
#define DEV_SII_LENGTH 0x100 |
637 |
void dev_sii_tick(struct cpu *cpu, void *); |
638 |
int dev_sii_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *); |
639 |
void dev_sii_init(struct machine *machine, struct memory *mem, uint64_t baseaddr, uint64_t buf_start, uint64_t buf_end, int irq_nr); |
640 |
|
641 |
/* dev_ssc.c: */ |
642 |
#define DEV_SSC_LENGTH 0x1000 |
643 |
int dev_ssc_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *); |
644 |
void dev_ssc_init(struct machine *machine, struct memory *mem, uint64_t baseaddr, int irq_nr, int use_fb, uint32_t *); |
645 |
|
646 |
/* dev_turbochannel.c: */ |
647 |
#define DEV_TURBOCHANNEL_LEN 0x0470 |
648 |
int dev_turbochannel_access(struct cpu *cpu, struct memory *mem, |
649 |
uint64_t relative_addr, unsigned char *data, size_t len, |
650 |
int writeflag, void *); |
651 |
void dev_turbochannel_init(struct machine *machine, struct memory *mem, |
652 |
int slot_nr, uint64_t baseaddr, uint64_t endaddr, char *device_name, |
653 |
int irq); |
654 |
|
655 |
/* dev_uninorth.c: */ |
656 |
struct pci_data *dev_uninorth_init(struct machine *machine, struct memory *mem, |
657 |
uint64_t addr, int irqbase, int pciirq); |
658 |
|
659 |
/* dev_v3.c: */ |
660 |
struct v3_data { |
661 |
struct pci_data *pci_data; |
662 |
uint16_t lb_map0; |
663 |
}; |
664 |
struct v3_data *dev_v3_init(struct machine *, struct memory *); |
665 |
|
666 |
/* dev_vga.c: */ |
667 |
int dev_vga_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, |
668 |
unsigned char *data, size_t len, int writeflag, void *); |
669 |
void dev_vga_init(struct machine *machine, struct memory *mem, |
670 |
uint64_t videomem_base, uint64_t control_base, char *name); |
671 |
|
672 |
/* dev_vr41xx.c: */ |
673 |
#define DEV_VR41XX_LENGTH 0x800 /* TODO? */ |
674 |
struct vr41xx_data { |
675 |
int cpumodel; |
676 |
|
677 |
int kiu_console_handle; |
678 |
uint32_t kiu_offset; |
679 |
int kiu_irq_nr; |
680 |
int kiu_int_assert; |
681 |
int d0; |
682 |
int d1; |
683 |
int d2; |
684 |
int d3; |
685 |
int d4; |
686 |
int d5; |
687 |
int dont_clear_next; |
688 |
int escape_state; |
689 |
|
690 |
/* See icureg.h in NetBSD for more info. */ |
691 |
uint16_t sysint1; |
692 |
uint16_t msysint1; |
693 |
uint16_t giuint; |
694 |
uint16_t giumask; |
695 |
uint16_t sysint2; |
696 |
uint16_t msysint2; |
697 |
}; |
698 |
|
699 |
int dev_vr41xx_access(struct cpu *cpu, struct memory *mem, |
700 |
uint64_t relative_addr, unsigned char *data, size_t len, |
701 |
int writeflag, void *); |
702 |
struct vr41xx_data *dev_vr41xx_init(struct machine *machine, |
703 |
struct memory *mem, int cpumodel); |
704 |
|
705 |
/* dev_wdsc.c: */ |
706 |
#define DEV_WDSC_NREGS 0x100 /* 8-bit register select */ |
707 |
#define DEV_WDSC_LENGTH 0x10 |
708 |
int dev_wdsc_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *); |
709 |
void dev_wdsc_init(struct machine *machine, struct memory *mem, uint64_t baseaddr, int controller_nr, int irq_nr); |
710 |
|
711 |
/* lk201.c: */ |
712 |
struct lk201_data { |
713 |
int use_fb; |
714 |
int console_handle; |
715 |
|
716 |
void (*add_to_rx_queue)(void *,int,int); |
717 |
void *add_data; |
718 |
|
719 |
unsigned char keyb_buf[8]; |
720 |
int keyb_buf_pos; |
721 |
|
722 |
int mouse_mode; |
723 |
int mouse_revision; /* 0..15 */ |
724 |
int mouse_x, mouse_y, mouse_buttons; |
725 |
|
726 |
int old_host_mouse_x; |
727 |
int old_host_mouse_y; |
728 |
int old_host_mouse_stays_put; |
729 |
int mouse_check_interval; |
730 |
int mouse_check_interval_reset; |
731 |
}; |
732 |
void lk201_tick(struct lk201_data *); |
733 |
void lk201_tx_data(struct lk201_data *, int port, int idata); |
734 |
void lk201_init(struct lk201_data *d, int use_fb, |
735 |
void (*add_to_rx_queue)(void *,int,int), int console_handle, void *); |
736 |
|
737 |
|
738 |
#endif /* DEVICES_H */ |
739 |
|