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#define CPU_X86_H |
#define CPU_X86_H |
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/* |
/* |
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* Copyright (C) 2005 Anders Gavare. All rights reserved. |
* Copyright (C) 2005-2006 Anders Gavare. All rights reserved. |
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* |
* |
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* Redistribution and use in source and binary forms, with or without |
* Redistribution and use in source and binary forms, with or without |
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* modification, are permitted provided that the following conditions are met: |
* modification, are permitted provided that the following conditions are met: |
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* SUCH DAMAGE. |
* SUCH DAMAGE. |
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* |
* |
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* |
* |
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* $Id: cpu_x86.h,v 1.33 2005/08/25 17:32:21 debug Exp $ |
* $Id: cpu_x86.h,v 1.48 2006/06/24 21:47:24 debug Exp $ |
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* |
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* x86 (including AMD64) cpu dependent stuff. |
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*/ |
*/ |
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#include "misc.h" |
#include "misc.h" |
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#define X86_PC_TO_IC_ENTRY(a) ((a) & (X86_IC_ENTRIES_PER_PAGE-1)) |
#define X86_PC_TO_IC_ENTRY(a) ((a) & (X86_IC_ENTRIES_PER_PAGE-1)) |
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#define X86_ADDR_TO_PAGENR(a) ((a) >> X86_IC_ENTRIES_SHIFT) |
#define X86_ADDR_TO_PAGENR(a) ((a) >> X86_IC_ENTRIES_SHIFT) |
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struct x86_instr_call { |
#define X86_L2N 17 |
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void (*f)(struct cpu *, struct x86_instr_call *); |
#define X86_L3N 18 |
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size_t arg[X86_N_IC_ARGS]; |
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}; |
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/* Translation cache struct for each physical page: */ |
DYNTRANS_MISC_DECLARATIONS(x86,X86,uint64_t) |
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struct x86_tc_physpage { |
DYNTRANS_MISC64_DECLARATIONS(x86,X86,uint8_t) |
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uint32_t next_ofs; /* or 0 for end of chain */ |
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uint64_t physaddr; |
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int flags; |
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struct x86_instr_call ics[X86_IC_ENTRIES_PER_PAGE + 1]; |
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}; |
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#define X86_N_VPH_ENTRIES 1048576 |
#define X86_MAX_VPH_TLB_ENTRIES 128 |
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#define X86_MAX_VPH_TLB_ENTRIES 256 |
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struct x86_vpg_tlb_entry { |
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int valid; |
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int writeflag; |
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int64_t timestamp; |
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unsigned char *host_page; |
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uint64_t vaddr_page; |
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uint64_t paddr_page; |
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}; |
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struct descriptor_cache { |
struct descriptor_cache { |
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int valid; |
int valid; |
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/* |
/* |
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* Instruction translation cache: |
* Instruction translation cache and Virtual->Physical->Host |
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*/ |
* address translation: |
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/* cur_ic_page is a pointer to an array of X86_IC_ENTRIES_PER_PAGE |
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instruction call entries. next_ic points to the next such |
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call to be executed. */ |
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struct x86_tc_physpage *cur_physpage; |
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struct x86_instr_call *cur_ic_page; |
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struct x86_instr_call *next_ic; |
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/* |
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* Virtual -> physical -> host address translation: |
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* |
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* host_load and host_store point to arrays of X86_N_VPH_ENTRIES |
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* pointers (to host pages); phys_addr points to an array of |
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* X86_N_VPH_ENTRIES uint32_t. |
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*/ |
*/ |
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DYNTRANS_ITC(x86) |
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struct x86_vpg_tlb_entry vph_tlb_entry[X86_MAX_VPH_TLB_ENTRIES]; |
VPH_TLBS(x86,X86) |
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unsigned char *host_load[X86_N_VPH_ENTRIES]; |
VPH32(x86,X86,uint64_t,uint8_t) |
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unsigned char *host_store[X86_N_VPH_ENTRIES]; |
VPH64(x86,X86,uint8_t) |
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uint32_t phys_addr[X86_N_VPH_ENTRIES]; |
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struct x86_tc_physpage *phys_page[X86_N_VPH_ENTRIES]; |
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}; |
}; |
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#define DESCR_TYPE_DATA 2 |
#define DESCR_TYPE_DATA 2 |
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#define LONG_MODE (cpu->cd.x86.efer & X86_EFER_LME) |
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#define PROTECTED_MODE (cpu->cd.x86.cr[0] & X86_CR0_PE) |
#define PROTECTED_MODE (cpu->cd.x86.cr[0] & X86_CR0_PE) |
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#define REAL_MODE (!PROTECTED_MODE) |
#define REAL_MODE (!PROTECTED_MODE) |
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/* cpu_x86.c: */ |
/* cpu_x86.c: */ |
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void reload_segment_descriptor(struct cpu *cpu, int segnr, int selector, |
void reload_segment_descriptor(struct cpu *cpu, int segnr, int selector, |
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uint64_t *curpcp); |
uint64_t *curpcp); |
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int x86_interrupt(struct cpu *cpu, int nr, int errcode); |
int x86_interrupt(struct cpu *cpu, int nr, int errcode); |
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int x86_memory_rw(struct cpu *cpu, struct memory *mem, uint64_t vaddr, |
int x86_memory_rw(struct cpu *cpu, struct memory *mem, uint64_t vaddr, |
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unsigned char *data, size_t len, int writeflag, int cache_flags); |
unsigned char *data, size_t len, int writeflag, int cache_flags); |
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void x86_update_translation_table(struct cpu *cpu, uint64_t vaddr_page, |
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unsigned char *host_page, int writeflag, uint64_t paddr_page); |
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void x8632_update_translation_table(struct cpu *cpu, uint64_t vaddr_page, |
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unsigned char *host_page, int writeflag, uint64_t paddr_page); |
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void x86_invalidate_translation_caches(struct cpu *cpu, uint64_t, int); |
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void x8632_invalidate_translation_caches(struct cpu *cpu, uint64_t, int); |
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void x86_invalidate_code_translation(struct cpu *cpu, uint64_t, int); |
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void x8632_invalidate_code_translation(struct cpu *cpu, uint64_t, int); |
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void x86_init_64bit_dummy_tables(struct cpu *cpu); |
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int x86_cpu_family_init(struct cpu_family *); |
int x86_cpu_family_init(struct cpu_family *); |
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/* memory_x86.c: */ |
/* memory_x86.c: */ |
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int x86_translate_address(struct cpu *cpu, uint64_t vaddr, |
int x86_translate_v2p(struct cpu *cpu, uint64_t vaddr, |
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uint64_t *return_addr, int flags); |
uint64_t *return_addr, int flags); |
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#endif /* CPU_X86_H */ |
#endif /* CPU_X86_H */ |