2 |
#define CPU_SH_H |
#define CPU_SH_H |
3 |
|
|
4 |
/* |
/* |
5 |
* Copyright (C) 2005 Anders Gavare. All rights reserved. |
* Copyright (C) 2005-2006 Anders Gavare. All rights reserved. |
6 |
* |
* |
7 |
* Redistribution and use in source and binary forms, with or without |
* Redistribution and use in source and binary forms, with or without |
8 |
* modification, are permitted provided that the following conditions are met: |
* modification, are permitted provided that the following conditions are met: |
28 |
* SUCH DAMAGE. |
* SUCH DAMAGE. |
29 |
* |
* |
30 |
* |
* |
31 |
* $Id: cpu_sh.h,v 1.10 2005/11/16 21:15:19 debug Exp $ |
* $Id: cpu_sh.h,v 1.13 2006/02/13 04:23:25 debug Exp $ |
32 |
*/ |
*/ |
33 |
|
|
34 |
#include "misc.h" |
#include "misc.h" |
46 |
#define SH_ADDR_TO_PAGENR(a) ((a) >> (SH_IC_ENTRIES_SHIFT \ |
#define SH_ADDR_TO_PAGENR(a) ((a) >> (SH_IC_ENTRIES_SHIFT \ |
47 |
+ SH_INSTR_ALIGNMENT_SHIFT)) |
+ SH_INSTR_ALIGNMENT_SHIFT)) |
48 |
|
|
49 |
struct sh_instr_call { |
DYNTRANS_MISC_DECLARATIONS(sh,SH,uint64_t) |
|
void (*f)(struct cpu *, struct sh_instr_call *); |
|
|
size_t arg[SH_N_IC_ARGS]; |
|
|
}; |
|
|
|
|
|
/* Translation cache struct for each physical page: */ |
|
|
struct sh_tc_physpage { |
|
|
struct sh_instr_call ics[SH_IC_ENTRIES_PER_PAGE + 1]; |
|
|
uint32_t next_ofs; /* or 0 for end of chain */ |
|
|
int flags; |
|
|
uint64_t physaddr; |
|
|
}; |
|
50 |
|
|
51 |
#define SH_N_VPH_ENTRIES 1048576 |
#define SH_MAX_VPH_TLB_ENTRIES 128 |
52 |
|
|
|
#define SH_MAX_VPH_TLB_ENTRIES 256 |
|
|
struct sh_vpg_tlb_entry { |
|
|
uint8_t valid; |
|
|
uint8_t writeflag; |
|
|
int64_t timestamp; |
|
|
uint64_t vaddr_page; |
|
|
uint64_t paddr_page; |
|
|
unsigned char *host_page; |
|
|
}; |
|
53 |
|
|
54 |
struct sh_cpu { |
struct sh_cpu { |
55 |
int bits; |
int bits; |
59 |
|
|
60 |
|
|
61 |
/* |
/* |
62 |
* Instruction translation cache: |
* Instruction translation cache and Virtual->Physical->Host |
63 |
|
* address translation: |
64 |
*/ |
*/ |
65 |
|
DYNTRANS_ITC(sh) |
66 |
/* cur_ic_page is a pointer to an array of SH_IC_ENTRIES_PER_PAGE |
VPH_TLBS(sh,SH) |
67 |
instruction call entries. next_ic points to the next such |
VPH32(sh,SH,uint64_t,uint8_t) |
68 |
call to be executed. */ |
VPH64(sh,SH,uint8_t) |
|
struct sh_tc_physpage *cur_physpage; |
|
|
struct sh_instr_call *cur_ic_page; |
|
|
struct sh_instr_call *next_ic; |
|
|
|
|
|
void (*combination_check)(struct cpu *, |
|
|
struct sh_instr_call *, int low_addr); |
|
|
|
|
|
/* |
|
|
* Virtual -> physical -> host address translation: |
|
|
* |
|
|
* host_load and host_store point to arrays of SH_N_VPH_ENTRIES |
|
|
* pointers (to host pages); phys_addr points to an array of |
|
|
* SH_N_VPH_ENTRIES uint32_t. |
|
|
*/ |
|
|
|
|
|
struct sh_vpg_tlb_entry vph_tlb_entry[SH_MAX_VPH_TLB_ENTRIES]; |
|
|
unsigned char *host_load[SH_N_VPH_ENTRIES]; |
|
|
unsigned char *host_store[SH_N_VPH_ENTRIES]; |
|
|
uint32_t phys_addr[SH_N_VPH_ENTRIES]; |
|
|
struct sh_tc_physpage *phys_page[SH_N_VPH_ENTRIES]; |
|
|
|
|
|
uint32_t phystranslation[SH_N_VPH_ENTRIES/32]; |
|
|
uint8_t vaddr_to_tlbindex[SH_N_VPH_ENTRIES]; |
|
69 |
}; |
}; |
70 |
|
|
71 |
|
|