25 |
* SUCH DAMAGE. |
* SUCH DAMAGE. |
26 |
* |
* |
27 |
* |
* |
28 |
* $Id: emul.c,v 1.279 2007/03/16 14:45:30 debug Exp $ |
* $Id: emul.c,v 1.282 2007/04/11 15:15:31 debug Exp $ |
29 |
* |
* |
30 |
* Emulation startup and misc. routines. |
* Emulation startup and misc. routines. |
31 |
*/ |
*/ |
696 |
} |
} |
697 |
break; |
break; |
698 |
|
|
|
case ARCH_RCA180X: |
|
|
cpu->pc &= 0xffff; |
|
|
break; |
|
|
|
|
699 |
case ARCH_M68K: |
case ARCH_M68K: |
700 |
break; |
break; |
701 |
|
|
729 |
case ARCH_SPARC: |
case ARCH_SPARC: |
730 |
break; |
break; |
731 |
|
|
|
case ARCH_TRANSPUTER: |
|
|
cpu->pc &= 0xffffffffULL; |
|
|
break; |
|
|
|
|
732 |
default: |
default: |
733 |
fatal("emul_machine_setup(): Internal error: " |
fatal("emul_machine_setup(): Internal error: " |
734 |
"Unimplemented arch %i\n", m->arch); |
"Unimplemented arch %i\n", m->arch); |
793 |
|
|
794 |
case ARCH_ARM: |
case ARCH_ARM: |
795 |
/* ARM cpus aren't 64-bit: */ |
/* ARM cpus aren't 64-bit: */ |
796 |
debug("0x%08x", (int)entrypoint); |
debug("0x%08"PRIx32, (uint32_t) entrypoint); |
797 |
break; |
break; |
798 |
|
|
799 |
case ARCH_AVR: |
case ARCH_AVR: |
800 |
/* Atmel AVR uses a 16-bit or 22-bit program counter: */ |
/* Atmel AVR uses a 16-bit or 22-bit program counter: */ |
801 |
debug("0x%04x", (int)entrypoint); |
debug("0x%04x", (int) entrypoint); |
802 |
break; |
break; |
803 |
|
|
804 |
case ARCH_MIPS: |
case ARCH_MIPS: |
805 |
if (cpu->is_32bit) { |
if (cpu->is_32bit) { |
806 |
debug("0x%08x", (int)m->cpus[ |
debug("0x%08"PRIx32, (uint32_t) |
807 |
m->bootstrap_cpu]->pc); |
m->cpus[m->bootstrap_cpu]->pc); |
808 |
if (cpu->cd.mips.gpr[MIPS_GPR_GP] != 0) |
if (cpu->cd.mips.gpr[MIPS_GPR_GP] != 0) |
809 |
debug(" (gp=0x%08x)", (int)m->cpus[ |
debug(" (gp=0x%08"PRIx32")", (uint32_t) |
810 |
m->bootstrap_cpu]->cd.mips.gpr[ |
m->cpus[m->bootstrap_cpu]->cd.mips.gpr[ |
811 |
MIPS_GPR_GP]); |
MIPS_GPR_GP]); |
812 |
} else { |
} else { |
813 |
debug("0x%016llx", (long long)m->cpus[ |
debug("0x%016"PRIx64, (uint64_t) |
814 |
m->bootstrap_cpu]->pc); |
m->cpus[m->bootstrap_cpu]->pc); |
815 |
if (cpu->cd.mips.gpr[MIPS_GPR_GP] != 0) |
if (cpu->cd.mips.gpr[MIPS_GPR_GP] != 0) |
816 |
debug(" (gp=0x%016llx)", (long long) |
debug(" (gp=0x%016"PRIx64")", (uint64_t) |
817 |
cpu->cd.mips.gpr[MIPS_GPR_GP]); |
cpu->cd.mips.gpr[MIPS_GPR_GP]); |
818 |
} |
} |
819 |
break; |
break; |
820 |
|
|
821 |
case ARCH_PPC: |
case ARCH_PPC: |
822 |
if (cpu->cd.ppc.bits == 32) |
if (cpu->cd.ppc.bits == 32) |
823 |
debug("0x%08x", (int)entrypoint); |
debug("0x%08"PRIx32, (uint32_t) entrypoint); |
824 |
else |
else |
825 |
debug("0x%016llx", (long long)entrypoint); |
debug("0x%016"PRIx64, (uint64_t) entrypoint); |
826 |
break; |
break; |
827 |
|
|
828 |
default: |
default: |
829 |
if (cpu->is_32bit) |
if (cpu->is_32bit) |
830 |
debug("0x%08x", (int)cpu->pc); |
debug("0x%08"PRIx32, (uint32_t) cpu->pc); |
831 |
else |
else |
832 |
debug("0x%016llx", (long long)cpu->pc); |
debug("0x%016"PRIx64, (uint64_t) cpu->pc); |
833 |
} |
} |
834 |
debug("\n"); |
debug("\n"); |
835 |
|
|
1051 |
e = emuls[i]; |
e = emuls[i]; |
1052 |
|
|
1053 |
for (j=0; j<e->n_machines; j++) { |
for (j=0; j<e->n_machines; j++) { |
|
if (e->machines[j]->gdb.port > 0) |
|
|
debugger_gdb_check_incoming( |
|
|
e->machines[j]); |
|
|
|
|
1054 |
anything = machine_run(e->machines[j]); |
anything = machine_run(e->machines[j]); |
1055 |
if (anything) |
if (anything) |
1056 |
go = 1; |
go = 1; |