25 |
* SUCH DAMAGE. |
* SUCH DAMAGE. |
26 |
* |
* |
27 |
* |
* |
28 |
* $Id: emul.c,v 1.235 2005/10/26 14:37:02 debug Exp $ |
* $Id: emul.c,v 1.238 2005/11/19 18:53:06 debug Exp $ |
29 |
* |
* |
30 |
* Emulation startup and misc. routines. |
* Emulation startup and misc. routines. |
31 |
*/ |
*/ |
112 |
* were automatically converted into the correct address. |
* were automatically converted into the correct address. |
113 |
*/ |
*/ |
114 |
|
|
115 |
if ((dp >> 32) == 0 && ((dp >> 31) & 1)) |
if (m->arch == ARCH_MIPS) { |
116 |
dp |= 0xffffffff00000000ULL; |
if ((dp >> 32) == 0 && ((dp >> 31) & 1)) |
117 |
|
dp |= 0xffffffff00000000ULL; |
118 |
|
} |
119 |
|
|
120 |
m->breakpoint_addr[i] = dp; |
m->breakpoint_addr[i] = dp; |
121 |
|
|
122 |
debug("breakpoint %i: 0x%016llx", i, (long long)dp); |
debug("breakpoint %i: 0x%llx", i, (long long)dp); |
123 |
if (string_flag) |
if (string_flag) |
124 |
debug(" (%s)", m->breakpoint_string[i]); |
debug(" (%s)", m->breakpoint_string[i]); |
125 |
debug("\n"); |
debug("\n"); |
1218 |
break; |
break; |
1219 |
|
|
1220 |
case ARCH_ARM: |
case ARCH_ARM: |
1221 |
|
if (cpu->pc & 3) { |
1222 |
|
fatal("ARM: lowest bits of pc set: TODO\n"); |
1223 |
|
exit(1); |
1224 |
|
} |
1225 |
cpu->pc &= 0xfffffffc; |
cpu->pc &= 0xfffffffc; |
|
cpu->cd.arm.r[ARM_PC] = cpu->pc; |
|
1226 |
break; |
break; |
1227 |
|
|
1228 |
case ARCH_AVR: |
case ARCH_AVR: |
1246 |
break; |
break; |
1247 |
|
|
1248 |
case ARCH_MIPS: |
case ARCH_MIPS: |
1249 |
if ((cpu->pc >> 32) == 0 |
if ((cpu->pc >> 32) == 0 && (cpu->pc & 0x80000000ULL)) |
|
&& (cpu->pc & 0x80000000ULL)) |
|
1250 |
cpu->pc |= 0xffffffff00000000ULL; |
cpu->pc |= 0xffffffff00000000ULL; |
1251 |
|
|
1252 |
cpu->cd.mips.gpr[MIPS_GPR_GP] = gp; |
cpu->cd.mips.gpr[MIPS_GPR_GP] = gp; |
1357 |
m->machine_type == MACHINE_SGI) && m->prom_emulation) |
m->machine_type == MACHINE_SGI) && m->prom_emulation) |
1358 |
add_arc_components(m); |
add_arc_components(m); |
1359 |
|
|
1360 |
|
|
1361 |
|
#if 0 |
1362 |
|
if (m->machine_type == MACHINE_IQ80321) { |
1363 |
|
store_32bit_word(cpu, 0xc0200000, 0); |
1364 |
|
store_32bit_word(cpu, 0xc0200004, 0xd0000000); |
1365 |
|
} |
1366 |
|
#endif |
1367 |
|
|
1368 |
|
|
1369 |
debug("starting cpu%i at ", m->bootstrap_cpu); |
debug("starting cpu%i at ", m->bootstrap_cpu); |
1370 |
switch (m->arch) { |
switch (m->arch) { |
1371 |
|
|