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/* |
/* |
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* Copyright (C) 2004-2006 Anders Gavare. All rights reserved. |
* Copyright (C) 2004-2007 Anders Gavare. All rights reserved. |
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* |
* |
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* Redistribution and use in source and binary forms, with or without |
* Redistribution and use in source and binary forms, with or without |
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* modification, are permitted provided that the following conditions are met: |
* modification, are permitted provided that the following conditions are met: |
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* SUCH DAMAGE. |
* SUCH DAMAGE. |
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* |
* |
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* |
* |
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* $Id: dev_vr41xx.c,v 1.41 2006/10/02 09:26:53 debug Exp $ |
* $Id: dev_vr41xx.c,v 1.43 2007/01/21 21:02:57 debug Exp $ |
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* |
* |
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* VR41xx (actually, VR4122 and VR4131) misc functions. |
* VR41xx (VR4122 and VR4131) misc functions. |
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* |
* |
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* This is just a big hack. TODO: Fix. |
* This is just a big hack. |
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* |
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* TODO: Implement more functionality some day. |
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*/ |
*/ |
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#include <stdio.h> |
#include <stdio.h> |
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#include "cpu.h" |
#include "cpu.h" |
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#include "device.h" |
#include "device.h" |
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#include "devices.h" |
#include "devices.h" |
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#include "interrupt.h" |
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#include "machine.h" |
#include "machine.h" |
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#include "memory.h" |
#include "memory.h" |
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#include "misc.h" |
#include "misc.h" |
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#include "vr_rtcreg.h" |
#include "vr_rtcreg.h" |
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/* #define debug fatal */ |
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#define DEV_VR41XX_TICKSHIFT 14 |
#define DEV_VR41XX_TICKSHIFT 14 |
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/* #define debug fatal */ |
#define DEV_VR41XX_LENGTH 0x800 /* TODO? */ |
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struct vr41xx_data { |
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struct interrupt cpu_irq; /* Connected to MIPS irq 2 */ |
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int cpumodel; /* Model nr, e.g. 4121 */ |
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/* KIU: */ |
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int kiu_console_handle; |
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uint32_t kiu_offset; |
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struct interrupt kiu_irq; |
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int kiu_int_assert; |
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int old_kiu_int_assert; |
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int d0, d1, d2, d3, d4, d5; |
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int dont_clear_next; |
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int escape_state; |
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/* Timer: */ |
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int pending_timer_interrupts; |
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struct interrupt timer_irq; |
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struct timer *timer; |
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/* See icureg.h in NetBSD for more info. */ |
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uint16_t sysint1; |
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uint16_t msysint1; |
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uint16_t giuint; |
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uint16_t giumask; |
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uint16_t sysint2; |
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uint16_t msysint2; |
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struct interrupt giu_irq; |
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}; |
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static void recalc_kiu_int_assert(struct cpu *cpu, struct vr41xx_data *d) |
/* |
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* vr41xx_vrip_interrupt_assert(): |
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* vr41xx_vrip_interrupt_deassert(): |
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*/ |
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void vr41xx_vrip_interrupt_assert(struct interrupt *interrupt) |
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{ |
{ |
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if (d->kiu_int_assert != 0) |
struct vr41xx_data *d = interrupt->extra; |
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cpu_interrupt(cpu, 8 + d->kiu_irq_nr); |
int line = interrupt->line; |
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if (line < 16) |
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d->sysint1 |= (1 << line); |
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else |
else |
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cpu_interrupt_ack(cpu, 8 + d->kiu_irq_nr); |
d->sysint2 |= (1 << (line-16)); |
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if ((d->sysint1 & d->msysint1) | (d->sysint2 & d->msysint2)) |
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INTERRUPT_ASSERT(d->cpu_irq); |
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} |
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void vr41xx_vrip_interrupt_deassert(struct interrupt *interrupt) |
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{ |
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struct vr41xx_data *d = interrupt->extra; |
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int line = interrupt->line; |
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if (line < 16) |
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d->sysint1 &= ~(1 << line); |
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else |
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d->sysint2 &= ~(1 << (line-16)); |
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if (!(d->sysint1 & d->msysint1) && !(d->sysint2 & d->msysint2)) |
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INTERRUPT_DEASSERT(d->cpu_irq); |
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} |
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/* |
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* vr41xx_giu_interrupt_assert(): |
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* vr41xx_giu_interrupt_deassert(): |
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*/ |
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void vr41xx_giu_interrupt_assert(struct interrupt *interrupt) |
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{ |
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struct vr41xx_data *d = interrupt->extra; |
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int line = interrupt->line; |
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d->giuint |= (1 << line); |
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if (d->giuint & d->giumask) |
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INTERRUPT_ASSERT(d->giu_irq); |
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} |
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void vr41xx_giu_interrupt_deassert(struct interrupt *interrupt) |
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{ |
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struct vr41xx_data *d = interrupt->extra; |
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int line = interrupt->line; |
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d->giuint &= ~(1 << line); |
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if (!(d->giuint & d->giumask)) |
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INTERRUPT_DEASSERT(d->giu_irq); |
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} |
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static void recalc_kiu_int_assert(struct cpu *cpu, struct vr41xx_data *d) |
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{ |
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if (d->kiu_int_assert != d->old_kiu_int_assert) { |
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d->old_kiu_int_assert = d->kiu_int_assert; |
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if (d->kiu_int_assert != 0) |
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INTERRUPT_ASSERT(d->kiu_irq); |
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else |
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INTERRUPT_DEASSERT(d->kiu_irq); |
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} |
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} |
} |
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{ |
{ |
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struct vr41xx_data *d = extra; |
struct vr41xx_data *d = extra; |
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if (d->pending_timer_interrupts > 0) { |
if (d->pending_timer_interrupts > 0) |
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if (d->cpumodel == 4121 || d->cpumodel == 4181) |
INTERRUPT_ASSERT(d->timer_irq); |
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cpu_interrupt(cpu, 3); |
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else |
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cpu_interrupt(cpu, 8 + VRIP_INTR_ETIMER); |
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} |
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if (cpu->machine->use_x11) |
if (cpu->machine->use_x11) |
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vr41xx_keytick(cpu, d); |
vr41xx_keytick(cpu, d); |
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*/ |
*/ |
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case 0x13e: /* on 4181? */ |
case 0x13e: /* on 4181? */ |
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/* RTC interrupt register... */ |
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/* Ack. timer interrupts? */ |
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cpu_interrupt_ack(cpu, 8 + VRIP_INTR_ETIMER); |
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if (d->pending_timer_interrupts > 0) |
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d->pending_timer_interrupts --; |
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break; |
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case 0x1de: /* on 4121? */ |
case 0x1de: /* on 4121? */ |
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/* RTC interrupt register... */ |
/* RTC interrupt register... */ |
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/* Ack. timer interrupts? */ |
/* Ack. timer interrupts? */ |
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cpu_interrupt_ack(cpu, 3); |
INTERRUPT_DEASSERT(d->timer_irq); |
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if (d->pending_timer_interrupts > 0) |
if (d->pending_timer_interrupts > 0) |
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d->pending_timer_interrupts --; |
d->pending_timer_interrupts --; |
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break; |
break; |
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} |
} |
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ret: |
ret: |
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/* Recalculate interrupt assertions: */ |
/* |
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cpu_interrupt_ack(cpu, 8 + 31); /* TODO: hopefully nothing |
* Recalculate interrupt assertions: |
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useful at irq 15 in |
*/ |
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sysint2 */ |
if (d->giuint & d->giumask) |
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INTERRUPT_ASSERT(d->giu_irq); |
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else |
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INTERRUPT_DEASSERT(d->giu_irq); |
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if ((d->sysint1 & d->msysint1) | (d->sysint2 & d->msysint2)) |
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INTERRUPT_ASSERT(d->cpu_irq); |
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else |
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INTERRUPT_DEASSERT(d->cpu_irq); |
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if (writeflag == MEM_READ) |
if (writeflag == MEM_READ) |
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memory_writemax64(cpu, data, len, odata); |
memory_writemax64(cpu, data, len, odata); |
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/* |
/* |
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* dev_vr41xx_init(): |
* dev_vr41xx_init(): |
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* |
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* machine->path is something like "emul[0].machine[0]". |
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*/ |
*/ |
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struct vr41xx_data *dev_vr41xx_init(struct machine *machine, |
struct vr41xx_data *dev_vr41xx_init(struct machine *machine, |
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struct memory *mem, int cpumodel) |
struct memory *mem, int cpumodel) |
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{ |
{ |
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uint64_t baseaddr = 0; |
uint64_t baseaddr = 0; |
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char tmps[100]; |
char tmps[300]; |
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int i; |
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struct vr41xx_data *d = malloc(sizeof(struct vr41xx_data)); |
struct vr41xx_data *d = malloc(sizeof(struct vr41xx_data)); |
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if (d == NULL) { |
if (d == NULL) { |
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} |
} |
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memset(d, 0, sizeof(struct vr41xx_data)); |
memset(d, 0, sizeof(struct vr41xx_data)); |
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/* Connect to MIPS irq 2: */ |
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snprintf(tmps, sizeof(tmps), "%s.cpu[%i].2", |
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machine->path, machine->bootstrap_cpu); |
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INTERRUPT_CONNECT(tmps, d->cpu_irq); |
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/* |
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* Register VRIP interrupt lines 0..25: |
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*/ |
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for (i=0; i<=25; i++) { |
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struct interrupt template; |
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snprintf(tmps, sizeof(tmps), "%s.cpu[%i].vrip.%i", |
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machine->path, machine->bootstrap_cpu, i); |
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memset(&template, 0, sizeof(template)); |
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template.line = i; |
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template.name = tmps; |
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template.extra = d; |
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template.interrupt_assert = vr41xx_vrip_interrupt_assert; |
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template.interrupt_deassert = vr41xx_vrip_interrupt_deassert; |
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interrupt_handler_register(&template); |
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} |
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/* |
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* Register GIU interrupt lines 0..31: |
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*/ |
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for (i=0; i<32; i++) { |
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struct interrupt template; |
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snprintf(tmps, sizeof(tmps), "%s.cpu[%i].vrip.%i.giu.%i", |
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machine->path, machine->bootstrap_cpu, VRIP_INTR_GIU, i); |
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memset(&template, 0, sizeof(template)); |
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template.line = i; |
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template.name = tmps; |
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template.extra = d; |
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template.interrupt_assert = vr41xx_giu_interrupt_assert; |
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template.interrupt_deassert = vr41xx_giu_interrupt_deassert; |
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interrupt_handler_register(&template); |
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} |
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d->cpumodel = cpumodel; |
d->cpumodel = cpumodel; |
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/* TODO: VRC4173 has the KIU at offset 0x100? */ |
/* TODO: VRC4173 has the KIU at offset 0x100? */ |
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d->kiu_offset = 0x180; |
d->kiu_offset = 0x180; |
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d->kiu_console_handle = console_start_slave_inputonly( |
d->kiu_console_handle = console_start_slave_inputonly( |
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machine, "kiu", 1); |
machine, "kiu", 1); |
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d->kiu_irq_nr = VRIP_INTR_KIU; |
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/* Connect to the KIU and GIU interrupts: */ |
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snprintf(tmps, sizeof(tmps), "%s.cpu[%i].vrip.%i", |
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machine->path, machine->bootstrap_cpu, VRIP_INTR_GIU); |
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INTERRUPT_CONNECT(tmps, d->giu_irq); |
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snprintf(tmps, sizeof(tmps), "%s.cpu[%i].vrip.%i", |
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machine->path, machine->bootstrap_cpu, VRIP_INTR_KIU); |
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INTERRUPT_CONNECT(tmps, d->kiu_irq); |
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if (machine->use_x11) |
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machine->main_console_handle = d->kiu_console_handle; |
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switch (cpumodel) { |
switch (cpumodel) { |
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case 4101: |
case 4101: |
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exit(1); |
exit(1); |
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} |
} |
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|
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if (d->cpumodel == 4121 || d->cpumodel == 4181) |
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snprintf(tmps, sizeof(tmps), "%s.cpu[%i].3", |
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machine->path, machine->bootstrap_cpu); |
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else |
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snprintf(tmps, sizeof(tmps), "%s.cpu[%i].vrip.%i", |
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machine->path, machine->bootstrap_cpu, VRIP_INTR_ETIMER); |
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INTERRUPT_CONNECT(tmps, d->timer_irq); |
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memory_device_register(mem, "vr41xx", baseaddr, DEV_VR41XX_LENGTH, |
memory_device_register(mem, "vr41xx", baseaddr, DEV_VR41XX_LENGTH, |
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dev_vr41xx_access, (void *)d, DM_DEFAULT, NULL); |
dev_vr41xx_access, (void *)d, DM_DEFAULT, NULL); |
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|
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* which chips. |
* which chips. |
778 |
*/ |
*/ |
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if (cpumodel == 4131) { |
if (cpumodel == 4131) { |
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snprintf(tmps, sizeof(tmps), "ns16550 irq=%i addr=0x%"PRIx64" " |
snprintf(tmps, sizeof(tmps), "ns16550 irq=%s.cpu[%i].vrip.%i " |
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"name2=siu", 8+VRIP_INTR_SIU, (uint64_t) (baseaddr+0x800)); |
"addr=0x%"PRIx64" name2=siu", machine->path, |
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machine->bootstrap_cpu, VRIP_INTR_SIU, |
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(uint64_t) (baseaddr+0x800)); |
784 |
device_add(machine, tmps); |
device_add(machine, tmps); |
785 |
} else { |
} else { |
786 |
/* This is used by Linux and NetBSD: */ |
/* This is used by Linux and NetBSD: */ |
787 |
snprintf(tmps, sizeof(tmps), "ns16550 irq=%i addr=0x%x " |
snprintf(tmps, sizeof(tmps), "ns16550 irq=%s.cpu[%i]." |
788 |
"name2=serial", 8+VRIP_INTR_SIU, 0xc000000); |
"vrip.%i addr=0x%x name2=serial", machine->path, |
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machine->bootstrap_cpu, VRIP_INTR_SIU, 0xc000000); |
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device_add(machine, tmps); |
device_add(machine, tmps); |
791 |
} |
} |
792 |
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|
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/* Hm... maybe this should not be here. TODO */ |
/* Hm... maybe this should not be here. TODO */ |
794 |
device_add(machine, "pcic addr=0x140003e0"); |
snprintf(tmps, sizeof(tmps), "pcic irq=%s.cpu[%i].vrip.%i addr=" |
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"0x140003e0", machine->path, machine->bootstrap_cpu, |
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VRIP_INTR_GIU); |
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device_add(machine, tmps); |
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|
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machine_add_tickfunction(machine, dev_vr41xx_tick, d, |
machine_add_tickfunction(machine, dev_vr41xx_tick, d, |
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DEV_VR41XX_TICKSHIFT, 0.0); |
DEV_VR41XX_TICKSHIFT, 0.0); |