src/devices/dev_ns16550.c

/*
 *  Copyright (C) 2003-2007  Anders Gavare.  All rights reserved.
 *
 *  Redistribution and use in source and binary forms, with or without
 *  modification, are permitted provided that the following conditions are met:
 *
 *  1. Redistributions of source code must retain the above copyright
 *     notice, this list of conditions and the following disclaimer.
 *  2. Redistributions in binary form must reproduce the above copyright  
 *     notice, this list of conditions and the following disclaimer in the 
 *     documentation and/or other materials provided with the distribution.
 *  3. The name of the author may not be used to endorse or promote products
 *     derived from this software without specific prior written permission.
 *
 *  THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
 *  ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 *  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 *  ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE   
 *  FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 *  DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 *  OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 *  HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 *  LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 *  OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 *  SUCH DAMAGE.
 *   
 *
 *  $Id: dev_ns16550.c,v 1.58 2006/12/30 13:30:58 debug Exp $
 *  
 *  NS16550 serial controller.
 *
 *
 *  TODO: Implement the FIFO.
 */

#include <stdio.h>
#include <stdlib.h>
#include <string.h>

#include "console.h"
#include "cpu.h"
#include "device.h"
#include "interrupt.h"
#include "machine.h"
#include "memory.h"
#include "misc.h"

#include "comreg.h"


/*  #define debug fatal  */

#define TICK_SHIFT              14
#define DEV_NS16550_LENGTH      8

struct ns_data {
        int             addrmult;
        int             in_use;
        char            *name;
        int             console_handle;
        int             enable_fifo;

        struct interrupt irq;

        unsigned char   reg[DEV_NS16550_LENGTH];
        unsigned char   fcr;            /*  FIFO control register  */
        int             int_asserted;
        int             dlab;           /*  Divisor Latch Access bit  */
        int             divisor;

        int             databits;
        char            parity;
        const char      *stopbits;
};


DEVICE_TICK(ns16550)
{
        /*
         *  This function is called at regular intervals. An interrupt is
         *  asserted if there is a character available for reading, or if the
         *  transmitter slot is empty (i.e. the ns16550 is ready to transmit).
         */
        struct ns_data *d = extra;

        d->reg[com_iir] &= ~IIR_RXRDY;
        if (console_charavail(d->console_handle))
                d->reg[com_iir] |= IIR_RXRDY;

        /*
         *  If interrupts are enabled, and interrupts are pending, then
         *  cause a CPU interrupt.
         */

        if (((d->reg[com_ier] & IER_ETXRDY) && (d->reg[com_iir] & IIR_TXRDY)) ||
            ((d->reg[com_ier] & IER_ERXRDY) && (d->reg[com_iir] & IIR_RXRDY))) {
                d->reg[com_iir] &= ~IIR_NOPEND;
                if (d->reg[com_mcr] & MCR_IENABLE) {
                        INTERRUPT_ASSERT(d->irq);
                        d->int_asserted = 1;
                }
        } else {
                d->reg[com_iir] |= IIR_NOPEND;
                if (d->int_asserted)
                        INTERRUPT_DEASSERT(d->irq);
                d->int_asserted = 0;
        }
}


DEVICE_ACCESS(ns16550)
{
        uint64_t idata = 0, odata=0;
        size_t i;
        struct ns_data *d = extra;

        if (writeflag == MEM_WRITE)
                idata = memory_readmax64(cpu, data, len);

#if 0
        /*  The NS16550 should be accessed using byte read/writes:  */
        if (len != 1)
                fatal("[ ns16550 (%s): len=%i, idata=0x%16llx! ]\n",
                    d->name, len, (long long)idata);
#endif

        /*
         *  Always ready to transmit:
         */
        d->reg[com_lsr] |= LSR_TXRDY | LSR_TSRE;
        d->reg[com_msr] |= MSR_DCD | MSR_DSR | MSR_CTS;

        d->reg[com_iir] &= ~0xf0;
        if (d->enable_fifo)
                d->reg[com_iir] |= ((d->fcr << 5) & 0xc0);

        d->reg[com_lsr] &= ~LSR_RXRDY;
        if (console_charavail(d->console_handle))
                d->reg[com_lsr] |= LSR_RXRDY;

        relative_addr /= d->addrmult;

        if (relative_addr >= DEV_NS16550_LENGTH) {
                fatal("[ ns16550 (%s): outside register space? relative_addr="
                    "0x%llx. bad addrmult? bad device length? ]\n", d->name,
                    (long long)relative_addr);
                return 0;
        }

        switch (relative_addr) {

        case com_data:  /*  data AND low byte of the divisor  */
                /*  Read/write of the Divisor value:  */
                if (d->dlab) {
                        /*  Write or read the low byte of the divisor:  */
                        if (writeflag == MEM_WRITE)
                                d->divisor = (d->divisor & 0xff00) | idata;
                        else
                                odata = d->divisor & 0xff;
                        break;
                }

                /*  Read/write of data:  */
                if (writeflag == MEM_WRITE) {
                        if (d->reg[com_mcr] & MCR_LOOPBACK)
                                console_makeavail(d->console_handle, idata);
                        else
                                console_putchar(d->console_handle, idata);
                        d->reg[com_iir] |= IIR_TXRDY;
                } else {
                        int x = console_readchar(d->console_handle);
                        odata = x < 0? 0 : x;
                }
                dev_ns16550_tick(cpu, d);
                break;

        case com_ier:   /*  interrupt enable AND high byte of the divisor  */
                /*  Read/write of the Divisor value:  */
                if (d->dlab) {
                        if (writeflag == MEM_WRITE) {
                                /*  Set the high byte of the divisor:  */
                                d->divisor = (d->divisor & 0xff) | (idata << 8);
                                debug("[ ns16550 (%s): speed set to %i bps ]\n",
                                    d->name, (int)(115200 / d->divisor));
                        } else
                                odata = d->divisor >> 8;
                        break;
                }

                /*  IER:  */
                if (writeflag == MEM_WRITE) {
                        /*  This is to supress Linux' behaviour  */
                        if (idata != 0)
                                debug("[ ns16550 (%s): write to ier: 0x%02x ]"
                                    "\n", d->name, (int)idata);

                        /*  Needed for NetBSD 2.0.x, but not 1.6.2?  */
                        if (!(d->reg[com_ier] & IER_ETXRDY)
                            && (idata & IER_ETXRDY))
                                d->reg[com_iir] |= IIR_TXRDY;

                        d->reg[com_ier] = idata;
                        dev_ns16550_tick(cpu, d);
                } else
                        odata = d->reg[com_ier];
                break;

        case com_iir:   /*  interrupt identification (r), fifo control (w)  */
                if (writeflag == MEM_WRITE) {
                        debug("[ ns16550 (%s): write to fifo control: 0x%02x ]"
                            "\n", d->name, (int)idata);
                        d->fcr = idata;
                } else {
                        odata = d->reg[com_iir];
                        if (d->reg[com_iir] & IIR_TXRDY)
                                d->reg[com_iir] &= ~IIR_TXRDY;
                        debug("[ ns16550 (%s): read from iir: 0x%02x ]\n",
                            d->name, (int)odata);
                        dev_ns16550_tick(cpu, d);
                }
                break;

        case com_lsr:
                if (writeflag == MEM_WRITE) {
                        debug("[ ns16550 (%s): write to lsr: 0x%02x ]\n",
                            d->name, (int)idata);
                        d->reg[com_lsr] = idata;
                } else {
                        odata = d->reg[com_lsr];
                        /*  debug("[ ns16550 (%s): read from lsr: 0x%02x ]\n",
                            d->name, (int)odata);  */
                }
                break;

        case com_msr:
                if (writeflag == MEM_WRITE) {
                        debug("[ ns16550 (%s): write to msr: 0x%02x ]\n",
                            d->name, (int)idata);
                        d->reg[com_msr] = idata;
                } else {
                        odata = d->reg[com_msr];
                        debug("[ ns16550 (%s): read from msr: 0x%02x ]\n",
                            d->name, (int)odata);
                }
                break;

        case com_lctl:
                if (writeflag == MEM_WRITE) {
                        d->reg[com_lctl] = idata;
                        switch (idata & 0x7) {
                        case 0: d->databits = 5; d->stopbits = "1"; break;
                        case 1: d->databits = 6; d->stopbits = "1"; break;
                        case 2: d->databits = 7; d->stopbits = "1"; break;
                        case 3: d->databits = 8; d->stopbits = "1"; break;
                        case 4: d->databits = 5; d->stopbits = "1.5"; break;
                        case 5: d->databits = 6; d->stopbits = "2"; break;
                        case 6: d->databits = 7; d->stopbits = "2"; break;
                        case 7: d->databits = 8; d->stopbits = "2"; break;
                        }
                        switch ((idata & 0x38) / 0x8) {
                        case 0: d->parity = 'N'; break;         /*  none  */
                        case 1: d->parity = 'O'; break;         /*  odd  */
                        case 2: d->parity = '?'; break;
                        case 3: d->parity = 'E'; break;         /*  even  */
                        case 4: d->parity = '?'; break;
                        case 5: d->parity = 'Z'; break;         /*  zero  */
                        case 6: d->parity = '?'; break;
                        case 7: d->parity = 'o'; break;         /*  one  */
                        }

                        d->dlab = idata & 0x80? 1 : 0;

                        debug("[ ns16550 (%s): write to lctl: 0x%02x (%s%s"
                            "setting mode %i%c%s) ]\n", d->name, (int)idata,
                            d->dlab? "Divisor Latch access, " : "",
                            idata&0x40? "sending BREAK, " : "",
                            d->databits, d->parity, d->stopbits);
                } else {
                        odata = d->reg[com_lctl];
                        debug("[ ns16550 (%s): read from lctl: 0x%02x ]\n",
                            d->name, (int)odata);
                }
                break;

        case com_mcr:
                if (writeflag == MEM_WRITE) {
                        d->reg[com_mcr] = idata;
                        debug("[ ns16550 (%s): write to mcr: 0x%02x ]\n",
                            d->name, (int)idata);
                        if (!(d->reg[com_iir] & IIR_TXRDY)
                            && (idata & MCR_IENABLE))
                                d->reg[com_iir] |= IIR_TXRDY;
                        dev_ns16550_tick(cpu, d);
                } else {
                        odata = d->reg[com_mcr];
                        debug("[ ns16550 (%s): read from mcr: 0x%02x ]\n",
                            d->name, (int)odata);
                }
                break;

        default:
                if (writeflag==MEM_READ) {
                        debug("[ ns16550 (%s): read from reg %i ]\n",
                            d->name, (int)relative_addr);
                        odata = d->reg[relative_addr];
                } else {
                        debug("[ ns16550 (%s): write to reg %i:",
                            d->name, (int)relative_addr);
                        for (i=0; i<len; i++)
                                debug(" %02x", data[i]);
                        debug(" ]\n");
                        d->reg[relative_addr] = idata;
                }
        }

        if (writeflag == MEM_READ)
                memory_writemax64(cpu, data, len, odata);

        return 1;
}


DEVINIT(ns16550)
{
        struct ns_data *d = malloc(sizeof(struct ns_data));
        size_t nlen;
        char *name;

        if (d == NULL) {
                fprintf(stderr, "out of memory\n");
                exit(1);
        }
        memset(d, 0, sizeof(struct ns_data));

        d->addrmult     = devinit->addr_mult;
        d->in_use       = devinit->in_use;
        d->enable_fifo  = 1;
        d->dlab         = 0;
        d->divisor      = 115200 / 9600;
        d->databits     = 8;
        d->parity       = 'N';
        d->stopbits     = "1";
        d->name         = devinit->name2 != NULL? devinit->name2 : "";
        d->console_handle =
            console_start_slave(devinit->machine, devinit->name2 != NULL?
            devinit->name2 : devinit->name, d->in_use);

        INTERRUPT_CONNECT(devinit->interrupt_path, d->irq);

        nlen = strlen(devinit->name) + 10;
        if (devinit->name2 != NULL)
                nlen += strlen(devinit->name2);
        name = malloc(nlen);
        if (name == NULL) {
                fprintf(stderr, "out of memory\n");
                exit(1);
        }
        if (devinit->name2 != NULL && devinit->name2[0])
                snprintf(name, nlen, "%s [%s]", devinit->name, devinit->name2);
        else
                snprintf(name, nlen, "%s", devinit->name);

        memory_device_register(devinit->machine->memory, name, devinit->addr,
            DEV_NS16550_LENGTH * d->addrmult, dev_ns16550_access, d,
            DM_DEFAULT, NULL);
        machine_add_tickfunction(devinit->machine,
            dev_ns16550_tick, d, TICK_SHIFT, 0.0);

        /*
         *  NOTE:  Ugly cast into a pointer, because this is a convenient way
         *         to return the console handle to code in src/machine.c.
         */
        devinit->return_ptr = (void *)(size_t)d->console_handle;

        return 1;
}

1	dpavlin	4	/*
2	dpavlin	34	* Copyright (C) 2003-2007 Anders Gavare. All rights reserved.
3	dpavlin	4	*
4			* Redistribution and use in source and binary forms, with or without
5			* modification, are permitted provided that the following conditions are met:
6			*
7			* 1. Redistributions of source code must retain the above copyright
8			* notice, this list of conditions and the following disclaimer.
9			* 2. Redistributions in binary form must reproduce the above copyright
10			* notice, this list of conditions and the following disclaimer in the
11			* documentation and/or other materials provided with the distribution.
12			* 3. The name of the author may not be used to endorse or promote products
13			* derived from this software without specific prior written permission.
14			*
15			* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16			* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17			* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18			* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19			* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20			* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21			* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22			* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23			* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24			* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25			* SUCH DAMAGE.
26			*
27			*
28	dpavlin	34	* $Id: dev_ns16550.c,v 1.58 2006/12/30 13:30:58 debug Exp $
29	dpavlin	4	*
30			* NS16550 serial controller.
31			*
32	dpavlin	12	*
33			* TODO: Implement the FIFO.
34	dpavlin	4	*/
35
36			#include <stdio.h>
37			#include <stdlib.h>
38			#include <string.h>
39
40			#include "console.h"
41			#include "cpu.h"
42	dpavlin	12	#include "device.h"
43	dpavlin	34	#include "interrupt.h"
44	dpavlin	4	#include "machine.h"
45			#include "memory.h"
46			#include "misc.h"
47
48			#include "comreg.h"
49
50
51	dpavlin	12	/* #define debug fatal */
52	dpavlin	4
53	dpavlin	12	#define TICK_SHIFT 14
54			#define DEV_NS16550_LENGTH 8
55	dpavlin	4
56			struct ns_data {
57	dpavlin	12	int addrmult;
58			int in_use;
59	dpavlin	14	char *name;
60	dpavlin	4	int console_handle;
61	dpavlin	12	int enable_fifo;
62	dpavlin	4
63	dpavlin	34	struct interrupt irq;
64
65	dpavlin	12	unsigned char reg[DEV_NS16550_LENGTH];
66			unsigned char fcr; /* FIFO control register */
67	dpavlin	20	int int_asserted;
68	dpavlin	4	int dlab; /* Divisor Latch Access bit */
69			int divisor;
70	dpavlin	12
71	dpavlin	4	int databits;
72			char parity;
73			const char *stopbits;
74			};
75
76
77	dpavlin	32	DEVICE_TICK(ns16550)
78	dpavlin	4	{
79	dpavlin	32	/*
80			* This function is called at regular intervals. An interrupt is
81			* asserted if there is a character available for reading, or if the
82			* transmitter slot is empty (i.e. the ns16550 is ready to transmit).
83			*/
84	dpavlin	4	struct ns_data *d = extra;
85
86			d->reg[com_iir] &= ~IIR_RXRDY;
87	dpavlin	22	if (console_charavail(d->console_handle))
88	dpavlin	12	d->reg[com_iir] \|= IIR_RXRDY;
89	dpavlin	4
90	dpavlin	12	/*
91			* If interrupts are enabled, and interrupts are pending, then
92			* cause a CPU interrupt.
93			*/
94	dpavlin	24
95	dpavlin	12	if (((d->reg[com_ier] & IER_ETXRDY) && (d->reg[com_iir] & IIR_TXRDY)) \|\|
96			((d->reg[com_ier] & IER_ERXRDY) && (d->reg[com_iir] & IIR_RXRDY))) {
97	dpavlin	4	d->reg[com_iir] &= ~IIR_NOPEND;
98	dpavlin	20	if (d->reg[com_mcr] & MCR_IENABLE) {
99	dpavlin	34	INTERRUPT_ASSERT(d->irq);
100	dpavlin	20	d->int_asserted = 1;
101			}
102	dpavlin	12	} else {
103			d->reg[com_iir] \|= IIR_NOPEND;
104	dpavlin	20	if (d->int_asserted)
105	dpavlin	34	INTERRUPT_DEASSERT(d->irq);
106	dpavlin	20	d->int_asserted = 0;
107	dpavlin	4	}
108			}
109
110
111	dpavlin	22	DEVICE_ACCESS(ns16550)
112	dpavlin	4	{
113			uint64_t idata = 0, odata=0;
114	dpavlin	22	size_t i;
115	dpavlin	4	struct ns_data *d = extra;
116
117	dpavlin	18	if (writeflag == MEM_WRITE)
118			idata = memory_readmax64(cpu, data, len);
119	dpavlin	4
120	dpavlin	20	#if 0
121	dpavlin	12	/* The NS16550 should be accessed using byte read/writes: */
122			if (len != 1)
123	dpavlin	14	fatal("[ ns16550 (%s): len=%i, idata=0x%16llx! ]\n",
124			d->name, len, (long long)idata);
125	dpavlin	20	#endif
126	dpavlin	12
127			/*
128			* Always ready to transmit:
129			*/
130	dpavlin	4	d->reg[com_lsr] \|= LSR_TXRDY \| LSR_TSRE;
131	dpavlin	12	d->reg[com_msr] \|= MSR_DCD \| MSR_DSR \| MSR_CTS;
132
133			d->reg[com_iir] &= ~0xf0;
134			if (d->enable_fifo)
135			d->reg[com_iir] \|= ((d->fcr << 5) & 0xc0);
136
137	dpavlin	4	d->reg[com_lsr] &= ~LSR_RXRDY;
138	dpavlin	22	if (console_charavail(d->console_handle))
139	dpavlin	12	d->reg[com_lsr] \|= LSR_RXRDY;
140	dpavlin	4
141	dpavlin	12	relative_addr /= d->addrmult;
142	dpavlin	4
143	dpavlin	12	if (relative_addr >= DEV_NS16550_LENGTH) {
144	dpavlin	14	fatal("[ ns16550 (%s): outside register space? relative_addr="
145			"0x%llx. bad addrmult? bad device length? ]\n", d->name,
146	dpavlin	12	(long long)relative_addr);
147			return 0;
148	dpavlin	4	}
149
150	dpavlin	12	switch (relative_addr) {
151	dpavlin	4
152	dpavlin	12	case com_data: /* data AND low byte of the divisor */
153	dpavlin	4	/* Read/write of the Divisor value: */
154			if (d->dlab) {
155	dpavlin	12	/* Write or read the low byte of the divisor: */
156			if (writeflag == MEM_WRITE)
157			d->divisor = (d->divisor & 0xff00) \| idata;
158			else
159	dpavlin	4	odata = d->divisor & 0xff;
160			break;
161			}
162
163	dpavlin	12	/* Read/write of data: */
164	dpavlin	4	if (writeflag == MEM_WRITE) {
165	dpavlin	22	if (d->reg[com_mcr] & MCR_LOOPBACK)
166	dpavlin	4	console_makeavail(d->console_handle, idata);
167	dpavlin	22	else
168	dpavlin	4	console_putchar(d->console_handle, idata);
169			d->reg[com_iir] \|= IIR_TXRDY;
170			} else {
171	dpavlin	22	int x = console_readchar(d->console_handle);
172			odata = x < 0? 0 : x;
173	dpavlin	4	}
174	dpavlin	12	dev_ns16550_tick(cpu, d);
175	dpavlin	4	break;
176	dpavlin	12
177	dpavlin	4	case com_ier: /* interrupt enable AND high byte of the divisor */
178			/* Read/write of the Divisor value: */
179			if (d->dlab) {
180			if (writeflag == MEM_WRITE) {
181			/* Set the high byte of the divisor: */
182	dpavlin	12	d->divisor = (d->divisor & 0xff) \| (idata << 8);
183	dpavlin	14	debug("[ ns16550 (%s): speed set to %i bps ]\n",
184			d->name, (int)(115200 / d->divisor));
185	dpavlin	12	} else
186			odata = d->divisor >> 8;
187	dpavlin	4	break;
188			}
189
190			/* IER: */
191			if (writeflag == MEM_WRITE) {
192			/* This is to supress Linux' behaviour */
193			if (idata != 0)
194	dpavlin	14	debug("[ ns16550 (%s): write to ier: 0x%02x ]"
195			"\n", d->name, (int)idata);
196	dpavlin	4
197	dpavlin	12	/* Needed for NetBSD 2.0.x, but not 1.6.2? */
198			if (!(d->reg[com_ier] & IER_ETXRDY)
199	dpavlin	4	&& (idata & IER_ETXRDY))
200			d->reg[com_iir] \|= IIR_TXRDY;
201
202	dpavlin	12	d->reg[com_ier] = idata;
203	dpavlin	4	dev_ns16550_tick(cpu, d);
204	dpavlin	12	} else
205			odata = d->reg[com_ier];
206	dpavlin	4	break;
207	dpavlin	12
208	dpavlin	4	case com_iir: /* interrupt identification (r), fifo control (w) */
209			if (writeflag == MEM_WRITE) {
210	dpavlin	14	debug("[ ns16550 (%s): write to fifo control: 0x%02x ]"
211			"\n", d->name, (int)idata);
212	dpavlin	12	d->fcr = idata;
213	dpavlin	4	} else {
214	dpavlin	12	odata = d->reg[com_iir];
215	dpavlin	24	if (d->reg[com_iir] & IIR_TXRDY)
216			d->reg[com_iir] &= ~IIR_TXRDY;
217	dpavlin	14	debug("[ ns16550 (%s): read from iir: 0x%02x ]\n",
218			d->name, (int)odata);
219	dpavlin	4	dev_ns16550_tick(cpu, d);
220			}
221			break;
222	dpavlin	12
223	dpavlin	4	case com_lsr:
224			if (writeflag == MEM_WRITE) {
225	dpavlin	14	debug("[ ns16550 (%s): write to lsr: 0x%02x ]\n",
226			d->name, (int)idata);
227	dpavlin	12	d->reg[com_lsr] = idata;
228	dpavlin	4	} else {
229	dpavlin	12	odata = d->reg[com_lsr];
230	dpavlin	14	/* debug("[ ns16550 (%s): read from lsr: 0x%02x ]\n",
231			d->name, (int)odata); */
232	dpavlin	4	}
233			break;
234	dpavlin	12
235	dpavlin	4	case com_msr:
236			if (writeflag == MEM_WRITE) {
237	dpavlin	14	debug("[ ns16550 (%s): write to msr: 0x%02x ]\n",
238			d->name, (int)idata);
239	dpavlin	12	d->reg[com_msr] = idata;
240	dpavlin	4	} else {
241	dpavlin	12	odata = d->reg[com_msr];
242	dpavlin	14	debug("[ ns16550 (%s): read from msr: 0x%02x ]\n",
243			d->name, (int)odata);
244	dpavlin	4	}
245			break;
246	dpavlin	12
247	dpavlin	4	case com_lctl:
248			if (writeflag == MEM_WRITE) {
249	dpavlin	12	d->reg[com_lctl] = idata;
250	dpavlin	4	switch (idata & 0x7) {
251			case 0: d->databits = 5; d->stopbits = "1"; break;
252			case 1: d->databits = 6; d->stopbits = "1"; break;
253			case 2: d->databits = 7; d->stopbits = "1"; break;
254			case 3: d->databits = 8; d->stopbits = "1"; break;
255			case 4: d->databits = 5; d->stopbits = "1.5"; break;
256			case 5: d->databits = 6; d->stopbits = "2"; break;
257			case 6: d->databits = 7; d->stopbits = "2"; break;
258			case 7: d->databits = 8; d->stopbits = "2"; break;
259			}
260			switch ((idata & 0x38) / 0x8) {
261			case 0: d->parity = 'N'; break; /* none */
262			case 1: d->parity = 'O'; break; /* odd */
263			case 2: d->parity = '?'; break;
264			case 3: d->parity = 'E'; break; /* even */
265			case 4: d->parity = '?'; break;
266			case 5: d->parity = 'Z'; break; /* zero */
267			case 6: d->parity = '?'; break;
268			case 7: d->parity = 'o'; break; /* one */
269			}
270
271			d->dlab = idata & 0x80? 1 : 0;
272
273	dpavlin	14	debug("[ ns16550 (%s): write to lctl: 0x%02x (%s%s"
274			"setting mode %i%c%s) ]\n", d->name, (int)idata,
275	dpavlin	4	d->dlab? "Divisor Latch access, " : "",
276			idata&0x40? "sending BREAK, " : "",
277			d->databits, d->parity, d->stopbits);
278			} else {
279	dpavlin	12	odata = d->reg[com_lctl];
280	dpavlin	14	debug("[ ns16550 (%s): read from lctl: 0x%02x ]\n",
281			d->name, (int)odata);
282	dpavlin	4	}
283			break;
284	dpavlin	12
285	dpavlin	4	case com_mcr:
286			if (writeflag == MEM_WRITE) {
287	dpavlin	12	d->reg[com_mcr] = idata;
288	dpavlin	14	debug("[ ns16550 (%s): write to mcr: 0x%02x ]\n",
289			d->name, (int)idata);
290	dpavlin	24	if (!(d->reg[com_iir] & IIR_TXRDY)
291			&& (idata & MCR_IENABLE))
292			d->reg[com_iir] \|= IIR_TXRDY;
293			dev_ns16550_tick(cpu, d);
294	dpavlin	4	} else {
295	dpavlin	12	odata = d->reg[com_mcr];
296	dpavlin	14	debug("[ ns16550 (%s): read from mcr: 0x%02x ]\n",
297			d->name, (int)odata);
298	dpavlin	4	}
299			break;
300	dpavlin	12
301	dpavlin	4	default:
302			if (writeflag==MEM_READ) {
303	dpavlin	14	debug("[ ns16550 (%s): read from reg %i ]\n",
304			d->name, (int)relative_addr);
305	dpavlin	4	odata = d->reg[relative_addr];
306			} else {
307	dpavlin	14	debug("[ ns16550 (%s): write to reg %i:",
308			d->name, (int)relative_addr);
309	dpavlin	4	for (i=0; i<len; i++)
310			debug(" %02x", data[i]);
311			debug(" ]\n");
312			d->reg[relative_addr] = idata;
313			}
314			}
315
316			if (writeflag == MEM_READ)
317			memory_writemax64(cpu, data, len, odata);
318
319			return 1;
320			}
321
322
323	dpavlin	22	DEVINIT(ns16550)
324	dpavlin	4	{
325	dpavlin	12	struct ns_data *d = malloc(sizeof(struct ns_data));
326	dpavlin	10	size_t nlen;
327	dpavlin	12	char *name;
328	dpavlin	4
329			if (d == NULL) {
330			fprintf(stderr, "out of memory\n");
331			exit(1);
332			}
333			memset(d, 0, sizeof(struct ns_data));
334	dpavlin	34
335	dpavlin	14	d->addrmult = devinit->addr_mult;
336			d->in_use = devinit->in_use;
337			d->enable_fifo = 1;
338			d->dlab = 0;
339			d->divisor = 115200 / 9600;
340			d->databits = 8;
341			d->parity = 'N';
342			d->stopbits = "1";
343			d->name = devinit->name2 != NULL? devinit->name2 : "";
344	dpavlin	12	d->console_handle =
345	dpavlin	22	console_start_slave(devinit->machine, devinit->name2 != NULL?
346			devinit->name2 : devinit->name, d->in_use);
347	dpavlin	4
348	dpavlin	34	INTERRUPT_CONNECT(devinit->interrupt_path, d->irq);
349
350	dpavlin	12	nlen = strlen(devinit->name) + 10;
351			if (devinit->name2 != NULL)
352			nlen += strlen(devinit->name2);
353			name = malloc(nlen);
354			if (name == NULL) {
355			fprintf(stderr, "out of memory\n");
356	dpavlin	4	exit(1);
357			}
358	dpavlin	12	if (devinit->name2 != NULL && devinit->name2[0])
359			snprintf(name, nlen, "%s [%s]", devinit->name, devinit->name2);
360	dpavlin	4	else
361	dpavlin	12	snprintf(name, nlen, "%s", devinit->name);
362	dpavlin	4
363	dpavlin	12	memory_device_register(devinit->machine->memory, name, devinit->addr,
364			DEV_NS16550_LENGTH * d->addrmult, dev_ns16550_access, d,
365	dpavlin	20	DM_DEFAULT, NULL);
366	dpavlin	12	machine_add_tickfunction(devinit->machine,
367	dpavlin	24	dev_ns16550_tick, d, TICK_SHIFT, 0.0);
368	dpavlin	4
369	dpavlin	12	/*
370			* NOTE: Ugly cast into a pointer, because this is a convenient way
371			* to return the console handle to code in src/machine.c.
372			*/
373			devinit->return_ptr = (void *)(size_t)d->console_handle;
374
375			return 1;
376	dpavlin	4	}
377