1 |
dpavlin |
4 |
/* |
2 |
|
|
* Copyright (C) 2003-2005 Anders Gavare. All rights reserved. |
3 |
|
|
* |
4 |
|
|
* Redistribution and use in source and binary forms, with or without |
5 |
|
|
* modification, are permitted provided that the following conditions are met: |
6 |
|
|
* |
7 |
|
|
* 1. Redistributions of source code must retain the above copyright |
8 |
|
|
* notice, this list of conditions and the following disclaimer. |
9 |
|
|
* 2. Redistributions in binary form must reproduce the above copyright |
10 |
|
|
* notice, this list of conditions and the following disclaimer in the |
11 |
|
|
* documentation and/or other materials provided with the distribution. |
12 |
|
|
* 3. The name of the author may not be used to endorse or promote products |
13 |
|
|
* derived from this software without specific prior written permission. |
14 |
|
|
* |
15 |
|
|
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND |
16 |
|
|
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
17 |
|
|
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
18 |
|
|
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE |
19 |
|
|
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
20 |
|
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS |
21 |
|
|
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) |
22 |
|
|
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
23 |
|
|
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY |
24 |
|
|
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF |
25 |
|
|
* SUCH DAMAGE. |
26 |
|
|
* |
27 |
|
|
* |
28 |
dpavlin |
12 |
* $Id: dev_ns16550.c,v 1.40 2005/08/12 06:15:31 debug Exp $ |
29 |
dpavlin |
4 |
* |
30 |
|
|
* NS16550 serial controller. |
31 |
|
|
* |
32 |
dpavlin |
12 |
* |
33 |
|
|
* TODO: Implement the FIFO. |
34 |
dpavlin |
4 |
*/ |
35 |
|
|
|
36 |
|
|
#include <stdio.h> |
37 |
|
|
#include <stdlib.h> |
38 |
|
|
#include <string.h> |
39 |
|
|
|
40 |
|
|
#include "console.h" |
41 |
|
|
#include "cpu.h" |
42 |
dpavlin |
12 |
#include "device.h" |
43 |
dpavlin |
4 |
#include "machine.h" |
44 |
|
|
#include "memory.h" |
45 |
|
|
#include "misc.h" |
46 |
|
|
|
47 |
|
|
#include "comreg.h" |
48 |
|
|
|
49 |
|
|
|
50 |
dpavlin |
12 |
/* #define debug fatal */ |
51 |
dpavlin |
4 |
|
52 |
dpavlin |
12 |
#define TICK_SHIFT 14 |
53 |
|
|
#define DEV_NS16550_LENGTH 8 |
54 |
dpavlin |
4 |
|
55 |
|
|
struct ns_data { |
56 |
dpavlin |
12 |
int addrmult; |
57 |
|
|
int in_use; |
58 |
dpavlin |
4 |
int irqnr; |
59 |
|
|
int console_handle; |
60 |
dpavlin |
12 |
int enable_fifo; |
61 |
dpavlin |
4 |
|
62 |
dpavlin |
12 |
unsigned char reg[DEV_NS16550_LENGTH]; |
63 |
|
|
unsigned char fcr; /* FIFO control register */ |
64 |
|
|
|
65 |
dpavlin |
4 |
int dlab; /* Divisor Latch Access bit */ |
66 |
|
|
int divisor; |
67 |
dpavlin |
12 |
|
68 |
dpavlin |
4 |
int databits; |
69 |
|
|
char parity; |
70 |
|
|
const char *stopbits; |
71 |
|
|
}; |
72 |
|
|
|
73 |
|
|
|
74 |
|
|
/* |
75 |
|
|
* dev_ns16550_tick(): |
76 |
dpavlin |
12 |
* |
77 |
|
|
* This function is called at regular intervals. An interrupt is caused to the |
78 |
|
|
* CPU if there is a character available for reading, or if the transmitter |
79 |
|
|
* slot is empty (i.e. the ns16550 is ready to transmit). |
80 |
dpavlin |
4 |
*/ |
81 |
|
|
void dev_ns16550_tick(struct cpu *cpu, void *extra) |
82 |
|
|
{ |
83 |
|
|
struct ns_data *d = extra; |
84 |
|
|
|
85 |
|
|
d->reg[com_iir] &= ~IIR_RXRDY; |
86 |
dpavlin |
12 |
if (d->in_use && console_charavail(d->console_handle)) |
87 |
|
|
d->reg[com_iir] |= IIR_RXRDY; |
88 |
dpavlin |
4 |
|
89 |
dpavlin |
12 |
/* |
90 |
|
|
* If interrupts are enabled, and interrupts are pending, then |
91 |
|
|
* cause a CPU interrupt. |
92 |
|
|
*/ |
93 |
|
|
if (((d->reg[com_ier] & IER_ETXRDY) && (d->reg[com_iir] & IIR_TXRDY)) || |
94 |
|
|
((d->reg[com_ier] & IER_ERXRDY) && (d->reg[com_iir] & IIR_RXRDY))) { |
95 |
dpavlin |
4 |
d->reg[com_iir] &= ~IIR_NOPEND; |
96 |
|
|
if (d->reg[com_mcr] & MCR_IENABLE) |
97 |
|
|
cpu_interrupt(cpu, d->irqnr); |
98 |
dpavlin |
12 |
} else { |
99 |
|
|
d->reg[com_iir] |= IIR_NOPEND; |
100 |
|
|
cpu_interrupt_ack(cpu, d->irqnr); |
101 |
dpavlin |
4 |
} |
102 |
|
|
} |
103 |
|
|
|
104 |
|
|
|
105 |
|
|
/* |
106 |
|
|
* dev_ns16550_access(): |
107 |
|
|
*/ |
108 |
|
|
int dev_ns16550_access(struct cpu *cpu, struct memory *mem, |
109 |
|
|
uint64_t relative_addr, unsigned char *data, size_t len, |
110 |
|
|
int writeflag, void *extra) |
111 |
|
|
{ |
112 |
|
|
uint64_t idata = 0, odata=0; |
113 |
|
|
int i; |
114 |
|
|
struct ns_data *d = extra; |
115 |
|
|
|
116 |
|
|
idata = memory_readmax64(cpu, data, len); |
117 |
|
|
|
118 |
dpavlin |
12 |
/* The NS16550 should be accessed using byte read/writes: */ |
119 |
|
|
if (len != 1) |
120 |
|
|
fatal("[ ns16550: len=%i, idata=0x%16llx! ]\n", |
121 |
|
|
len, (long long)idata); |
122 |
|
|
|
123 |
|
|
/* |
124 |
|
|
* Always ready to transmit: |
125 |
|
|
*/ |
126 |
dpavlin |
4 |
d->reg[com_lsr] |= LSR_TXRDY | LSR_TSRE; |
127 |
dpavlin |
12 |
d->reg[com_msr] |= MSR_DCD | MSR_DSR | MSR_CTS; |
128 |
|
|
|
129 |
|
|
d->reg[com_iir] &= ~0xf0; |
130 |
|
|
if (d->enable_fifo) |
131 |
|
|
d->reg[com_iir] |= ((d->fcr << 5) & 0xc0); |
132 |
|
|
|
133 |
dpavlin |
4 |
d->reg[com_lsr] &= ~LSR_RXRDY; |
134 |
dpavlin |
12 |
if (d->in_use && console_charavail(d->console_handle)) |
135 |
|
|
d->reg[com_lsr] |= LSR_RXRDY; |
136 |
dpavlin |
4 |
|
137 |
dpavlin |
12 |
relative_addr /= d->addrmult; |
138 |
dpavlin |
4 |
|
139 |
dpavlin |
12 |
if (relative_addr >= DEV_NS16550_LENGTH) { |
140 |
|
|
fatal("[ ns16550: outside register space? relative_addr=" |
141 |
|
|
"0x%llx. bad addrmult? bad device length? ]\n", |
142 |
|
|
(long long)relative_addr); |
143 |
|
|
return 0; |
144 |
dpavlin |
4 |
} |
145 |
|
|
|
146 |
dpavlin |
12 |
switch (relative_addr) { |
147 |
dpavlin |
4 |
|
148 |
dpavlin |
12 |
case com_data: /* data AND low byte of the divisor */ |
149 |
dpavlin |
4 |
/* Read/write of the Divisor value: */ |
150 |
|
|
if (d->dlab) { |
151 |
dpavlin |
12 |
/* Write or read the low byte of the divisor: */ |
152 |
|
|
if (writeflag == MEM_WRITE) |
153 |
|
|
d->divisor = (d->divisor & 0xff00) | idata; |
154 |
|
|
else |
155 |
dpavlin |
4 |
odata = d->divisor & 0xff; |
156 |
|
|
break; |
157 |
|
|
} |
158 |
|
|
|
159 |
dpavlin |
12 |
/* Read/write of data: */ |
160 |
dpavlin |
4 |
if (writeflag == MEM_WRITE) { |
161 |
dpavlin |
12 |
if (d->reg[com_mcr] & MCR_LOOPBACK) |
162 |
dpavlin |
4 |
console_makeavail(d->console_handle, idata); |
163 |
dpavlin |
12 |
else |
164 |
dpavlin |
4 |
console_putchar(d->console_handle, idata); |
165 |
|
|
d->reg[com_iir] |= IIR_TXRDY; |
166 |
|
|
} else { |
167 |
|
|
if (d->in_use) |
168 |
|
|
odata = console_readchar(d->console_handle); |
169 |
|
|
else |
170 |
|
|
odata = 0; |
171 |
|
|
} |
172 |
dpavlin |
12 |
dev_ns16550_tick(cpu, d); |
173 |
dpavlin |
4 |
break; |
174 |
dpavlin |
12 |
|
175 |
dpavlin |
4 |
case com_ier: /* interrupt enable AND high byte of the divisor */ |
176 |
|
|
/* Read/write of the Divisor value: */ |
177 |
|
|
if (d->dlab) { |
178 |
|
|
if (writeflag == MEM_WRITE) { |
179 |
|
|
/* Set the high byte of the divisor: */ |
180 |
dpavlin |
12 |
d->divisor = (d->divisor & 0xff) | (idata << 8); |
181 |
|
|
debug("[ ns16550: speed set to %i bps ]\n", |
182 |
|
|
(int)(115200 / d->divisor)); |
183 |
|
|
} else |
184 |
|
|
odata = d->divisor >> 8; |
185 |
dpavlin |
4 |
break; |
186 |
|
|
} |
187 |
|
|
|
188 |
|
|
/* IER: */ |
189 |
|
|
if (writeflag == MEM_WRITE) { |
190 |
|
|
/* This is to supress Linux' behaviour */ |
191 |
|
|
if (idata != 0) |
192 |
dpavlin |
12 |
debug("[ ns16550: write to ier: 0x%02x ]\n", |
193 |
|
|
(int)idata); |
194 |
dpavlin |
4 |
|
195 |
dpavlin |
12 |
/* Needed for NetBSD 2.0.x, but not 1.6.2? */ |
196 |
|
|
if (!(d->reg[com_ier] & IER_ETXRDY) |
197 |
dpavlin |
4 |
&& (idata & IER_ETXRDY)) |
198 |
|
|
d->reg[com_iir] |= IIR_TXRDY; |
199 |
|
|
|
200 |
dpavlin |
12 |
d->reg[com_ier] = idata; |
201 |
dpavlin |
4 |
dev_ns16550_tick(cpu, d); |
202 |
dpavlin |
12 |
} else |
203 |
|
|
odata = d->reg[com_ier]; |
204 |
dpavlin |
4 |
break; |
205 |
dpavlin |
12 |
|
206 |
dpavlin |
4 |
case com_iir: /* interrupt identification (r), fifo control (w) */ |
207 |
|
|
if (writeflag == MEM_WRITE) { |
208 |
dpavlin |
12 |
debug("[ ns16550: write to fifo control: 0x%02x ]\n", |
209 |
|
|
(int)idata); |
210 |
|
|
d->fcr = idata; |
211 |
dpavlin |
4 |
} else { |
212 |
dpavlin |
12 |
odata = d->reg[com_iir]; |
213 |
|
|
debug("[ ns16550: read from iir: 0x%02x ]\n", |
214 |
|
|
(int)odata); |
215 |
dpavlin |
4 |
dev_ns16550_tick(cpu, d); |
216 |
|
|
} |
217 |
|
|
break; |
218 |
dpavlin |
12 |
|
219 |
dpavlin |
4 |
case com_lsr: |
220 |
|
|
if (writeflag == MEM_WRITE) { |
221 |
dpavlin |
12 |
debug("[ ns16550: write to lsr: 0x%02x ]\n", |
222 |
|
|
(int)idata); |
223 |
|
|
d->reg[com_lsr] = idata; |
224 |
dpavlin |
4 |
} else { |
225 |
dpavlin |
12 |
odata = d->reg[com_lsr]; |
226 |
|
|
/* debug("[ ns16550: read from lsr: 0x%02x ]\n", |
227 |
|
|
(int)odata); */ |
228 |
dpavlin |
4 |
} |
229 |
|
|
break; |
230 |
dpavlin |
12 |
|
231 |
dpavlin |
4 |
case com_msr: |
232 |
|
|
if (writeflag == MEM_WRITE) { |
233 |
dpavlin |
12 |
debug("[ ns16550: write to msr: 0x%02x ]\n", |
234 |
|
|
(int)idata); |
235 |
|
|
d->reg[com_msr] = idata; |
236 |
dpavlin |
4 |
} else { |
237 |
dpavlin |
12 |
odata = d->reg[com_msr]; |
238 |
|
|
debug("[ ns16550: read from msr: 0x%02x ]\n", |
239 |
|
|
(int)odata); |
240 |
dpavlin |
4 |
} |
241 |
|
|
break; |
242 |
dpavlin |
12 |
|
243 |
dpavlin |
4 |
case com_lctl: |
244 |
|
|
if (writeflag == MEM_WRITE) { |
245 |
dpavlin |
12 |
d->reg[com_lctl] = idata; |
246 |
dpavlin |
4 |
switch (idata & 0x7) { |
247 |
|
|
case 0: d->databits = 5; d->stopbits = "1"; break; |
248 |
|
|
case 1: d->databits = 6; d->stopbits = "1"; break; |
249 |
|
|
case 2: d->databits = 7; d->stopbits = "1"; break; |
250 |
|
|
case 3: d->databits = 8; d->stopbits = "1"; break; |
251 |
|
|
case 4: d->databits = 5; d->stopbits = "1.5"; break; |
252 |
|
|
case 5: d->databits = 6; d->stopbits = "2"; break; |
253 |
|
|
case 6: d->databits = 7; d->stopbits = "2"; break; |
254 |
|
|
case 7: d->databits = 8; d->stopbits = "2"; break; |
255 |
|
|
} |
256 |
|
|
switch ((idata & 0x38) / 0x8) { |
257 |
|
|
case 0: d->parity = 'N'; break; /* none */ |
258 |
|
|
case 1: d->parity = 'O'; break; /* odd */ |
259 |
|
|
case 2: d->parity = '?'; break; |
260 |
|
|
case 3: d->parity = 'E'; break; /* even */ |
261 |
|
|
case 4: d->parity = '?'; break; |
262 |
|
|
case 5: d->parity = 'Z'; break; /* zero */ |
263 |
|
|
case 6: d->parity = '?'; break; |
264 |
|
|
case 7: d->parity = 'o'; break; /* one */ |
265 |
|
|
} |
266 |
|
|
|
267 |
|
|
d->dlab = idata & 0x80? 1 : 0; |
268 |
|
|
|
269 |
dpavlin |
12 |
debug("[ ns16550: write to lctl: 0x%02x (%s%s" |
270 |
dpavlin |
4 |
"setting mode %i%c%s) ]\n", |
271 |
|
|
(int)idata, |
272 |
|
|
d->dlab? "Divisor Latch access, " : "", |
273 |
|
|
idata&0x40? "sending BREAK, " : "", |
274 |
|
|
d->databits, d->parity, d->stopbits); |
275 |
|
|
} else { |
276 |
dpavlin |
12 |
odata = d->reg[com_lctl]; |
277 |
|
|
debug("[ ns16550: read from lctl: 0x%02x ]\n", |
278 |
|
|
(int)odata); |
279 |
dpavlin |
4 |
} |
280 |
|
|
break; |
281 |
dpavlin |
12 |
|
282 |
dpavlin |
4 |
case com_mcr: |
283 |
|
|
if (writeflag == MEM_WRITE) { |
284 |
dpavlin |
12 |
d->reg[com_mcr] = idata; |
285 |
|
|
debug("[ ns16550: write to mcr: 0x%02x ]\n", |
286 |
|
|
(int)idata); |
287 |
dpavlin |
4 |
} else { |
288 |
dpavlin |
12 |
odata = d->reg[com_mcr]; |
289 |
|
|
debug("[ ns16550: read from mcr: 0x%02x ]\n", |
290 |
|
|
(int)odata); |
291 |
dpavlin |
4 |
} |
292 |
|
|
break; |
293 |
dpavlin |
12 |
|
294 |
dpavlin |
4 |
default: |
295 |
|
|
if (writeflag==MEM_READ) { |
296 |
dpavlin |
12 |
debug("[ ns16550: read from reg %i ]\n", |
297 |
dpavlin |
4 |
(int)relative_addr); |
298 |
|
|
odata = d->reg[relative_addr]; |
299 |
|
|
} else { |
300 |
dpavlin |
12 |
debug("[ ns16550: write to reg %i:", |
301 |
dpavlin |
4 |
(int)relative_addr); |
302 |
|
|
for (i=0; i<len; i++) |
303 |
|
|
debug(" %02x", data[i]); |
304 |
|
|
debug(" ]\n"); |
305 |
|
|
d->reg[relative_addr] = idata; |
306 |
|
|
} |
307 |
|
|
} |
308 |
|
|
|
309 |
|
|
if (writeflag == MEM_READ) |
310 |
|
|
memory_writemax64(cpu, data, len, odata); |
311 |
|
|
|
312 |
|
|
return 1; |
313 |
|
|
} |
314 |
|
|
|
315 |
|
|
|
316 |
|
|
/* |
317 |
dpavlin |
12 |
* devinit_ns16550(): |
318 |
dpavlin |
4 |
*/ |
319 |
dpavlin |
12 |
int devinit_ns16550(struct devinit *devinit) |
320 |
dpavlin |
4 |
{ |
321 |
dpavlin |
12 |
struct ns_data *d = malloc(sizeof(struct ns_data)); |
322 |
dpavlin |
10 |
size_t nlen; |
323 |
dpavlin |
12 |
char *name; |
324 |
dpavlin |
4 |
|
325 |
|
|
if (d == NULL) { |
326 |
|
|
fprintf(stderr, "out of memory\n"); |
327 |
|
|
exit(1); |
328 |
|
|
} |
329 |
|
|
memset(d, 0, sizeof(struct ns_data)); |
330 |
dpavlin |
12 |
d->irqnr = devinit->irq_nr; |
331 |
|
|
d->addrmult = devinit->addr_mult; |
332 |
|
|
d->in_use = devinit->in_use; |
333 |
|
|
d->enable_fifo = 1; |
334 |
|
|
d->dlab = 0; |
335 |
|
|
d->divisor = 115200 / 9600; |
336 |
|
|
d->databits = 8; |
337 |
|
|
d->parity = 'N'; |
338 |
|
|
d->stopbits = "1"; |
339 |
|
|
d->console_handle = |
340 |
|
|
console_start_slave(devinit->machine, devinit->name); |
341 |
dpavlin |
4 |
|
342 |
dpavlin |
12 |
nlen = strlen(devinit->name) + 10; |
343 |
|
|
if (devinit->name2 != NULL) |
344 |
|
|
nlen += strlen(devinit->name2); |
345 |
|
|
name = malloc(nlen); |
346 |
|
|
if (name == NULL) { |
347 |
|
|
fprintf(stderr, "out of memory\n"); |
348 |
dpavlin |
4 |
exit(1); |
349 |
|
|
} |
350 |
dpavlin |
12 |
if (devinit->name2 != NULL && devinit->name2[0]) |
351 |
|
|
snprintf(name, nlen, "%s [%s]", devinit->name, devinit->name2); |
352 |
dpavlin |
4 |
else |
353 |
dpavlin |
12 |
snprintf(name, nlen, "%s", devinit->name); |
354 |
dpavlin |
4 |
|
355 |
dpavlin |
12 |
memory_device_register(devinit->machine->memory, name, devinit->addr, |
356 |
|
|
DEV_NS16550_LENGTH * d->addrmult, dev_ns16550_access, d, |
357 |
dpavlin |
4 |
MEM_DEFAULT, NULL); |
358 |
dpavlin |
12 |
machine_add_tickfunction(devinit->machine, |
359 |
|
|
dev_ns16550_tick, d, TICK_SHIFT); |
360 |
dpavlin |
4 |
|
361 |
dpavlin |
12 |
/* |
362 |
|
|
* NOTE: Ugly cast into a pointer, because this is a convenient way |
363 |
|
|
* to return the console handle to code in src/machine.c. |
364 |
|
|
*/ |
365 |
|
|
devinit->return_ptr = (void *)(size_t)d->console_handle; |
366 |
|
|
|
367 |
|
|
return 1; |
368 |
dpavlin |
4 |
} |
369 |
|
|
|