--- trunk/src/devices/dev_cpc700.c	2007/10/10 21:07:01	46
+++ trunk/src/devices/dev_mpc40x.c	2007/10/10 23:31:09	49
@@ -25,9 +25,9 @@
  *  SUCH DAMAGE.
  *   
  *
- *  $Id: dev_cpc700.c,v 1.12 2007/06/15 18:13:04 debug Exp $
+ *  $Id: dev_mpc40x.c,v 1.12 2007/06/15 18:13:04 debug Exp $
  *
- *  COMMENT: IBM CPC700 bridge (PCI and interrupt controller)
+ *  COMMENT: IBM MPC40X bridge (PCI and interrupt controller)
  */
 
 #include <stdio.h>
@@ -42,10 +42,10 @@
 #include "memory.h"
 #include "misc.h"
 
-#include "cpc700reg.h"
+#include "mpc40xreg.h"
 
 
-struct cpc700_data {
+struct mpc40x_data {
 	struct interrupt ppc_irq;	/*  Connected to the CPU  */
 
 	uint32_t	sr;		/*  Interrupt Status register  */
@@ -55,16 +55,16 @@
 };
 
 
-void cpc700_interrupt_assert(struct interrupt *interrupt)
+void mpc40x_interrupt_assert(struct interrupt *interrupt)
 {
-	struct cpc700_data *d = interrupt->extra;
+	struct mpc40x_data *d = interrupt->extra;
 	d->sr |= interrupt->line;
 	if (d->sr & d->er)
 		INTERRUPT_ASSERT(d->ppc_irq);
 }
-void cpc700_interrupt_deassert(struct interrupt *interrupt)
+void mpc40x_interrupt_deassert(struct interrupt *interrupt)
 {
-	struct cpc700_data *d = interrupt->extra;
+	struct mpc40x_data *d = interrupt->extra;
 	d->sr &= ~interrupt->line;
 	if (!(d->sr & d->er))
 		INTERRUPT_DEASSERT(d->ppc_irq);
@@ -72,15 +72,15 @@
 
 
 /*
- *  dev_cpc700_pci_access():
+ *  dev_mpc40x_pci_access():
  *
  *  Passes PCI indirect addr and data accesses onto bus_pci.
  */
-DEVICE_ACCESS(cpc700_pci)
+DEVICE_ACCESS(mpc40x_pci)
 {
 	uint64_t idata = 0, odata = 0;
 	int bus, dev, func, reg;
-	struct cpc700_data *d = extra;
+	struct mpc40x_data *d = extra;
 
 	if (writeflag == MEM_WRITE)
 		idata = memory_readmax64(cpu, data, len|MEM_PCI_LITTLE_ENDIAN);
@@ -105,13 +105,13 @@
 
 
 /*
- *  dev_cpc700_int_access():
+ *  dev_mpc40x_int_access():
  *
  *  The interrupt controller.
  */
-DEVICE_ACCESS(cpc700_int)
+DEVICE_ACCESS(mpc40x_int)
 {
-	struct cpc700_data *d = extra;
+	struct mpc40x_data *d = extra;
 	uint64_t idata = 0, odata = 0;
 
 	if (writeflag == MEM_WRITE)
@@ -119,7 +119,7 @@
 
 	switch (relative_addr) {
 
-	case CPC_UIC_SR:
+	case MPC_UIC_SR:
 		/*  Status register (cleared by writing ones):  */
 		if (writeflag == MEM_READ) {
 			odata = d->sr;
@@ -130,10 +130,10 @@
 		}
 		break;
 
-	case CPC_UIC_SRS:
+	case MPC_UIC_SRS:
 		/*  Status register set:  */
 		if (writeflag == MEM_READ) {
-			fatal("[ cpc700_int: read from CPC_UIC_SRS? ]\n");
+			fatal("[ mpc40x_int: read from MPC_UIC_SRS? ]\n");
 			odata = d->sr;
 		} else {
 			d->sr = idata;
@@ -144,7 +144,7 @@
 		}
 		break;
 
-	case CPC_UIC_ER:
+	case MPC_UIC_ER:
 		/*  Enable register:  */
 		if (writeflag == MEM_READ) {
 			odata = d->er;
@@ -157,21 +157,21 @@
 		}
 		break;
 
-	case CPC_UIC_MSR:
+	case MPC_UIC_MSR:
 		/*  Masked status:  */
 		if (writeflag == MEM_READ) {
 			odata = d->sr & d->er;
 		} else {
-			fatal("[ cpc700_int: write to CPC_UIC_MSR? ]\n");
+			fatal("[ mpc40x_int: write to MPC_UIC_MSR? ]\n");
 		}
 		break;
 
 	default:if (writeflag == MEM_WRITE) {
-			fatal("[ cpc700_int: unimplemented write to "
+			fatal("[ mpc40x_int: unimplemented write to "
 			    "offset 0x%x: data=0x%x ]\n", (int)
 			    relative_addr, (int)idata);
 		} else {
-			fatal("[ cpc700_int: unimplemented read from "
+			fatal("[ mpc40x_int: unimplemented read from "
 			    "offset 0x%x ]\n", (int)relative_addr);
 		}
 	}
@@ -183,78 +183,82 @@
 }
 
 
-DEVINIT(cpc700)
+DEVINIT(mpc40x)
 {
-	struct cpc700_data *d;
+	struct mpc40x_data *d;
 	char tmp[300];
 	int i;
 
-	CHECK_ALLOCATION(d = malloc(sizeof(struct cpc700_data)));
-	memset(d, 0, sizeof(struct cpc700_data));
+	CHECK_ALLOCATION(d = malloc(sizeof(struct mpc40x_data)));
+	memset(d, 0, sizeof(struct mpc40x_data));
 
 	/*  Connect to the CPU's interrupt pin:  */
 	INTERRUPT_CONNECT(devinit->interrupt_path, d->ppc_irq);
 
-	/*  Register 32 CPC700 interrupts:  */
+	/*  Register 32 MPC40X interrupts:  */
 	for (i=0; i<32; i++) {
 		struct interrupt template;
 		char n[300];
-		snprintf(n, sizeof(n), "%s.cpc700.%i",
+		snprintf(n, sizeof(n), "%s.mpc40x.%i",
 		    devinit->interrupt_path, i);
 		memset(&template, 0, sizeof(template));
 		template.line = 1 << i;
 		template.name = n;
 		template.extra = d;
-		template.interrupt_assert = cpc700_interrupt_assert;
-		template.interrupt_deassert = cpc700_interrupt_deassert;
+		template.interrupt_assert = mpc40x_interrupt_assert;
+		template.interrupt_deassert = mpc40x_interrupt_deassert;
 		interrupt_handler_register(&template);
 	}
 
 	/*  Register a PCI bus:  */
-	snprintf(tmp, sizeof(tmp), "%s.cpc700", devinit->interrupt_path);
+	snprintf(tmp, sizeof(tmp), "%s.mpc40x", devinit->interrupt_path);
 	d->pci_data = bus_pci_init(
 	    devinit->machine,
 	    tmp,		/*  pciirq path  */
 	    0,			/*  pci device io offset  */
 	    0,			/*  pci device mem offset  */
-	    CPC_PCI_IO_BASE,	/*  PCI portbase  */
-	    CPC_PCI_MEM_BASE,	/*  PCI membase: TODO  */
+	    MPC_PCI_IO_BASE,	/*  PCI portbase  */
+	    MPC_PCI_MEM_BASE,	/*  PCI membase: TODO  */
 	    tmp,		/*  PCI irqbase  */
 	    0,			/*  ISA portbase: TODO  */
 	    0,			/*  ISA membase: TODO  */
 	    tmp);		/*  ISA irqbase  */
 
+#if 0
 	switch (devinit->machine->machine_type) {
 
-	case MACHINE_PMPPC:
+	case MACHINE_SANDPOINT:
 		bus_pci_add(devinit->machine, d->pci_data,
-		    devinit->machine->memory, 0, 0, 0, "heuricon_pmppc");
+		    devinit->machine->memory, 0, 0, 0, "sandpoint_pci");
 		break;
 
-	default:fatal("!\n! WARNING: cpc700 for non-implemented machine"
+	default:fatal("!\n! WARNING: mpc40x for non-implemented machine"
 		    " type\n!\n");
 		exit(1);
 	}
+#endif
 
 	/*  PCI configuration registers:  */
-	memory_device_register(devinit->machine->memory, "cpc700_pci",
-	    CPC_PCICFGADR, 8, dev_cpc700_pci_access, d, DM_DEFAULT, NULL);
+	memory_device_register(devinit->machine->memory, "mpc40x_pci",
+	    MPC_PCICFGADR, 8, dev_mpc40x_pci_access, d, DM_DEFAULT, NULL);
 
 	/*  Interrupt controller:  */
-	memory_device_register(devinit->machine->memory, "cpc700_int",
-	    CPC_UIC_BASE, CPC_UIC_SIZE, dev_cpc700_int_access, d,
+	memory_device_register(devinit->machine->memory, "mpc40x_int",
+	    MPC_UIC_BASE, MPC_UIC_SIZE, dev_mpc40x_int_access, d,
 	    DM_DEFAULT, NULL);
 
 	/*  Two serial ports:  */
-	snprintf(tmp, sizeof(tmp), "ns16550 irq=%s.cpc700.%i addr=0x%llx "
-	    "name2=tty0", devinit->interrupt_path, 31 - CPC_IB_UART_0,
-	    (long long)CPC_COM0);
+	snprintf(tmp, sizeof(tmp), "ns16550 irq=%s.mpc40x.%i addr=0x%llx "
+	    "name2=tty0", devinit->interrupt_path, 31 - MPC_IB_UART_0,
+	    (long long)MPC_COM0);
 	devinit->machine->main_console_handle = (size_t)
 	    device_add(devinit->machine, tmp);
-	snprintf(tmp, sizeof(tmp), "ns16550 irq=%s.cpc700.%i addr=0x%llx "
-	    "name2=tty1", devinit->interrupt_path, 31 - CPC_IB_UART_1,
-	    (long long)CPC_COM1);
-//	device_add(devinit->machine, tmp);
+#if 0
+	snprintf(tmp, sizeof(tmp), "ns16550 irq=%s.mpc40x.%i addr=0x%llx "
+	    "name2=tty1", devinit->interrupt_path, 31 - MPC_IB_UART_1,
+	    (long long)MPC_COM1);
+	device_add(devinit->machine, tmp);
+#endif
 
 	devinit->return_ptr = d->pci_data;