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/* |
/* |
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* Copyright (C) 2004-2005 Anders Gavare. All rights reserved. |
* Copyright (C) 2004-2006 Anders Gavare. All rights reserved. |
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* |
* |
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* Redistribution and use in source and binary forms, with or without |
* Redistribution and use in source and binary forms, with or without |
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* modification, are permitted provided that the following conditions are met: |
* modification, are permitted provided that the following conditions are met: |
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* SUCH DAMAGE. |
* SUCH DAMAGE. |
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* |
* |
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* |
* |
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* $Id: dev_au1x00.c,v 1.14 2005/11/13 00:14:08 debug Exp $ |
* $Id: dev_au1x00.c,v 1.16 2006/01/01 13:17:16 debug Exp $ |
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* |
* |
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* Au1x00 (eg Au1500) pseudo device. See aureg.h for bitfield details. |
* Au1x00 (eg Au1500) pseudo device. See aureg.h for bitfield details. |
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* |
* |
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int console_handle; |
int console_handle; |
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int uart_nr; |
int uart_nr; |
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int irq_nr; |
int irq_nr; |
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int in_use; |
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uint32_t int_enable; |
uint32_t int_enable; |
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uint32_t modem_control; |
uint32_t modem_control; |
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}; |
}; |
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* |
* |
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* Interrupt Controller. |
* Interrupt Controller. |
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*/ |
*/ |
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int dev_au1x00_ic_access(struct cpu *cpu, struct memory *mem, |
DEVICE_ACCESS(au1x00_ic) |
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uint64_t relative_addr, unsigned char *data, size_t len, |
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int writeflag, void *extra) |
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{ |
{ |
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struct au1x00_ic_data *d = extra; |
struct au1x00_ic_data *d = extra; |
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uint64_t idata = 0, odata = 0; |
uint64_t idata = 0, odata = 0; |
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* |
* |
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* UART (Serial controllers). |
* UART (Serial controllers). |
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*/ |
*/ |
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int dev_au1x00_uart_access(struct cpu *cpu, struct memory *mem, |
DEVICE_ACCESS(au1x00_uart) |
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uint64_t relative_addr, unsigned char *data, size_t len, |
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int writeflag, void *extra) |
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{ |
{ |
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struct au1x00_uart_data *d = extra; |
struct au1x00_uart_data *d = extra; |
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uint64_t idata = 0, odata = 0; |
uint64_t idata = 0, odata = 0; |
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* |
* |
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* Programmable Counters. |
* Programmable Counters. |
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*/ |
*/ |
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int dev_au1x00_pc_access(struct cpu *cpu, struct memory *mem, |
DEVICE_ACCESS(au1x00_pc) |
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uint64_t relative_addr, unsigned char *data, size_t len, |
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int writeflag, void *extra) |
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{ |
{ |
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struct au1x00_pc_data *d = extra; |
struct au1x00_pc_data *d = extra; |
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uint64_t idata = 0, odata = 0; |
uint64_t idata = 0, odata = 0; |
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d2->uart_nr = 2; d2->irq_nr = 2; |
d2->uart_nr = 2; d2->irq_nr = 2; |
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d3->uart_nr = 3; d3->irq_nr = 3; |
d3->uart_nr = 3; d3->irq_nr = 3; |
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d0->console_handle = console_start_slave(machine, "AU1x00 port 0"); |
/* Only allow input on the first UART, by default: */ |
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d1->console_handle = console_start_slave(machine, "AU1x00 port 1"); |
d0->console_handle = console_start_slave(machine, "AU1x00 port 0", 1); |
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d2->console_handle = console_start_slave(machine, "AU1x00 port 2"); |
d1->console_handle = console_start_slave(machine, "AU1x00 port 1", 0); |
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d3->console_handle = console_start_slave(machine, "AU1x00 port 3"); |
d2->console_handle = console_start_slave(machine, "AU1x00 port 2", 0); |
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d3->console_handle = console_start_slave(machine, "AU1x00 port 3", 0); |
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d0->in_use = 1; |
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d1->in_use = 0; |
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d2->in_use = 0; |
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d3->in_use = 0; |
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d_pc->irq_nr = 14; |
d_pc->irq_nr = 14; |
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