/[gxemul]/trunk/src/devices/dev_asc.c
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revision 28 by dpavlin, Mon Oct 8 16:20:26 2007 UTC revision 34 by dpavlin, Mon Oct 8 16:21:17 2007 UTC
# Line 1  Line 1 
1  /*  /*
2   *  Copyright (C) 2003-2006  Anders Gavare.  All rights reserved.   *  Copyright (C) 2003-2007  Anders Gavare.  All rights reserved.
3   *   *
4   *  Redistribution and use in source and binary forms, with or without   *  Redistribution and use in source and binary forms, with or without
5   *  modification, are permitted provided that the following conditions are met:   *  modification, are permitted provided that the following conditions are met:
# Line 25  Line 25 
25   *  SUCH DAMAGE.   *  SUCH DAMAGE.
26   *   *
27   *   *
28   *  $Id: dev_asc.c,v 1.81 2006/07/21 16:55:41 debug Exp $   *  $Id: dev_asc.c,v 1.84 2006/12/31 21:35:26 debug Exp $
29   *   *
30   *  'asc' SCSI controller for some DECstation/DECsystem models and PICA-61.   *  'asc' SCSI controller for some DECstation/DECsystem models and PICA-61.
31   *   *
# Line 101  struct asc_data { Line 101  struct asc_data {
101          int             mode;          int             mode;
102    
103          void            *turbochannel;          void            *turbochannel;
104          int             irq_nr;          struct interrupt irq;
105          int             irq_caused_last_time;          int             irq_asserted;
106    
107          /*  Current state and transfer:  */          /*  Current state and transfer:  */
108          int             cur_state;          int             cur_state;
# Line 155  static int dev_asc_select(struct cpu *cp Line 155  static int dev_asc_select(struct cpu *cp
155  DEVICE_TICK(asc)  DEVICE_TICK(asc)
156  {  {
157          struct asc_data *d = extra;          struct asc_data *d = extra;
158            int new_assert = d->reg_ro[NCR_STAT] & NCRSTAT_INT;
159    
160          if (d->reg_ro[NCR_STAT] & NCRSTAT_INT)          if (new_assert && !d->irq_asserted)
161                  cpu_interrupt(cpu, d->irq_nr);                  INTERRUPT_ASSERT(d->irq);
162    
163            d->irq_asserted = new_assert;
164  }  }
165    
166    
# Line 1196  break; Line 1199  break;
1199                          d->reg_ro[NCR_STAT] = PHASE_COMMAND;                          d->reg_ro[NCR_STAT] = PHASE_COMMAND;
1200                  }                  }
1201    
1202                  cpu_interrupt_ack(cpu, d->irq_nr);                  INTERRUPT_DEASSERT(d->irq);
1203                    d->irq_asserted = 0;
1204          }          }
1205    
1206          if (regnr == NCR_CFG1) {          if (regnr == NCR_CFG1) {
# Line 1226  break; Line 1230  break;
1230   *  Register an 'asc' device.   *  Register an 'asc' device.
1231   */   */
1232  void dev_asc_init(struct machine *machine, struct memory *mem,  void dev_asc_init(struct machine *machine, struct memory *mem,
1233          uint64_t baseaddr, int irq_nr, void *turbochannel,          uint64_t baseaddr, char *irq_path, void *turbochannel, int mode,
         int mode,  
1234          size_t (*dma_controller)(void *dma_controller_data,          size_t (*dma_controller)(void *dma_controller_data,
1235                  unsigned char *data, size_t len, int writeflag),                  unsigned char *data, size_t len, int writeflag),
1236          void *dma_controller_data)          void *dma_controller_data)
# Line 1240  void dev_asc_init(struct machine *machin Line 1243  void dev_asc_init(struct machine *machin
1243                  exit(1);                  exit(1);
1244          }          }
1245          memset(d, 0, sizeof(struct asc_data));          memset(d, 0, sizeof(struct asc_data));
1246          d->irq_nr       = irq_nr;  
1247            INTERRUPT_CONNECT(irq_path, d->irq);
1248          d->turbochannel = turbochannel;          d->turbochannel = turbochannel;
1249          d->mode         = mode;          d->mode         = mode;
1250    
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