--- trunk/src/cpus/cpu_sh.c 2007/10/08 16:22:02 39 +++ trunk/src/cpus/cpu_sh.c 2007/10/08 16:22:11 40 @@ -25,7 +25,7 @@ * SUCH DAMAGE. * * - * $Id: cpu_sh.c,v 1.66 2007/04/13 07:06:31 debug Exp $ + * $Id: cpu_sh.c,v 1.72 2007/04/28 09:44:35 debug Exp $ * * Hitachi SuperH ("SH") CPU emulation. * @@ -186,7 +186,7 @@ /* SH4-specific memory mapped registers, TLBs, caches, etc: */ if (cpu->cd.sh.cpu_type.arch == 4) { - device_add(machine, "sh4"); + cpu->cd.sh.pcic_pcibus = device_add(machine, "sh4"); /* * Interrupt Controller initial values, according to the @@ -274,9 +274,9 @@ void sh_cpu_interrupt_assert(struct interrupt *interrupt) { struct cpu *cpu = interrupt->extra; - int irq_nr = interrupt->line; - int index = irq_nr / 0x20; - int prio; + unsigned int irq_nr = interrupt->line; + unsigned int index = irq_nr / 0x20; + unsigned int prio; /* Assert the interrupt, and check its priority level: */ cpu->cd.sh.int_prio_and_pending[index] |= SH_INT_ASSERTED; @@ -465,8 +465,12 @@ if (coprocs & 1) { /* Floating point: */ - debug("cpu%i: fpscr = 0x%08"PRIx32" fpul = 0x%08"PRIx32 - "\n", x, cpu->cd.sh.fpscr, cpu->cd.sh.fpul); + debug("cpu%i: fpscr = 0x%08"PRIx32" (%s,%s,%s) fpul = 0x%08" + PRIx32"\n", x, cpu->cd.sh.fpscr, + cpu->cd.sh.fpscr & SH_FPSCR_PR? "PR" : "!pr", + cpu->cd.sh.fpscr & SH_FPSCR_SZ? "SZ" : "!sz", + cpu->cd.sh.fpscr & SH_FPSCR_FR? "FR" : "!fr", + cpu->cd.sh.fpul); for (i=0; icd.sh.r[0] + cpu->cd.sh.r[r8]); + uint32_t addr = cpu->cd.sh.r[0] + + cpu->cd.sh.r[r8]; + debug("\t; r0+r%i = ", r8); + symbol = get_symbol_name( + &cpu->machine->symbol_context, + addr, &offset); + if (symbol != NULL) + debug("<%s>", symbol); + else + debug("0x%08"PRIx32, addr); } debug("\n"); } else if (lo4 == 0x7) @@ -782,8 +795,16 @@ else if (lo4 == 0xe) debug("mov.l\t@(r0,r%i),r%i", r4, r8); if (running) { - debug("\t; r0+r%i = 0x%08"PRIx32, r4, - cpu->cd.sh.r[0] + cpu->cd.sh.r[r4]); + uint32_t addr = cpu->cd.sh.r[0] + + cpu->cd.sh.r[r4]; + debug("\t; r0+r%i = ", r4); + symbol = get_symbol_name( + &cpu->machine->symbol_context, + addr, &offset); + if (symbol != NULL) + debug("<%s>", symbol); + else + debug("0x%08"PRIx32, addr); } debug("\n"); } else if (lo8 == 0x12) @@ -846,8 +867,14 @@ case 0x1: debug("mov.l\tr%i,@(%i,r%i)", r4, lo4 * 4, r8); if (running) { - debug("\t; r%i+%i = 0x%08"PRIx32, r8, lo4 * 4, - cpu->cd.sh.r[r8] + lo4 * 4); + uint32_t addr = cpu->cd.sh.r[r8] + lo4 * 4; + debug("\t; r%i+%i = ", r8, lo4 * 4); + symbol = get_symbol_name(&cpu->machine->symbol_context, + addr, &offset); + if (symbol != NULL) + debug("<%s>", symbol); + else + debug("0x%08"PRIx32, addr); } debug("\n"); break; @@ -994,9 +1021,17 @@ debug("shlr16\tr%i\n", r8); else if (lo8 == 0x2a) debug("lds\tr%i,pr\n", r8); - else if (lo8 == 0x2b) - debug("jmp\t@r%i\n", r8); - else if (lo8 == 0x2e) + else if (lo8 == 0x2b) { + debug("jmp\t@r%i", r8); + if (running) { + symbol = get_symbol_name( + &cpu->machine->symbol_context, + cpu->cd.sh.r[r8], &offset); + if (symbol != NULL) + debug("\t\t; <%s>", symbol); + } + debug("\n"); + } else if (lo8 == 0x2e) debug("ldc\tr%i,vbr\n", r8); else if (lo8 == 0x33) debug("stc.l\tssr,@-r%i\n", r8); @@ -1106,9 +1141,14 @@ } else if (r8 == 0x9 || r8 == 0xb || r8 == 0xd || r8 == 0xf) { addr = (int8_t)lo8; addr = dumpaddr + 4 + (addr << 1); - debug("b%s%s\t0x%x\n", + debug("b%s%s\t0x%x", (r8 == 0x9 || r8 == 0xd)? "t" : "f", (r8 == 0x9 || r8 == 0xb)? "" : "/s", (int)addr); + symbol = get_symbol_name(&cpu->machine->symbol_context, + addr, &offset); + if (symbol != NULL) + debug("\t; <%s>", symbol); + debug("\n"); } else debug("UNIMPLEMENTED hi4=0x%x,0x%x\n", hi4, r8); break; @@ -1116,14 +1156,25 @@ case 0xd: addr = lo8 * (hi4==9? 2 : 4); addr += (dumpaddr & ~(hi4==9? 1 : 3)) + 4; - debug("mov.%s\t0x%x,r%i\n", hi4==9? "w":"l", (int)addr, r8); + debug("mov.%s\t0x%x,r%i", hi4==9? "w":"l", (int)addr, r8); + symbol = get_symbol_name(&cpu->machine->symbol_context, + addr, &offset); + if (symbol != NULL) + debug("\t; <%s>", symbol); + debug("\n"); break; case 0xa: case 0xb: addr = (int32_t)(int16_t)((iword & 0xfff) << 4); addr = ((int32_t)addr >> 3); addr += dumpaddr + 4; - debug("%s\t0x%x\n", hi4==0xa? "bra":"bsr", (int)addr); + debug("%s\t0x%x", hi4==0xa? "bra":"bsr", (int)addr); + + symbol = get_symbol_name(&cpu->machine->symbol_context, + addr, &offset); + if (symbol != NULL) + debug("\t; <%s>", symbol); + debug("\n"); break; case 0xc: if (r8 == 0x0) @@ -1263,6 +1314,10 @@ debug("fldi0\tfr%i\n", r8); else if (lo8 == 0x9d) debug("fldi1\tfr%i\n", r8); + else if (lo8 == 0xad) + debug("fcnvsd\tfpul,dr%i\n", r8); + else if (lo8 == 0xbd) + debug("fcnvds\tdr%i,fpul\n", r8); else if ((iword & 0x01ff) == 0x00fd) debug("fsca\tfpul,dr%i\n", r8); else if (iword == 0xf3fd)