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/* |
/* |
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* Copyright (C) 2005-2006 Anders Gavare. All rights reserved. |
* Copyright (C) 2005-2007 Anders Gavare. All rights reserved. |
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* |
* |
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* Redistribution and use in source and binary forms, with or without |
* Redistribution and use in source and binary forms, with or without |
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* modification, are permitted provided that the following conditions are met: |
* modification, are permitted provided that the following conditions are met: |
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* SUCH DAMAGE. |
* SUCH DAMAGE. |
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* |
* |
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* |
* |
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* $Id: cpu_ppc.c,v 1.64 2006/09/21 11:53:26 debug Exp $ |
* $Id: cpu_ppc.c,v 1.68 2007/03/26 02:01:36 debug Exp $ |
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* |
* |
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* PowerPC/POWER CPU emulation. |
* PowerPC/POWER CPU emulation. |
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*/ |
*/ |
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#include "cpu.h" |
#include "cpu.h" |
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#include "devices.h" |
#include "devices.h" |
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#include "interrupt.h" |
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#include "machine.h" |
#include "machine.h" |
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#include "memory.h" |
#include "memory.h" |
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#include "misc.h" |
#include "misc.h" |
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void ppc_pc_to_pointers(struct cpu *); |
void ppc_pc_to_pointers(struct cpu *); |
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void ppc32_pc_to_pointers(struct cpu *); |
void ppc32_pc_to_pointers(struct cpu *); |
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void ppc_irq_interrupt_assert(struct interrupt *interrupt); |
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void ppc_irq_interrupt_deassert(struct interrupt *interrupt); |
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/* |
/* |
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* ppc_cpu_new(): |
* ppc_cpu_new(): |
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CPU_SETTINGS_ADD_REGISTER32(tmpstr, cpu->cd.ppc.sr[i]); |
CPU_SETTINGS_ADD_REGISTER32(tmpstr, cpu->cd.ppc.sr[i]); |
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} |
} |
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/* Register the CPU as an interrupt handler: */ |
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{ |
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struct interrupt template; |
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char name[150]; |
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snprintf(name, sizeof(name), "%s", cpu->path); |
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memset(&template, 0, sizeof(template)); |
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template.line = 0; |
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template.name = name; |
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template.extra = cpu; |
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template.interrupt_assert = ppc_irq_interrupt_assert; |
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template.interrupt_deassert = ppc_irq_interrupt_deassert; |
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interrupt_handler_register(&template); |
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} |
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return 1; |
return 1; |
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} |
} |
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} |
} |
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static void add_response_word(struct cpu *cpu, char *r, uint64_t value, |
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size_t maxlen, int len) |
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{ |
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char *format = (len == 4)? "%08"PRIx64 : "%016"PRIx64; |
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if (len == 4) |
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value &= 0xffffffffULL; |
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if (cpu->byte_order == EMUL_LITTLE_ENDIAN) { |
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if (len == 4) { |
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value = ((value & 0xff) << 24) + |
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((value & 0xff00) << 8) + |
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((value & 0xff0000) >> 8) + |
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((value & 0xff000000) >> 24); |
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} else { |
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value = ((value & 0xff) << 56) + |
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((value & 0xff00) << 40) + |
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((value & 0xff0000) << 24) + |
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((value & 0xff000000ULL) << 8) + |
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((value & 0xff00000000ULL) >> 8) + |
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((value & 0xff0000000000ULL) >> 24) + |
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((value & 0xff000000000000ULL) >> 40) + |
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((value & 0xff00000000000000ULL) >> 56); |
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} |
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} |
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snprintf(r + strlen(r), maxlen - strlen(r), format, (uint64_t)value); |
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} |
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/* |
/* |
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* ppc_cpu_gdb_stub(): |
* ppc_irq_interrupt_assert(): |
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* Execute a "remote GDB" command. Returns a newly allocated response string |
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* on success, NULL on failure. |
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*/ |
*/ |
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char *ppc_cpu_gdb_stub(struct cpu *cpu, char *cmd) |
void ppc_irq_interrupt_assert(struct interrupt *interrupt) |
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{ |
{ |
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if (strcmp(cmd, "g") == 0) { |
struct cpu *cpu = (struct cpu *) interrupt->extra; |
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int i; |
cpu->cd.ppc.irq_asserted = 1; |
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char *r; |
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size_t wlen = cpu->is_32bit? |
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sizeof(uint32_t) : sizeof(uint64_t); |
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size_t len = 1 + 76 * wlen; |
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r = malloc(len); |
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if (r == NULL) { |
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fprintf(stderr, "out of memory\n"); |
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exit(1); |
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} |
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r[0] = '\0'; |
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for (i=0; i<128; i++) |
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add_response_word(cpu, r, i, len, wlen); |
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return r; |
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} |
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if (cmd[0] == 'p') { |
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int regnr = strtol(cmd + 1, NULL, 16); |
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size_t wlen = cpu->is_32bit? |
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sizeof(uint32_t) : sizeof(uint64_t); |
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size_t len = 2 * wlen + 1; |
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char *r = malloc(len); |
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r[0] = '\0'; |
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if (regnr >= 0 && regnr <= 31) { |
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add_response_word(cpu, r, |
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cpu->cd.ppc.gpr[regnr], len, wlen); |
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} else if (regnr == 0x40) { |
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add_response_word(cpu, r, cpu->pc, len, wlen); |
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} else if (regnr == 0x42) { |
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add_response_word(cpu, r, cpu->cd.ppc.cr, len, wlen); |
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} else if (regnr == 0x43) { |
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add_response_word(cpu, r, cpu->cd.ppc.spr[SPR_LR], |
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len, wlen); |
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} else if (regnr == 0x44) { |
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add_response_word(cpu, r, cpu->cd.ppc.spr[SPR_CTR], |
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len, wlen); |
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} else if (regnr == 0x45) { |
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add_response_word(cpu, r, cpu->cd.ppc.spr[SPR_XER], |
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len, wlen); |
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} else { |
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/* Unimplemented: */ |
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add_response_word(cpu, r, 0xcc000 + regnr, len, wlen); |
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} |
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return r; |
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} |
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fatal("ppc_cpu_gdb_stub(): TODO\n"); |
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return NULL; |
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} |
} |
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/* |
/* |
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* ppc_cpu_interrupt(): |
* ppc_irq_interrupt_deassert(): |
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* |
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* 0..31 are used as BeBox interrupt numbers, 32..47 = ISA, |
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* 64 is used as a "re-assert" signal to cpu->machine->md_interrupt(). |
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* |
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* TODO: don't hardcode to BeBox! |
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*/ |
*/ |
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int ppc_cpu_interrupt(struct cpu *cpu, uint64_t irq_nr) |
void ppc_irq_interrupt_deassert(struct interrupt *interrupt) |
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{ |
{ |
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/* fatal("ppc_cpu_interrupt(): 0x%x\n", (int)irq_nr); */ |
struct cpu *cpu = (struct cpu *) interrupt->extra; |
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if (irq_nr <= 64) { |
cpu->cd.ppc.irq_asserted = 0; |
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if (cpu->machine->md_interrupt != NULL) |
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cpu->machine->md_interrupt( |
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cpu->machine, cpu, irq_nr, 1); |
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else |
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fatal("ppc_cpu_interrupt(): md_interrupt == NULL\n"); |
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} else { |
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/* Assert PPC IRQ: */ |
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cpu->cd.ppc.irq_asserted = 1; |
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} |
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return 1; |
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} |
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/* |
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* ppc_cpu_interrupt_ack(): |
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*/ |
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int ppc_cpu_interrupt_ack(struct cpu *cpu, uint64_t irq_nr) |
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{ |
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if (irq_nr <= 64) { |
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if (cpu->machine->md_interrupt != NULL) |
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cpu->machine->md_interrupt(cpu->machine, |
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cpu, irq_nr, 0); |
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} else { |
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/* De-assert PPC IRQ: */ |
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cpu->cd.ppc.irq_asserted = 0; |
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} |
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return 1; |
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} |
} |
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