25 |
* SUCH DAMAGE. |
* SUCH DAMAGE. |
26 |
* |
* |
27 |
* |
* |
28 |
* $Id: cpu_mips.c,v 1.61 2006/07/16 13:32:26 debug Exp $ |
* $Id: cpu_mips.c,v 1.63 2006/08/12 11:43:13 debug Exp $ |
29 |
* |
* |
30 |
* MIPS core CPU emulation. |
* MIPS core CPU emulation. |
31 |
*/ |
*/ |
35 |
#include <string.h> |
#include <string.h> |
36 |
#include <sys/types.h> |
#include <sys/types.h> |
37 |
#include <ctype.h> |
#include <ctype.h> |
38 |
|
#include <unistd.h> |
39 |
|
|
40 |
#include "../../config.h" |
#include "../../config.h" |
41 |
|
|
1879 |
uint64_t *reg = &cpu->cd.mips.coproc[0]->reg[0]; |
uint64_t *reg = &cpu->cd.mips.coproc[0]->reg[0]; |
1880 |
int exc_model = cpu->cd.mips.cpu_type.exc_model; |
int exc_model = cpu->cd.mips.cpu_type.exc_model; |
1881 |
|
|
1882 |
|
if (cpu->is_halted) { |
1883 |
|
/* |
1884 |
|
* If the exception occurred on a 'wait' instruction, then let |
1885 |
|
* the instruction following the wait instruction be the one |
1886 |
|
* we continue at when the interrupt service routine returns. |
1887 |
|
*/ |
1888 |
|
cpu->is_halted = 0; |
1889 |
|
cpu->pc += sizeof(uint32_t); |
1890 |
|
} |
1891 |
|
|
1892 |
if (!quiet_mode) { |
if (!quiet_mode) { |
1893 |
uint64_t offset; |
uint64_t offset; |
1894 |
int x; |
int x; |