src/cpus/cpu_m68k.c

/*
 *  Copyright (C) 2005-2007  Anders Gavare.  All rights reserved.
 *
 *  Redistribution and use in source and binary forms, with or without
 *  modification, are permitted provided that the following conditions are met:
 *
 *  1. Redistributions of source code must retain the above copyright
 *     notice, this list of conditions and the following disclaimer.
 *  2. Redistributions in binary form must reproduce the above copyright  
 *     notice, this list of conditions and the following disclaimer in the 
 *     documentation and/or other materials provided with the distribution.
 *  3. The name of the author may not be used to endorse or promote products
 *     derived from this software without specific prior written permission.
 *
 *  THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
 *  ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 *  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 *  ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE   
 *  FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 *  DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 *  OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 *  HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 *  LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 *  OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 *  SUCH DAMAGE.
 *
 *
 *  $Id: cpu_m68k.c,v 1.18 2007/03/26 02:16:09 debug Exp $
 *
 *  Motorola 68K CPU emulation.
 */

#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <ctype.h>

#include "cpu.h"
#include "machine.h"
#include "memory.h"
#include "misc.h"
#include "settings.h"
#include "symbol.h"


#define DYNTRANS_32
#define DYNTRANS_VARIABLE_INSTRUCTION_LENGTH
#include "tmp_m68k_head.c"


static char *m68k_aname[] = { "a0", "a1", "a2", "a3", "a4", "a5", "fp", "a7" };
static char *m68k_dname[] = { "d0", "d1", "d2", "d3", "d4", "d5", "d6", "d7" };


/*
 *  m68k_cpu_new():
 *
 *  Create a new M68K cpu object.
 *
 *  Returns 1 on success, 0 if there was no matching M68K processor with
 *  this cpu_type_name.
 */
int m68k_cpu_new(struct cpu *cpu, struct memory *mem, struct machine *machine,
        int cpu_id, char *cpu_type_name)
{
        int i = 0;
        struct m68k_cpu_type_def cpu_type_defs[] = M68K_CPU_TYPE_DEFS;

        /*  Scan the cpu_type_defs list for this cpu type:  */
        while (cpu_type_defs[i].name != NULL) {
                if (strcasecmp(cpu_type_defs[i].name, cpu_type_name) == 0) {
                        break;
                }
                i++;
        }
        if (cpu_type_defs[i].name == NULL)
                return 0;

        cpu->run_instr = m68k_run_instr;
        cpu->memory_rw = m68k_memory_rw;
        cpu->update_translation_table = m68k_update_translation_table;
        cpu->invalidate_translation_caches =
            m68k_invalidate_translation_caches;
        cpu->invalidate_code_translation = m68k_invalidate_code_translation;
        cpu->is_32bit = 1;
        cpu->byte_order = EMUL_BIG_ENDIAN;

        cpu->cd.m68k.cpu_type = cpu_type_defs[i];

        /*  Only show name and caches etc for CPU nr 0 (in SMP machines):  */
        if (cpu_id == 0) {
                debug("%s", cpu->name);
        }

        /*  Add all register names to the settings:  */
        CPU_SETTINGS_ADD_REGISTER64("pc", cpu->pc);
        for (i=0; i<N_M68K_AREGS; i++)
                CPU_SETTINGS_ADD_REGISTER32(m68k_aname[i], cpu->cd.m68k.a[i]);
        /*  Both "fp" and "a6" should map to the same register:  */
        CPU_SETTINGS_ADD_REGISTER32("a6", cpu->cd.m68k.a[6]);
        for (i=0; i<N_M68K_DREGS; i++)
                CPU_SETTINGS_ADD_REGISTER32(m68k_dname[i], cpu->cd.m68k.d[i]);

        return 1;
}


/*
 *  m68k_cpu_list_available_types():
 *
 *  Print a list of available M68K CPU types.
 */
void m68k_cpu_list_available_types(void)
{
        int i = 0, j;
        struct m68k_cpu_type_def tdefs[] = M68K_CPU_TYPE_DEFS;

        while (tdefs[i].name != NULL) {
                debug("%s", tdefs[i].name);
                for (j=10 - strlen(tdefs[i].name); j>0; j--)
                        debug(" ");
                i++;
                if ((i % 6) == 0 || tdefs[i].name == NULL)
                        debug("\n");
        }
}


/*
 *  m68k_cpu_dumpinfo():
 */
void m68k_cpu_dumpinfo(struct cpu *cpu)
{
        /*  TODO  */
        debug("\n");
}


/*
 *  m68k_cpu_register_dump():
 *
 *  Dump cpu registers in a relatively readable format.
 *
 *  gprs: set to non-zero to dump GPRs and some special-purpose registers.
 *  coprocs: set bit 0..3 to dump registers in coproc 0..3.
 */
void m68k_cpu_register_dump(struct cpu *cpu, int gprs, int coprocs)
{
        char *symbol;
        uint64_t offset;
        int x = cpu->cpu_id, i;

        if (gprs) {
                /*  Special registers (pc, ...) first:  */
                symbol = get_symbol_name(&cpu->machine->symbol_context,
                    cpu->pc, &offset);

                debug("cpu%i: pc = 0x%08"PRIx32, x, (uint32_t)cpu->pc);
                debug("  <%s>\n", symbol != NULL? symbol : " no symbol ");

                for (i=0; i<N_M68K_AREGS; i++) {
                        if ((i % 4) == 0)
                                debug("cpu%i:", x);
                        debug(" %s = 0x%08"PRIx32" ",
                            m68k_aname[i], cpu->cd.m68k.a[i]);
                        if ((i % 4) == 3)
                                debug("\n");
                }

                for (i=0; i<N_M68K_DREGS; i++) {
                        if ((i % 4) == 0)
                                debug("cpu%i:", x);
                        debug(" %s = 0x%08"PRIx32" ",
                            m68k_dname[i], cpu->cd.m68k.d[i]);
                        if ((i % 4) == 3)
                                debug("\n");
                }
        }
}


/*
 *  m68k_cpu_tlbdump():
 *
 *  Called from the debugger to dump the TLB in a readable format.
 *  x is the cpu number to dump, or -1 to dump all CPUs.
 *
 *  If rawflag is nonzero, then the TLB contents isn't formated nicely,
 *  just dumped.
 */
void m68k_cpu_tlbdump(struct machine *m, int x, int rawflag)
{
}


/*  Helper functions:  */
static void print_two(unsigned char *instr, int *len)
{ debug(" %02x%02x", instr[*len], instr[*len+1]); (*len) += 2; }
static void print_spaces(int len) { int i; debug(" "); for (i=0; i<16-len/2*5;
    i++) debug(" "); }


/*
 *  m68k_cpu_disassemble_instr():
 *
 *  Convert an instruction word into human readable format, for instruction
 *  tracing.
 *
 *  If running is 1, cpu->pc should be the address of the instruction.
 *
 *  If running is 0, things that depend on the runtime environment (eg.
 *  register contents) will not be shown, and addr will be used instead of
 *  cpu->pc for relative addresses.
 */
int m68k_cpu_disassemble_instr(struct cpu *cpu, unsigned char *ib,
        int running, uint64_t dumpaddr)
{
        uint64_t offset;
        int len = 0;
        char *symbol;

        if (running)
                dumpaddr = cpu->pc;

        symbol = get_symbol_name(&cpu->machine->symbol_context,
            dumpaddr, &offset);
        if (symbol != NULL && offset==0)
                debug("<%s>\n", symbol);

        if (cpu->machine->ncpus > 1 && running)
                debug("cpu%i: ", cpu->cpu_id);

        debug("0x%08x: ", (int)dumpaddr);

        print_two(ib, &len);

        switch (ib[0] >> 4) {

        case 0x4:
                switch (ib[0] & 0xf) {

                case 0xe:
                        if (ib[1] >= 0x50 && ib[1] <= 0x57) {
                                print_two(ib, &len);
                                print_spaces(len);
                                debug("linkw\t%%%s,#%i\n",
                                    m68k_aname[ib[1] & 7],
                                    ((ib[2] << 8) + ib[3]));
                        } else if (ib[1] >= 0x58 && ib[1] <= 0x5f) {
                                print_spaces(len);
                                debug("unlk\t%%%s\n", m68k_aname[ib[1] & 7]);
                        } else if (ib[1] == 0x71) {
                                print_spaces(len);
                                debug("nop\n");
                        } else if (ib[1] == 0x73) {
                                print_spaces(len);
                                debug("rte\n");
                        } else if (ib[1] == 0x74) {
                                print_two(ib, &len);
                                print_spaces(len);
                                debug("rtd\t#0x%04x\n", ((ib[2] << 8) + ib[3]));
                        } else if (ib[1] == 0x75) {
                                print_spaces(len);
                                debug("rts\n");
                        } else {
                                print_spaces(len);
                                debug("UNIMPLEMENTED\n");
                        }
                        break;

                default:print_spaces(len);
                        debug("UNIMPLEMENTED\n");
                }
                break;

        default:print_spaces(len);
                debug("UNIMPLEMENTED\n");
        }

        return len;
}


#include "tmp_m68k_tail.c"

1	dpavlin	14	/*
2	dpavlin	34	* Copyright (C) 2005-2007 Anders Gavare. All rights reserved.
3	dpavlin	14	*
4			* Redistribution and use in source and binary forms, with or without
5			* modification, are permitted provided that the following conditions are met:
6			*
7			* 1. Redistributions of source code must retain the above copyright
8			* notice, this list of conditions and the following disclaimer.
9			* 2. Redistributions in binary form must reproduce the above copyright
10			* notice, this list of conditions and the following disclaimer in the
11			* documentation and/or other materials provided with the distribution.
12			* 3. The name of the author may not be used to endorse or promote products
13			* derived from this software without specific prior written permission.
14			*
15			* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16			* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17			* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18			* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19			* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20			* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21			* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22			* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23			* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24			* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25			* SUCH DAMAGE.
26			*
27			*
28	dpavlin	38	* $Id: cpu_m68k.c,v 1.18 2007/03/26 02:16:09 debug Exp $
29	dpavlin	14	*
30			* Motorola 68K CPU emulation.
31			*/
32
33			#include <stdio.h>
34			#include <stdlib.h>
35			#include <string.h>
36			#include <ctype.h>
37
38			#include "cpu.h"
39			#include "machine.h"
40			#include "memory.h"
41			#include "misc.h"
42	dpavlin	32	#include "settings.h"
43	dpavlin	14	#include "symbol.h"
44
45
46			#define DYNTRANS_32
47			#define DYNTRANS_VARIABLE_INSTRUCTION_LENGTH
48			#include "tmp_m68k_head.c"
49
50
51			static char *m68k_aname[] = { "a0", "a1", "a2", "a3", "a4", "a5", "fp", "a7" };
52	dpavlin	32	static char *m68k_dname[] = { "d0", "d1", "d2", "d3", "d4", "d5", "d6", "d7" };
53	dpavlin	14
54
55			/*
56			* m68k_cpu_new():
57			*
58			* Create a new M68K cpu object.
59			*
60			* Returns 1 on success, 0 if there was no matching M68K processor with
61			* this cpu_type_name.
62			*/
63			int m68k_cpu_new(struct cpu cpu, struct memory mem, struct machine *machine,
64			int cpu_id, char *cpu_type_name)
65			{
66	dpavlin	32	int i = 0;
67			struct m68k_cpu_type_def cpu_type_defs[] = M68K_CPU_TYPE_DEFS;
68
69			/* Scan the cpu_type_defs list for this cpu type: */
70			while (cpu_type_defs[i].name != NULL) {
71			if (strcasecmp(cpu_type_defs[i].name, cpu_type_name) == 0) {
72			break;
73			}
74			i++;
75			}
76			if (cpu_type_defs[i].name == NULL)
77	dpavlin	14	return 0;
78
79	dpavlin	28	cpu->run_instr = m68k_run_instr;
80	dpavlin	14	cpu->memory_rw = m68k_memory_rw;
81			cpu->update_translation_table = m68k_update_translation_table;
82	dpavlin	18	cpu->invalidate_translation_caches =
83			m68k_invalidate_translation_caches;
84	dpavlin	14	cpu->invalidate_code_translation = m68k_invalidate_code_translation;
85			cpu->is_32bit = 1;
86			cpu->byte_order = EMUL_BIG_ENDIAN;
87
88	dpavlin	32	cpu->cd.m68k.cpu_type = cpu_type_defs[i];
89
90	dpavlin	14	/* Only show name and caches etc for CPU nr 0 (in SMP machines): */
91			if (cpu_id == 0) {
92			debug("%s", cpu->name);
93			}
94
95	dpavlin	32	/* Add all register names to the settings: */
96			CPU_SETTINGS_ADD_REGISTER64("pc", cpu->pc);
97			for (i=0; i<N_M68K_AREGS; i++)
98			CPU_SETTINGS_ADD_REGISTER32(m68k_aname[i], cpu->cd.m68k.a[i]);
99			/* Both "fp" and "a6" should map to the same register: */
100			CPU_SETTINGS_ADD_REGISTER32("a6", cpu->cd.m68k.a[6]);
101			for (i=0; i<N_M68K_DREGS; i++)
102			CPU_SETTINGS_ADD_REGISTER32(m68k_dname[i], cpu->cd.m68k.d[i]);
103
104	dpavlin	14	return 1;
105			}
106
107
108			/*
109			* m68k_cpu_list_available_types():
110			*
111			* Print a list of available M68K CPU types.
112			*/
113			void m68k_cpu_list_available_types(void)
114			{
115	dpavlin	32	int i = 0, j;
116			struct m68k_cpu_type_def tdefs[] = M68K_CPU_TYPE_DEFS;
117
118			while (tdefs[i].name != NULL) {
119			debug("%s", tdefs[i].name);
120			for (j=10 - strlen(tdefs[i].name); j>0; j--)
121			debug(" ");
122			i++;
123			if ((i % 6) == 0 \|\| tdefs[i].name == NULL)
124			debug("\n");
125			}
126	dpavlin	14	}
127
128
129			/*
130			* m68k_cpu_dumpinfo():
131			*/
132			void m68k_cpu_dumpinfo(struct cpu *cpu)
133			{
134			/* TODO */
135			debug("\n");
136			}
137
138
139			/*
140			* m68k_cpu_register_dump():
141			*
142			* Dump cpu registers in a relatively readable format.
143			*
144			* gprs: set to non-zero to dump GPRs and some special-purpose registers.
145			* coprocs: set bit 0..3 to dump registers in coproc 0..3.
146			*/
147			void m68k_cpu_register_dump(struct cpu *cpu, int gprs, int coprocs)
148			{
149			char *symbol;
150			uint64_t offset;
151	dpavlin	32	int x = cpu->cpu_id, i;
152	dpavlin	14
153			if (gprs) {
154			/* Special registers (pc, ...) first: */
155			symbol = get_symbol_name(&cpu->machine->symbol_context,
156			cpu->pc, &offset);
157
158	dpavlin	32	debug("cpu%i: pc = 0x%08"PRIx32, x, (uint32_t)cpu->pc);
159	dpavlin	14	debug(" <%s>\n", symbol != NULL? symbol : " no symbol ");
160
161	dpavlin	32	for (i=0; i<N_M68K_AREGS; i++) {
162			if ((i % 4) == 0)
163			debug("cpu%i:", x);
164			debug(" %s = 0x%08"PRIx32" ",
165			m68k_aname[i], cpu->cd.m68k.a[i]);
166			if ((i % 4) == 3)
167			debug("\n");
168			}
169	dpavlin	14
170	dpavlin	32	for (i=0; i<N_M68K_DREGS; i++) {
171			if ((i % 4) == 0)
172			debug("cpu%i:", x);
173			debug(" %s = 0x%08"PRIx32" ",
174			m68k_dname[i], cpu->cd.m68k.d[i]);
175			if ((i % 4) == 3)
176			debug("\n");
177			}
178	dpavlin	14	}
179			}
180
181
182			/*
183	dpavlin	24	* m68k_cpu_tlbdump():
184			*
185			* Called from the debugger to dump the TLB in a readable format.
186			* x is the cpu number to dump, or -1 to dump all CPUs.
187			*
188			* If rawflag is nonzero, then the TLB contents isn't formated nicely,
189			* just dumped.
190			*/
191			void m68k_cpu_tlbdump(struct machine *m, int x, int rawflag)
192			{
193			}
194
195
196	dpavlin	14	/* Helper functions: */
197			static void print_two(unsigned char instr, int len)
198			{ debug(" %02x%02x", instr[len], instr[len+1]); (*len) += 2; }
199			static void print_spaces(int len) { int i; debug(" "); for (i=0; i<16-len/2*5;
200			i++) debug(" "); }
201
202
203			/*
204			* m68k_cpu_disassemble_instr():
205			*
206			* Convert an instruction word into human readable format, for instruction
207			* tracing.
208			*
209			* If running is 1, cpu->pc should be the address of the instruction.
210			*
211			* If running is 0, things that depend on the runtime environment (eg.
212			* register contents) will not be shown, and addr will be used instead of
213			* cpu->pc for relative addresses.
214			*/
215			int m68k_cpu_disassemble_instr(struct cpu cpu, unsigned char ib,
216	dpavlin	24	int running, uint64_t dumpaddr)
217	dpavlin	14	{
218			uint64_t offset;
219			int len = 0;
220			char *symbol;
221
222			if (running)
223			dumpaddr = cpu->pc;
224
225			symbol = get_symbol_name(&cpu->machine->symbol_context,
226			dumpaddr, &offset);
227			if (symbol != NULL && offset==0)
228			debug("<%s>\n", symbol);
229
230			if (cpu->machine->ncpus > 1 && running)
231			debug("cpu%i: ", cpu->cpu_id);
232
233			debug("0x%08x: ", (int)dumpaddr);
234
235			print_two(ib, &len);
236
237	dpavlin	32	switch (ib[0] >> 4) {
238
239			case 0x4:
240			switch (ib[0] & 0xf) {
241
242			case 0xe:
243			if (ib[1] >= 0x50 && ib[1] <= 0x57) {
244			print_two(ib, &len);
245			print_spaces(len);
246	dpavlin	34	debug("linkw\t%%%s,#%i\n",
247			m68k_aname[ib[1] & 7],
248	dpavlin	32	((ib[2] << 8) + ib[3]));
249			} else if (ib[1] >= 0x58 && ib[1] <= 0x5f) {
250			print_spaces(len);
251			debug("unlk\t%%%s\n", m68k_aname[ib[1] & 7]);
252			} else if (ib[1] == 0x71) {
253			print_spaces(len);
254			debug("nop\n");
255			} else if (ib[1] == 0x73) {
256			print_spaces(len);
257			debug("rte\n");
258			} else if (ib[1] == 0x74) {
259			print_two(ib, &len);
260			print_spaces(len);
261			debug("rtd\t#0x%04x\n", ((ib[2] << 8) + ib[3]));
262			} else if (ib[1] == 0x75) {
263			print_spaces(len);
264			debug("rts\n");
265			} else {
266			print_spaces(len);
267			debug("UNIMPLEMENTED\n");
268			}
269			break;
270
271			default:print_spaces(len);
272			debug("UNIMPLEMENTED\n");
273	dpavlin	14	}
274	dpavlin	32	break;
275
276			default:print_spaces(len);
277			debug("UNIMPLEMENTED\n");
278	dpavlin	14	}
279
280			return len;
281			}
282
283
284			#include "tmp_m68k_tail.c"
285