25 |
* SUCH DAMAGE. |
* SUCH DAMAGE. |
26 |
* |
* |
27 |
* |
* |
28 |
* $Id: cpu_alpha_instr_loadstore.c,v 1.1 2005/08/29 14:36:41 debug Exp $ |
* $Id: cpu_alpha_instr_loadstore.c,v 1.2 2005/11/22 17:52:58 debug Exp $ |
29 |
* |
* |
30 |
* Alpha load/store instructions. (Included from cpu_alpha_instr_inc.c.) |
* Alpha load/store instructions. (Included from cpu_alpha_instr_inc.c.) |
31 |
* |
* |
79 |
data_x += (data[1] << 8); |
data_x += (data[1] << 8); |
80 |
#ifndef LS_W |
#ifndef LS_W |
81 |
data_x += (data[2] << 16); |
data_x += (data[2] << 16); |
82 |
data_x += (data[3] << 24); |
data_x += ((uint64_t)data[3] << 24); |
83 |
#ifdef LS_L |
#ifdef LS_L |
84 |
data_x = (int64_t)(int32_t)data_x; |
data_x = (int64_t)(int32_t)data_x; |
85 |
#endif |
#endif |
204 |
data_x += (page[c+1] << 8); |
data_x += (page[c+1] << 8); |
205 |
#ifndef LS_W |
#ifndef LS_W |
206 |
data_x += (page[c+2] << 16); |
data_x += (page[c+2] << 16); |
207 |
data_x += (page[c+3] << 24); |
data_x += ((uint64_t)page[c+3] << 24); |
208 |
#ifndef LS_L |
#ifndef LS_L |
209 |
data_x += ((uint64_t)page[c+4] << 32); |
data_x += ((uint64_t)page[c+4] << 32); |
210 |
data_x += ((uint64_t)page[c+5] << 40); |
data_x += ((uint64_t)page[c+5] << 40); |
299 |
data_x += (page[c+1] << 8); |
data_x += (page[c+1] << 8); |
300 |
#ifndef LS_W |
#ifndef LS_W |
301 |
data_x += (page[c+2] << 16); |
data_x += (page[c+2] << 16); |
302 |
data_x += (page[c+3] << 24); |
data_x += ((uint64_t)page[c+3] << 24); |
303 |
#ifndef LS_L |
#ifndef LS_L |
304 |
data_x += ((uint64_t)page[c+4] << 32); |
data_x += ((uint64_t)page[c+4] << 32); |
305 |
data_x += ((uint64_t)page[c+5] << 40); |
data_x += ((uint64_t)page[c+5] << 40); |