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$Id: README_DYNTRANS,v 1.4 2005/09/28 11:24:19 debug Exp $ |
$Id: README_DYNTRANS,v 1.6 2005/11/24 01:15:06 debug Exp $ |
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PPC optimizations TODO: |
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find high-level bottlenecks! |
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inline cr0 field calculation |
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inline pc to pointers calculation |
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load/store with r1 as base |
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multiple load/stores in a row |
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all forms of branches, similar optimizations as with ARM |
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(conditional, link etc) |
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Dyntrans TODO: |
Dyntrans TODO: |
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Alpha 32-bit 64 no |
Alpha 32-bit 64 no |
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ARM 32-bit, 16-bit (Thumb) 32 no |
ARM 32-bit, 16-bit (Thumb) 32 no |
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Atmel AVR 16-bit 8 no |
Atmel AVR 16-bit 8 no |
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F-CPU ? ? ? |
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HPPA 32-bit 64/32 yes |
HPPA 32-bit 64/32 yes |
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i960 32-bit + variable 32 ? |
i960 32-bit + variable 32 ? |
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IA64 128-bit 64 no |
IA64 128-bit 64 no |
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M68K 16-bit + variable 32 no |
M68K 16-bit + variable 32 no |
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M88K ? 32 (?) ? |
M88K ? 32 (?) ? |
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MIPS 32-bit, 16-bit (MIPS16) 64/32 yes |
MIPS 32-bit, 16-bit (MIPS16) 64/32 yes |
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OpenRISC ? ? ? |
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PC532 ? 32 (?) ? |
PC532 ? 32 (?) ? |
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POWER/PPC 32-bit 64/32 no |
POWER/PPC 32-bit 64/32 no |
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SH 32-bit, 16-bit (SHcompact) 64/32 yes(*) |
SH 32-bit, 16-bit (SHcompact) 64/32 yes(*) |