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#define __MIPS64_JIT_H__ |
#define __MIPS64_JIT_H__ |
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#include "utils.h" |
#include "utils.h" |
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#include "sbox.h" |
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/* Size of executable page area (in Mb) */ |
/* Size of executable page area (in Mb) */ |
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#ifndef __CYGWIN__ |
#ifndef __CYGWIN__ |
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/* Maximum number of X86 chunks */ |
/* Maximum number of X86 chunks */ |
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#define MIPS_JIT_MAX_CHUNKS 32 |
#define MIPS_JIT_MAX_CHUNKS 32 |
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/* Size of hash for PC lookup */ |
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#define MIPS_JIT_PC_HASH_BITS 16 |
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#define MIPS_JIT_PC_HASH_MASK ((1 << MIPS_JIT_PC_HASH_BITS) - 1) |
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#define MIPS_JIT_PC_HASH_SIZE (1 << MIPS_JIT_PC_HASH_BITS) |
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/* Instruction jump patch */ |
/* Instruction jump patch */ |
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struct mips64_insn_patch { |
struct mips64_insn_patch { |
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u_char *jit_insn; |
u_char *jit_insn; |
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m_uint64_t start_pc; |
m_uint64_t start_pc; |
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u_char **jit_insn_ptr; |
u_char **jit_insn_ptr; |
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m_uint64_t acc_count; |
m_uint64_t acc_count; |
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m_uint32_t phys_page; |
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mips_insn_t *mips_code; |
mips_insn_t *mips_code; |
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u_int mips_trans_pos; |
u_int mips_trans_pos; |
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u_int jit_chunk_pos; |
u_int jit_chunk_pos; |
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static forced_inline |
static forced_inline |
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u_char *mips64_jit_tcb_get_host_ptr(mips64_jit_tcb_t *b,m_uint64_t vaddr) |
u_char *mips64_jit_tcb_get_host_ptr(mips64_jit_tcb_t *b,m_uint64_t vaddr) |
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{ |
{ |
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m_uint64_t offset; |
m_uint32_t offset; |
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offset = (vaddr - b->start_pc) >> 2; |
offset = ((m_uint32_t)vaddr & MIPS_MIN_PAGE_IMASK) >> 2; |
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return(b->jit_insn_ptr[offset]); |
return(b->jit_insn_ptr[offset]); |
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} |
} |
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/* Check if the specified address belongs to the specified block */ |
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static forced_inline |
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int mips64_jit_tcb_local_addr(mips64_jit_tcb_t *block,m_uint64_t vaddr, |
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u_char **jit_addr) |
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{ |
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if ((vaddr & MIPS_MIN_PAGE_MASK) == block->start_pc) { |
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*jit_addr = mips64_jit_tcb_get_host_ptr(block,vaddr); |
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return(1); |
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} |
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return(0); |
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} |
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/* Check if PC register matches the compiled block virtual address */ |
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static forced_inline |
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int mips64_jit_tcb_match(cpu_mips_t *cpu,mips64_jit_tcb_t *block) |
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{ |
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m_uint64_t vpage; |
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vpage = cpu->pc & ~(m_uint64_t)MIPS_MIN_PAGE_IMASK; |
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return(block->start_pc == vpage); |
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} |
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/* Compute the hash index for the specified PC value */ |
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static forced_inline m_uint32_t mips64_jit_get_pc_hash(m_uint64_t pc) |
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{ |
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m_uint32_t page_hash; |
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page_hash = sbox_u32(pc >> MIPS_MIN_PAGE_SHIFT); |
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return((page_hash ^ (page_hash >> 12)) & MIPS_JIT_PC_HASH_MASK); |
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} |
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/* Check if there are pending IRQ */ |
/* Check if there are pending IRQ */ |
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extern void mips64_check_pending_irq(mips64_jit_tcb_t *b); |
extern void mips64_check_pending_irq(mips64_jit_tcb_t *b); |
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/* Shutdown the JIT */ |
/* Shutdown the JIT */ |
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void mips64_jit_shutdown(cpu_mips_t *cpu); |
void mips64_jit_shutdown(cpu_mips_t *cpu); |
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/* Check if an instruction is in a delay slot or not */ |
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int mips64_jit_is_delay_slot(mips64_jit_tcb_t *b,m_uint64_t pc); |
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/* Fetch a MIPS instruction and emit corresponding x86 translated code */ |
/* Fetch a MIPS instruction and emit corresponding x86 translated code */ |
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struct mips64_insn_tag *mips64_jit_fetch_and_emit(cpu_mips_t *cpu, |
struct mips64_insn_tag *mips64_jit_fetch_and_emit(cpu_mips_t *cpu, |
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mips64_jit_tcb_t *block, |
mips64_jit_tcb_t *block, |
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void mips64_jit_tcb_free(cpu_mips_t *cpu,mips64_jit_tcb_t *block, |
void mips64_jit_tcb_free(cpu_mips_t *cpu,mips64_jit_tcb_t *block, |
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int list_removal); |
int list_removal); |
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/* Check if the specified address belongs to the specified block */ |
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int mips64_jit_tcb_local_addr(mips64_jit_tcb_t *block,m_uint64_t vaddr, |
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u_char **haddr); |
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/* Execute compiled MIPS code */ |
/* Execute compiled MIPS code */ |
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void *mips64_jit_run_cpu(cpu_gen_t *cpu); |
void *mips64_jit_run_cpu(cpu_gen_t *cpu); |
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