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dpavlin |
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/* |
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* Cisco router simulation platform. |
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* Copyright (c) 2005-2007 Christophe Fillot (cf@utc.fr) |
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* |
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* Cisco msfc1 Midplane FPGA. |
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*/ |
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#ifndef __DEV_MSFC1_MPFPGA_H__ |
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#define __DEV_MSFC1_MPFPGA_H__ |
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/* Forward declaration for MP_FPGA private data */ |
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struct msfc1_mpfpga_data; |
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/* Trigger a Network IRQ for the specified slot/port */ |
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void dev_msfc1_mpfpga_net_set_irq(struct msfc1_mpfpga_data *d, |
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u_int slot,u_int port); |
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/* Clear a Network IRQ for the specified slot/port */ |
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void dev_msfc1_mpfpga_net_clear_irq(struct msfc1_mpfpga_data *d, |
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u_int slot,u_int port); |
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/* Create the msfc1 Midplane FPGA */ |
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int dev_msfc1_mpfpga_init(msfc1_t *router,m_uint64_t paddr,m_uint32_t len); |
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#endif |