/[dynamips]/upstream/dynamips-0.2.8-RC1/dev_c7200_mpfpga.c
This is repository of my old source code which isn't updated any more. Go to git.rot13.org for current projects!
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Diff of /upstream/dynamips-0.2.8-RC1/dev_c7200_mpfpga.c

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upstream/dynamips-0.2.7/dev_c7200_mpfpga.c revision 10 by dpavlin, Sat Oct 6 16:29:14 2007 UTC upstream/dynamips-0.2.8-RC1/dev_c7200_mpfpga.c revision 11 by dpavlin, Sat Oct 6 16:33:40 2007 UTC
# Line 127  static const struct nmc93cX6_eeprom_def Line 127  static const struct nmc93cX6_eeprom_def
127    
128  /* EEPROM group #1 (Bays 0, 1, 3, 4) */  /* EEPROM group #1 (Bays 0, 1, 3, 4) */
129  static const struct nmc93cX6_group eeprom_bays_g1 = {  static const struct nmc93cX6_group eeprom_bays_g1 = {
130     EEPROM_TYPE_NMC93C46, 4, 0, "PA Bays (Group #1) EEPROM", FALSE,     EEPROM_TYPE_NMC93C46, 4, 0,
131       EEPROM_DORD_NORMAL,
132       EEPROM_DOUT_HIGH,
133       EEPROM_DEBUG_DISABLED,
134       "PA Bays (Group #1) EEPROM",
135     { &eeprom_bay_def[0], &eeprom_bay_def[1],     { &eeprom_bay_def[0], &eeprom_bay_def[1],
136       &eeprom_bay_def[3], &eeprom_bay_def[4],       &eeprom_bay_def[3], &eeprom_bay_def[4],
137     },     },
# Line 136  static const struct nmc93cX6_group eepro Line 139  static const struct nmc93cX6_group eepro
139    
140  /* EEPROM group #2 (Bays 2, 5, 6) */  /* EEPROM group #2 (Bays 2, 5, 6) */
141  static const struct nmc93cX6_group eeprom_bays_g2 = {  static const struct nmc93cX6_group eeprom_bays_g2 = {
142     EEPROM_TYPE_NMC93C46, 3, 0, "PA Bays (Group #2) EEPROM", FALSE,     EEPROM_TYPE_NMC93C46, 3, 0,
143       EEPROM_DORD_NORMAL,
144       EEPROM_DOUT_HIGH,
145       EEPROM_DEBUG_DISABLED,
146       "PA Bays (Group #2) EEPROM",
147     { &eeprom_bay_def[2], &eeprom_bay_def[5], &eeprom_bay_def[6] },     { &eeprom_bay_def[2], &eeprom_bay_def[5], &eeprom_bay_def[6] },
148  };  };
149    
# Line 224  static void pa_update_status_reg(struct Line 230  static void pa_update_status_reg(struct
230     res |= PCI_BAY0_5V_OK | PCI_BAY0_3V_OK;     res |= PCI_BAY0_5V_OK | PCI_BAY0_3V_OK;
231    
232     /* We fake power on bays defined by the final user */     /* We fake power on bays defined by the final user */
233     if (c7200_pa_check_eeprom(d->router,1))     if (vm_slot_check_eeprom(d->router->vm,1,0))
234        res |= PCI_BAY1_5V_OK | PCI_BAY1_3V_OK;        res |= PCI_BAY1_5V_OK | PCI_BAY1_3V_OK;
235        
236     if (c7200_pa_check_eeprom(d->router,2))     if (vm_slot_check_eeprom(d->router->vm,2,0))
237        res |= PCI_BAY2_5V_OK | PCI_BAY2_3V_OK;        res |= PCI_BAY2_5V_OK | PCI_BAY2_3V_OK;
238    
239     if (c7200_pa_check_eeprom(d->router,3))     if (vm_slot_check_eeprom(d->router->vm,3,0))
240        res |= PCI_BAY3_5V_OK | PCI_BAY3_3V_OK;        res |= PCI_BAY3_5V_OK | PCI_BAY3_3V_OK;
241        
242     if (c7200_pa_check_eeprom(d->router,4))     if (vm_slot_check_eeprom(d->router->vm,4,0))
243        res |= PCI_BAY4_5V_OK | PCI_BAY4_3V_OK;        res |= PCI_BAY4_5V_OK | PCI_BAY4_3V_OK;
244    
245     if (c7200_pa_check_eeprom(d->router,5))     if (vm_slot_check_eeprom(d->router->vm,5,0))
246        res |= PCI_BAY5_5V_OK | PCI_BAY5_3V_OK;        res |= PCI_BAY5_5V_OK | PCI_BAY5_3V_OK;
247                
248     if (c7200_pa_check_eeprom(d->router,6))     if (vm_slot_check_eeprom(d->router->vm,6,0))
249        res |= PCI_BAY6_5V_OK | PCI_BAY6_3V_OK;        res |= PCI_BAY6_5V_OK | PCI_BAY6_3V_OK;
250    
251     d->pa_status_reg = res;     d->pa_status_reg = res;
# Line 426  void *dev_c7200_mpfpga_access(cpu_gen_t Line 432  void *dev_c7200_mpfpga_access(cpu_gen_t
432  }  }
433    
434  /* Initialize EEPROM groups */  /* Initialize EEPROM groups */
435  static void init_eeprom_groups(c7200_t *router)  void c7200_init_mp_eeprom_groups(c7200_t *router)
436  {  {
437     /* Group 1: bays 0, 1, 3, 4 */     /* Group 1: bays 0, 1, 3, 4 */
438     router->pa_eeprom_g1 = eeprom_bays_g1;     router->pa_eeprom_g1 = eeprom_bays_g1;
439     router->pa_eeprom_g1.eeprom[0] = &router->pa_bay[0].eeprom;     router->pa_eeprom_g1.eeprom[0] = NULL;
440     router->pa_eeprom_g1.eeprom[1] = &router->pa_bay[1].eeprom;     router->pa_eeprom_g1.eeprom[1] = NULL;
441     router->pa_eeprom_g1.eeprom[2] = &router->pa_bay[3].eeprom;     router->pa_eeprom_g1.eeprom[2] = NULL;
442     router->pa_eeprom_g1.eeprom[3] = &router->pa_bay[4].eeprom;     router->pa_eeprom_g1.eeprom[3] = NULL;
443    
444     /* Group 2: bays 2, 5, 6 */     /* Group 2: bays 2, 5, 6 */
445     router->pa_eeprom_g2 = eeprom_bays_g2;     router->pa_eeprom_g2 = eeprom_bays_g2;
446     router->pa_eeprom_g2.eeprom[0] = &router->pa_bay[2].eeprom;     router->pa_eeprom_g2.eeprom[0] = NULL;
447     router->pa_eeprom_g2.eeprom[1] = &router->pa_bay[5].eeprom;     router->pa_eeprom_g2.eeprom[1] = NULL;
448     router->pa_eeprom_g2.eeprom[2] = &router->pa_bay[6].eeprom;     router->pa_eeprom_g2.eeprom[2] = NULL;
449  }  }
450    
451  /* Shutdown the MP FPGA device */  /* Shutdown the MP FPGA device */
# Line 468  int dev_c7200_mpfpga_init(c7200_t *route Line 474  int dev_c7200_mpfpga_init(c7200_t *route
474    
475     memset(d,0,sizeof(*d));     memset(d,0,sizeof(*d));
476     d->router = router;     d->router = router;
     
    /* Initialize EEPROMs */  
    init_eeprom_groups(router);  
477    
478     vm_object_init(&d->vm_obj);     vm_object_init(&d->vm_obj);
479     d->vm_obj.name = "mp_fpga";     d->vm_obj.name = "mp_fpga";
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