1 |
/* |
/* |
2 |
* Cisco C7200 (Predator) Simulation Platform. |
* Cisco router Simulation Platform. |
3 |
* Copyright (C) 2005-2006 Christophe Fillot. All rights reserved. |
* Copyright (C) 2005-2006 Christophe Fillot. All rights reserved. |
4 |
* |
* |
5 |
* EEPROM types: |
* EEPROM types: |
22 |
#include <pthread.h> |
#include <pthread.h> |
23 |
#include <assert.h> |
#include <assert.h> |
24 |
|
|
25 |
#include "mips64.h" |
#include "cpu.h" |
26 |
|
#include "vm.h" |
27 |
#include "dynamips.h" |
#include "dynamips.h" |
28 |
#include "memory.h" |
#include "memory.h" |
29 |
#include "device.h" |
#include "device.h" |
579 |
} |
} |
580 |
|
|
581 |
/* Munich32 general access function */ |
/* Munich32 general access function */ |
582 |
static void *m32_gen_access(struct m32_data *d,cpu_mips_t *cpu, |
static void *m32_gen_access(struct m32_data *d,cpu_gen_t *cpu, |
583 |
m_uint32_t offset,u_int op_size,u_int op_type, |
m_uint32_t offset,u_int op_size,u_int op_type, |
584 |
m_uint64_t *data) |
m_uint64_t *data) |
585 |
{ |
{ |
642 |
/* |
/* |
643 |
* pa_4b_access() |
* pa_4b_access() |
644 |
*/ |
*/ |
645 |
void *pa_4b_access(cpu_mips_t *cpu,struct vdevice *dev,m_uint32_t offset, |
void *pa_4b_access(cpu_gen_t *cpu,struct vdevice *dev,m_uint32_t offset, |
646 |
u_int op_size,u_int op_type,m_uint64_t *data) |
u_int op_size,u_int op_type,m_uint64_t *data) |
647 |
{ |
{ |
648 |
struct pa_4b_data *d = dev->priv_data; |
struct pa_4b_data *d = dev->priv_data; |
655 |
if (offset >= MUNICH32_MEM_SIZE) { |
if (offset >= MUNICH32_MEM_SIZE) { |
656 |
if (op_type == MTS_READ) { |
if (op_type == MTS_READ) { |
657 |
cpu_log(cpu,d->name,"read access to offset = 0x%x, pc = 0x%llx " |
cpu_log(cpu,d->name,"read access to offset = 0x%x, pc = 0x%llx " |
658 |
"(op_size=%u)\n",offset,cpu->pc,op_size); |
"(op_size=%u)\n",offset,cpu_get_pc(cpu),op_size); |
659 |
} else { |
} else { |
660 |
cpu_log(cpu,d->name,"write access to vaddr = 0x%x, pc = 0x%llx, " |
cpu_log(cpu,d->name,"write access to vaddr = 0x%x, pc = 0x%llx, " |
661 |
"val = 0x%llx (op_size=%u)\n",offset,cpu->pc,*data,op_size); |
"val = 0x%llx (op_size=%u)\n", |
662 |
|
offset,cpu_get_pc(cpu),*data,op_size); |
663 |
} |
} |
664 |
} |
} |
665 |
#endif |
#endif |
743 |
/* |
/* |
744 |
* pci_munich32_read() |
* pci_munich32_read() |
745 |
*/ |
*/ |
746 |
static m_uint32_t pci_munich32_read(cpu_mips_t *cpu,struct pci_device *dev, |
static m_uint32_t pci_munich32_read(cpu_gen_t *cpu,struct pci_device *dev, |
747 |
int reg) |
int reg) |
748 |
{ |
{ |
749 |
struct pa_4b_data *d = dev->priv_data; |
struct pa_4b_data *d = dev->priv_data; |
762 |
/* |
/* |
763 |
* pci_munich32_write() |
* pci_munich32_write() |
764 |
*/ |
*/ |
765 |
static void pci_munich32_write(cpu_mips_t *cpu,struct pci_device *dev, |
static void pci_munich32_write(cpu_gen_t *cpu,struct pci_device *dev, |
766 |
int reg,m_uint32_t value) |
int reg,m_uint32_t value) |
767 |
{ |
{ |
768 |
struct pa_4b_data *d = dev->priv_data; |
struct pa_4b_data *d = dev->priv_data; |