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#include <sys/types.h> |
#include <sys/types.h> |
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#include <assert.h> |
#include <assert.h> |
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#include "mips64.h" |
#include "cpu.h" |
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#include "vm.h" |
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#include "dynamips.h" |
#include "dynamips.h" |
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#include "memory.h" |
#include "memory.h" |
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#include "device.h" |
#include "device.h" |
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#include "pci_io.h" |
#include "pci_io.h" |
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#include "dev_gt.h" |
#include "dev_gt.h" |
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#include "cisco_eeprom.h" |
#include "cisco_eeprom.h" |
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#include "dev_rom.h" |
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#include "dev_c3745.h" |
#include "dev_c3745.h" |
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#include "dev_vtty.h" |
#include "dev_vtty.h" |
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#include "registry.h" |
#include "registry.h" |
1060 |
int i; |
int i; |
1061 |
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|
1062 |
/* Set the processor type: R7000 */ |
/* Set the processor type: R7000 */ |
1063 |
mips64_set_prid(vm->boot_cpu,MIPS_PRID_R7000); |
mips64_set_prid(CPU_MIPS64(vm->boot_cpu),MIPS_PRID_R7000); |
1064 |
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|
1065 |
/* Initialize the Galileo GT-96100 PCI controller */ |
/* Initialize the Galileo GT-96100 PCI controller */ |
1066 |
if (c3745_init_gt96100(router) == -1) |
if (c3745_init_gt96100(router) == -1) |
1147 |
/* Initialize the C3745 Platform */ |
/* Initialize the C3745 Platform */ |
1148 |
int c3745_init_platform(c3745_t *router) |
int c3745_init_platform(c3745_t *router) |
1149 |
{ |
{ |
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extern m_uint8_t microcode[]; |
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extern ssize_t microcode_len; |
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1150 |
vm_instance_t *vm = router->vm; |
vm_instance_t *vm = router->vm; |
1151 |
struct c3745_nm_bay *nm_bay; |
struct c3745_nm_bay *nm_bay; |
1152 |
cpu_mips_t *cpu; |
cpu_mips_t *cpu; |
1153 |
|
cpu_gen_t *gen; |
1154 |
vm_obj_t *obj; |
vm_obj_t *obj; |
1155 |
int i; |
int i; |
1156 |
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1164 |
vm->cpu_group = cpu_group_create("System CPU"); |
vm->cpu_group = cpu_group_create("System CPU"); |
1165 |
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1166 |
/* Initialize the virtual MIPS processor */ |
/* Initialize the virtual MIPS processor */ |
1167 |
if (!(cpu = cpu_create(vm,0))) { |
if (!(gen = cpu_create(vm,CPU_TYPE_MIPS64,0))) { |
1168 |
vm_error(vm,"unable to create CPU!\n"); |
vm_error(vm,"unable to create CPU!\n"); |
1169 |
return(-1); |
return(-1); |
1170 |
} |
} |
1171 |
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1172 |
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cpu = CPU_MIPS64(gen); |
1173 |
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1174 |
/* Add this CPU to the system CPU group */ |
/* Add this CPU to the system CPU group */ |
1175 |
cpu_group_add(vm->cpu_group,cpu); |
cpu_group_add(vm->cpu_group,gen); |
1176 |
vm->boot_cpu = cpu; |
vm->boot_cpu = gen; |
1177 |
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1178 |
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/* Initialize the IRQ routing vectors */ |
1179 |
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vm->set_irq = mips64_vm_set_irq; |
1180 |
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vm->clear_irq = mips64_vm_clear_irq; |
1181 |
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1182 |
/* Mark the Network IO interrupt as high priority */ |
/* Mark the Network IO interrupt as high priority */ |
1183 |
cpu->irq_idle_preempt[C3745_NETIO_IRQ] = TRUE; |
cpu->irq_idle_preempt[C3745_NETIO_IRQ] = TRUE; |
1194 |
dev_remote_control_init(vm,0x16000000,0x1000); |
dev_remote_control_init(vm,0x16000000,0x1000); |
1195 |
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1196 |
/* Specific Storage Area (SSA) */ |
/* Specific Storage Area (SSA) */ |
1197 |
dev_ram_init(vm,"ssa",TRUE,FALSE,NULL,0x16001000ULL,0x7000); |
dev_ram_init(vm,"ssa",TRUE,FALSE,NULL,FALSE,0x16001000ULL,0x7000); |
1198 |
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1199 |
/* IO FPGA */ |
/* IO FPGA */ |
1200 |
if (dev_c3745_iofpga_init(router,C3745_IOFPGA_ADDR,0x200000) == -1) |
if (dev_c3745_iofpga_init(router,C3745_IOFPGA_ADDR,0x200000) == -1) |
1217 |
if (!(obj = dev_flash_init(vm,"rom",C3745_ROM_ADDR,vm->rom_size*1048576))) |
if (!(obj = dev_flash_init(vm,"rom",C3745_ROM_ADDR,vm->rom_size*1048576))) |
1218 |
return(-1); |
return(-1); |
1219 |
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1220 |
dev_flash_copy_data(obj,0,microcode,microcode_len); |
dev_flash_copy_data(obj,0,mips64_microcode,mips64_microcode_len); |
1221 |
c3745_nvram_check_empty_config(vm); |
c3745_nvram_check_empty_config(vm); |
1222 |
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|
1223 |
/* Initialize the NS16552 DUART */ |
/* Initialize the NS16552 DUART */ |
1258 |
int c3745_boot_ios(c3745_t *router) |
int c3745_boot_ios(c3745_t *router) |
1259 |
{ |
{ |
1260 |
vm_instance_t *vm = router->vm; |
vm_instance_t *vm = router->vm; |
1261 |
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cpu_mips_t *cpu; |
1262 |
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|
1263 |
if (!vm->boot_cpu) |
if (!vm->boot_cpu) |
1264 |
return(-1); |
return(-1); |
1273 |
} |
} |
1274 |
|
|
1275 |
/* Reset the boot CPU */ |
/* Reset the boot CPU */ |
1276 |
mips64_reset(vm->boot_cpu); |
cpu = CPU_MIPS64(vm->boot_cpu); |
1277 |
|
mips64_reset(cpu); |
1278 |
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1279 |
/* Load IOS image */ |
/* Load IOS image */ |
1280 |
if (mips64_load_elf_image(vm->boot_cpu,vm->ios_image, |
if (mips64_load_elf_image(cpu,vm->ios_image, |
1281 |
(vm->ghost_status == VM_GHOST_RAM_USE), |
(vm->ghost_status == VM_GHOST_RAM_USE), |
1282 |
&vm->ios_entry_point) < 0) |
&vm->ios_entry_point) < 0) |
1283 |
{ |
{ |
1288 |
/* Launch the simulation */ |
/* Launch the simulation */ |
1289 |
printf("\nC3745 '%s': starting simulation (CPU0 PC=0x%llx), " |
printf("\nC3745 '%s': starting simulation (CPU0 PC=0x%llx), " |
1290 |
"JIT %sabled.\n", |
"JIT %sabled.\n", |
1291 |
vm->name,vm->boot_cpu->pc,vm->jit_use ? "en":"dis"); |
vm->name,cpu->pc,vm->jit_use ? "en":"dis"); |
1292 |
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|
1293 |
vm_log(vm,"C3745_BOOT", |
vm_log(vm,"C3745_BOOT", |
1294 |
"starting instance (CPU0 PC=0x%llx,idle_pc=0x%llx,JIT %s)\n", |
"starting instance (CPU0 PC=0x%llx,idle_pc=0x%llx,JIT %s)\n", |
1295 |
vm->boot_cpu->pc,vm->boot_cpu->idle_pc,vm->jit_use ? "on":"off"); |
cpu->pc,cpu->idle_pc,vm->jit_use ? "on":"off"); |
1296 |
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1297 |
/* Start main CPU */ |
/* Start main CPU */ |
1298 |
if (vm->ghost_status != VM_GHOST_RAM_GENERATE) { |
if (vm->ghost_status != VM_GHOST_RAM_GENERATE) { |
1329 |
} |
} |
1330 |
|
|
1331 |
/* Load ROM (ELF image or embedded) */ |
/* Load ROM (ELF image or embedded) */ |
1332 |
cpu0 = vm->boot_cpu; |
cpu0 = CPU_MIPS64(vm->boot_cpu); |
1333 |
rom_entry_point = (m_uint32_t)MIPS_ROM_PC; |
rom_entry_point = (m_uint32_t)MIPS_ROM_PC; |
1334 |
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1335 |
if ((vm->rom_filename != NULL) && |
if ((vm->rom_filename != NULL) && |