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dpavlin |
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/* |
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* Cisco router simulation platform. |
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* Copyright (c) 2005,2006 Christophe Fillot (cf@utc.fr) |
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* |
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* PowerPC (32-bit) generic routines. |
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*/ |
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#include <stdio.h> |
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#include <stdlib.h> |
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#include <unistd.h> |
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#include <string.h> |
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#include <sys/types.h> |
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#include <sys/stat.h> |
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#include <sys/mman.h> |
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#include <fcntl.h> |
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#include <assert.h> |
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#include "rbtree.h" |
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#include "cpu.h" |
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#include "dynamips.h" |
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#include "memory.h" |
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#include "device.h" |
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#include "ppc32_mem.h" |
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#include "ppc32_exec.h" |
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#include "ppc32_jit.h" |
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/* Reset a PowerPC CPU */ |
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int ppc32_reset(cpu_ppc_t *cpu) |
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{ |
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cpu->ia = PPC32_ROM_START; |
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cpu->gpr[1] = PPC32_ROM_SP; |
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cpu->msr = PPC32_MSR_IP; |
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/* Restart the MTS subsystem */ |
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ppc32_mem_restart(cpu); |
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/* Flush JIT structures */ |
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ppc32_jit_flush(cpu,0); |
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return(0); |
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} |
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/* Initialize a PowerPC processor */ |
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int ppc32_init(cpu_ppc_t *cpu) |
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{ |
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dpavlin |
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/* Initialize JIT operations */ |
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jit_op_init_cpu(cpu->gen); |
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dpavlin |
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/* Initialize idle timer */ |
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cpu->gen->idle_max = 1500; |
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cpu->gen->idle_sleep_time = 30000; |
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/* Timer IRQ parameters (default frequency: 250 Hz <=> 4ms period) */ |
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cpu->timer_irq_check_itv = 1000; |
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cpu->timer_irq_freq = 250; |
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dpavlin |
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/* Enable/disable direct block jump */ |
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cpu->exec_blk_direct_jump = cpu->vm->exec_blk_direct_jump; |
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dpavlin |
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/* Idle loop mutex and condition */ |
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pthread_mutex_init(&cpu->gen->idle_mutex,NULL); |
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pthread_cond_init(&cpu->gen->idle_cond,NULL); |
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/* Set the CPU methods */ |
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cpu->gen->reg_set = (void *)ppc32_reg_set; |
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cpu->gen->reg_dump = (void *)ppc32_dump_regs; |
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cpu->gen->mmu_dump = (void *)ppc32_dump_mmu; |
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cpu->gen->mmu_raw_dump = (void *)ppc32_dump_mmu; |
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cpu->gen->add_breakpoint = (void *)ppc32_add_breakpoint; |
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cpu->gen->remove_breakpoint = (void *)ppc32_remove_breakpoint; |
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cpu->gen->set_idle_pc = (void *)ppc32_set_idle_pc; |
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cpu->gen->get_idling_pc = (void *)ppc32_get_idling_pc; |
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/* Set the startup parameters */ |
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ppc32_reset(cpu); |
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return(0); |
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} |
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/* Delete a PowerPC processor */ |
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void ppc32_delete(cpu_ppc_t *cpu) |
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{ |
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if (cpu) { |
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ppc32_mem_shutdown(cpu); |
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ppc32_jit_shutdown(cpu); |
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} |
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} |
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/* Set the processor version register (PVR) */ |
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void ppc32_set_pvr(cpu_ppc_t *cpu,m_uint32_t pvr) |
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{ |
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cpu->pvr = pvr; |
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ppc32_mem_restart(cpu); |
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} |
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/* Set idle PC value */ |
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void ppc32_set_idle_pc(cpu_gen_t *cpu,m_uint64_t addr) |
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{ |
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CPU_PPC32(cpu)->idle_pc = (m_uint32_t)addr; |
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} |
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/* Timer IRQ */ |
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void *ppc32_timer_irq_run(cpu_ppc_t *cpu) |
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{ |
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pthread_mutex_t umutex = PTHREAD_MUTEX_INITIALIZER; |
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pthread_cond_t ucond = PTHREAD_COND_INITIALIZER; |
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struct timespec t_spc; |
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m_tmcnt_t expire; |
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u_int interval; |
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u_int threshold; |
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#if 0 |
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while(!cpu->timer_irq_armed) |
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sleep(1); |
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#endif |
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interval = 1000000 / cpu->timer_irq_freq; |
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threshold = cpu->timer_irq_freq * 10; |
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expire = m_gettime_usec() + interval; |
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while(cpu->gen->state != CPU_STATE_HALTED) { |
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pthread_mutex_lock(&umutex); |
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t_spc.tv_sec = expire / 1000000; |
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t_spc.tv_nsec = (expire % 1000000) * 1000; |
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pthread_cond_timedwait(&ucond,&umutex,&t_spc); |
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pthread_mutex_unlock(&umutex); |
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if (likely(!cpu->irq_disable) && |
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likely(cpu->gen->state == CPU_STATE_RUNNING) && |
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likely(cpu->msr & PPC32_MSR_EE)) |
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{ |
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cpu->timer_irq_pending++; |
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if (unlikely(cpu->timer_irq_pending > threshold)) { |
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cpu->timer_irq_pending = 0; |
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cpu->timer_drift++; |
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#if 0 |
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printf("Timer IRQ not accurate (%u pending IRQ): " |
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"reduce the \"--timer-irq-check-itv\" parameter " |
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"(current value: %u)\n", |
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cpu->timer_irq_pending,cpu->timer_irq_check_itv); |
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#endif |
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} |
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} |
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expire += interval; |
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} |
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return NULL; |
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} |
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#define IDLE_HASH_SIZE 8192 |
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/* Idle PC hash item */ |
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struct ppc32_idle_pc_hash { |
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m_uint32_t ia; |
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u_int count; |
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struct ppc32_idle_pc_hash *next; |
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}; |
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/* Determine an "idling" PC */ |
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int ppc32_get_idling_pc(cpu_gen_t *cpu) |
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{ |
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cpu_ppc_t *pcpu = CPU_PPC32(cpu); |
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struct ppc32_idle_pc_hash **pc_hash,*p; |
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struct cpu_idle_pc *res; |
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u_int h_index,res_count; |
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m_uint32_t cur_ia; |
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int i; |
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cpu->idle_pc_prop_count = 0; |
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if (pcpu->idle_pc != 0) { |
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printf("\nYou already use an idle PC, using the calibration would give " |
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"incorrect results.\n"); |
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return(-1); |
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} |
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printf("\nPlease wait while gathering statistics...\n"); |
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pc_hash = calloc(IDLE_HASH_SIZE,sizeof(struct ppc32_idle_pc_hash *)); |
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/* Disable IRQ */ |
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pcpu->irq_disable = TRUE; |
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/* Take 1000 measures, each mesure every 10ms */ |
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for(i=0;i<1000;i++) { |
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cur_ia = pcpu->ia; |
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h_index = (cur_ia >> 2) & (IDLE_HASH_SIZE-1); |
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for(p=pc_hash[h_index];p;p=p->next) |
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if (p->ia == cur_ia) { |
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p->count++; |
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break; |
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} |
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if (!p) { |
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if ((p = malloc(sizeof(*p)))) { |
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p->ia = cur_ia; |
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p->count = 1; |
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p->next = pc_hash[h_index]; |
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pc_hash[h_index] = p; |
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} |
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} |
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usleep(10000); |
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} |
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/* Select PCs */ |
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for(i=0,res_count=0;i<IDLE_HASH_SIZE;i++) { |
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for(p=pc_hash[i];p;p=p->next) |
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if ((p->count >= 20) && (p->count <= 80)) { |
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res = &cpu->idle_pc_prop[cpu->idle_pc_prop_count++]; |
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res->pc = p->ia; |
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res->count = p->count; |
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if (cpu->idle_pc_prop_count >= CPU_IDLE_PC_MAX_RES) |
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goto done; |
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} |
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} |
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done: |
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/* Set idle PC */ |
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if (cpu->idle_pc_prop_count) { |
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printf("Done. Suggested idling PC:\n"); |
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for(i=0;i<cpu->idle_pc_prop_count;i++) { |
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printf(" 0x%llx (count=%u)\n", |
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cpu->idle_pc_prop[i].pc, |
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cpu->idle_pc_prop[i].count); |
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} |
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printf("Restart the emulator with \"--idle-pc=0x%llx\" (for example)\n", |
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cpu->idle_pc_prop[0].pc); |
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} else { |
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dpavlin |
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printf("Done. No suggestion for idling PC, dumping the full table:\n"); |
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for(i=0;i<IDLE_HASH_SIZE;i++) |
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for(p=pc_hash[i];p;p=p->next) { |
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printf(" 0x%8.8x (%3u)\n",p->ia,p->count); |
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if (cpu->idle_pc_prop_count < CPU_IDLE_PC_MAX_RES) { |
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res = &cpu->idle_pc_prop[cpu->idle_pc_prop_count++]; |
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res->pc = p->ia; |
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res->count = p->count; |
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} |
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} |
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printf("\n"); |
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dpavlin |
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} |
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/* Re-enable IRQ */ |
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pcpu->irq_disable = FALSE; |
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return(0); |
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} |
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#if 0 |
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/* Set an IRQ (VM IRQ standard routing) */ |
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void ppc32_vm_set_irq(vm_instance_t *vm,u_int irq) |
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{ |
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cpu_ppc_t *boot_cpu; |
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boot_cpu = CPU_PPC32(vm->boot_cpu); |
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if (boot_cpu->irq_disable) { |
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boot_cpu->irq_pending = 0; |
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return; |
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} |
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ppc32_set_irq(boot_cpu,irq); |
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if (boot_cpu->irq_idle_preempt[irq]) |
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cpu_idle_break_wait(vm->boot_cpu); |
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} |
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/* Clear an IRQ (VM IRQ standard routing) */ |
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void ppc32_vm_clear_irq(vm_instance_t *vm,u_int irq) |
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{ |
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cpu_ppc_t *boot_cpu; |
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boot_cpu = CPU_PPC32(vm->boot_cpu); |
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ppc32_clear_irq(boot_cpu,irq); |
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} |
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#endif |
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286 |
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/* Generate an exception */ |
287 |
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void ppc32_trigger_exception(cpu_ppc_t *cpu,u_int exc_vector) |
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{ |
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//printf("TRIGGER_EXCEPTION: saving cpu->ia=0x%8.8x, msr=0x%8.8x\n", |
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// cpu->ia,cpu->msr); |
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/* Save the return instruction address */ |
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cpu->srr0 = cpu->ia; |
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if (exc_vector == PPC32_EXC_SYSCALL) |
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cpu->srr0 += sizeof(ppc_insn_t); |
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//printf("SRR0 = 0x%8.8x\n",cpu->srr0); |
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/* Save Machine State Register (MSR) */ |
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cpu->srr1 = cpu->msr & PPC32_EXC_SRR1_MASK; |
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//printf("SRR1 = 0x%8.8x\n",cpu->srr1); |
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/* Set the new SRR value */ |
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cpu->msr &= ~PPC32_EXC_MSR_MASK; |
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cpu->irq_check = FALSE; |
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//printf("MSR = 0x%8.8x\n",cpu->msr); |
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/* Use bootstrap vectors ? */ |
312 |
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if (cpu->msr & PPC32_MSR_IP) |
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cpu->ia = 0xFFF00000 + exc_vector; |
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else |
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cpu->ia = exc_vector; |
316 |
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} |
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318 |
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/* Trigger IRQs */ |
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fastcall void ppc32_trigger_irq(cpu_ppc_t *cpu) |
320 |
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{ |
321 |
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if (unlikely(cpu->irq_disable)) { |
322 |
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cpu->irq_pending = FALSE; |
323 |
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cpu->irq_check = FALSE; |
324 |
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return; |
325 |
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} |
326 |
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327 |
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/* Clear the IRQ check flag */ |
328 |
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cpu->irq_check = FALSE; |
329 |
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330 |
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if (cpu->irq_pending && (cpu->msr & PPC32_MSR_EE)) { |
331 |
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cpu->irq_count++; |
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cpu->irq_pending = FALSE; |
333 |
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ppc32_trigger_exception(cpu,PPC32_EXC_EXT); |
334 |
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} |
335 |
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} |
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337 |
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/* Trigger the decrementer exception */ |
338 |
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void ppc32_trigger_timer_irq(cpu_ppc_t *cpu) |
339 |
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{ |
340 |
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cpu->timer_irq_count++; |
341 |
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342 |
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if (cpu->msr & PPC32_MSR_EE) |
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ppc32_trigger_exception(cpu,PPC32_EXC_DEC); |
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} |
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346 |
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/* Virtual breakpoint */ |
347 |
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fastcall void ppc32_run_breakpoint(cpu_ppc_t *cpu) |
348 |
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{ |
349 |
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cpu_log(cpu->gen,"BREAKPOINT", |
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"Virtual breakpoint reached at IA=0x%8.8x\n",cpu->ia); |
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352 |
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printf("[[[ Virtual Breakpoint reached at IA=0x%8.8x LR=0x%8.8x]]]\n", |
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cpu->ia,cpu->lr); |
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355 |
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ppc32_dump_regs(cpu->gen); |
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} |
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358 |
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/* Add a virtual breakpoint */ |
359 |
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int ppc32_add_breakpoint(cpu_gen_t *cpu,m_uint64_t ia) |
360 |
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{ |
361 |
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cpu_ppc_t *pcpu = CPU_PPC32(cpu); |
362 |
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int i; |
363 |
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364 |
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for(i=0;i<PPC32_MAX_BREAKPOINTS;i++) |
365 |
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if (!pcpu->breakpoints[i]) |
366 |
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break; |
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368 |
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if (i == PPC32_MAX_BREAKPOINTS) |
369 |
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return(-1); |
370 |
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371 |
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pcpu->breakpoints[i] = ia; |
372 |
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pcpu->breakpoints_enabled = TRUE; |
373 |
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return(0); |
374 |
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} |
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376 |
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/* Remove a virtual breakpoint */ |
377 |
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void ppc32_remove_breakpoint(cpu_gen_t *cpu,m_uint64_t ia) |
378 |
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{ |
379 |
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cpu_ppc_t *pcpu = CPU_PPC32(cpu); |
380 |
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int i,j; |
381 |
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382 |
|
|
for(i=0;i<PPC32_MAX_BREAKPOINTS;i++) |
383 |
|
|
if (pcpu->breakpoints[i] == ia) |
384 |
|
|
{ |
385 |
|
|
for(j=i;j<PPC32_MAX_BREAKPOINTS-1;j++) |
386 |
|
|
pcpu->breakpoints[j] = pcpu->breakpoints[j+1]; |
387 |
|
|
|
388 |
|
|
pcpu->breakpoints[PPC32_MAX_BREAKPOINTS-1] = 0; |
389 |
|
|
} |
390 |
|
|
|
391 |
|
|
for(i=0;i<PPC32_MAX_BREAKPOINTS;i++) |
392 |
|
|
if (pcpu->breakpoints[i] != 0) |
393 |
|
|
return; |
394 |
|
|
|
395 |
|
|
pcpu->breakpoints_enabled = FALSE; |
396 |
|
|
} |
397 |
|
|
|
398 |
|
|
/* Set a register */ |
399 |
|
|
void ppc32_reg_set(cpu_gen_t *cpu,u_int reg,m_uint64_t val) |
400 |
|
|
{ |
401 |
|
|
if (reg < PPC32_GPR_NR) |
402 |
|
|
CPU_PPC32(cpu)->gpr[reg] = (m_uint32_t)val; |
403 |
|
|
} |
404 |
|
|
|
405 |
|
|
/* Dump registers of a PowerPC processor */ |
406 |
|
|
void ppc32_dump_regs(cpu_gen_t *cpu) |
407 |
|
|
{ |
408 |
|
|
cpu_ppc_t *pcpu = CPU_PPC32(cpu); |
409 |
|
|
int i; |
410 |
|
|
|
411 |
|
|
printf("PowerPC Registers:\n"); |
412 |
|
|
|
413 |
|
|
for(i=0;i<PPC32_GPR_NR/4;i++) { |
414 |
|
|
printf(" $%2d = 0x%8.8x $%2d = 0x%8.8x" |
415 |
|
|
" $%2d = 0x%8.8x $%2d = 0x%8.8x\n", |
416 |
|
|
i*4, pcpu->gpr[i*4], (i*4)+1, pcpu->gpr[(i*4)+1], |
417 |
|
|
(i*4)+2, pcpu->gpr[(i*4)+2], (i*4)+3, pcpu->gpr[(i*4)+3]); |
418 |
|
|
} |
419 |
|
|
|
420 |
|
|
printf("\n"); |
421 |
|
|
printf(" ia = 0x%8.8x, lr = 0x%8.8x\n", pcpu->ia, pcpu->lr); |
422 |
|
|
printf(" cr = 0x%8.8x, msr = 0x%8.8x, xer = 0x%8.8x, dec = 0x%8.8x\n", |
423 |
dpavlin |
8 |
ppc32_get_cr(pcpu), pcpu->msr, |
424 |
dpavlin |
7 |
pcpu->xer | (pcpu->xer_ca << PPC32_XER_CA_BIT), |
425 |
|
|
pcpu->dec); |
426 |
|
|
|
427 |
|
|
printf(" sprg[0] = 0x%8.8x, sprg[1] = 0x%8.8x\n", |
428 |
|
|
pcpu->sprg[0],pcpu->sprg[1]); |
429 |
|
|
|
430 |
|
|
printf(" sprg[2] = 0x%8.8x, sprg[3] = 0x%8.8x\n", |
431 |
|
|
pcpu->sprg[2],pcpu->sprg[3]); |
432 |
|
|
|
433 |
|
|
printf("\n IRQ count: %llu, IRQ false positives: %llu, " |
434 |
|
|
"IRQ Pending: %u, IRQ Check: %s\n", |
435 |
|
|
pcpu->irq_count,pcpu->irq_fp_count,pcpu->irq_pending, |
436 |
|
|
pcpu->irq_check ? "yes" : "no"); |
437 |
|
|
|
438 |
|
|
printf(" Timer IRQ count: %llu, pending: %u, timer drift: %u\n\n", |
439 |
|
|
pcpu->timer_irq_count,pcpu->timer_irq_pending,pcpu->timer_drift); |
440 |
|
|
|
441 |
dpavlin |
8 |
printf(" Device access count: %llu\n",cpu->dev_access_counter); |
442 |
|
|
|
443 |
dpavlin |
7 |
printf("\n"); |
444 |
|
|
} |
445 |
|
|
|
446 |
|
|
/* Dump BAT registers */ |
447 |
|
|
static void ppc32_dump_bat(cpu_ppc_t *cpu,int index) |
448 |
|
|
{ |
449 |
|
|
int i; |
450 |
|
|
|
451 |
|
|
for(i=0;i<PPC32_BAT_NR;i++) |
452 |
|
|
printf(" BAT[%d] = 0x%8.8x 0x%8.8x\n", |
453 |
|
|
i,cpu->bat[index][i].reg[0],cpu->bat[index][i].reg[1]); |
454 |
|
|
} |
455 |
|
|
|
456 |
|
|
/* Dump MMU registers */ |
457 |
|
|
void ppc32_dump_mmu(cpu_gen_t *cpu) |
458 |
|
|
{ |
459 |
|
|
cpu_ppc_t *pcpu = CPU_PPC32(cpu); |
460 |
|
|
int i; |
461 |
|
|
|
462 |
|
|
printf("PowerPC MMU Registers:\n"); |
463 |
|
|
|
464 |
|
|
printf(" - IBAT Registers:\n"); |
465 |
|
|
ppc32_dump_bat(pcpu,PPC32_IBAT_IDX); |
466 |
|
|
|
467 |
|
|
printf(" - DBAT Registers:\n"); |
468 |
|
|
ppc32_dump_bat(pcpu,PPC32_DBAT_IDX); |
469 |
|
|
|
470 |
|
|
printf(" - Segment Registers:\n"); |
471 |
|
|
for(i=0;i<PPC32_SR_NR;i++) |
472 |
|
|
printf(" SR[%d] = 0x%8.8x\n",i,pcpu->sr[i]); |
473 |
|
|
|
474 |
|
|
printf(" - SDR1: 0x%8.8x\n",pcpu->sdr1); |
475 |
|
|
} |
476 |
|
|
|
477 |
|
|
/* Load a raw image into the simulated memory */ |
478 |
|
|
int ppc32_load_raw_image(cpu_ppc_t *cpu,char *filename,m_uint32_t vaddr) |
479 |
|
|
{ |
480 |
|
|
struct stat file_info; |
481 |
|
|
size_t len,clen; |
482 |
|
|
m_uint32_t remain; |
483 |
|
|
void *haddr; |
484 |
|
|
FILE *bfd; |
485 |
|
|
|
486 |
|
|
if (!(bfd = fopen(filename,"r"))) { |
487 |
|
|
perror("fopen"); |
488 |
|
|
return(-1); |
489 |
|
|
} |
490 |
|
|
|
491 |
|
|
if (fstat(fileno(bfd),&file_info) == -1) { |
492 |
|
|
perror("stat"); |
493 |
|
|
return(-1); |
494 |
|
|
} |
495 |
|
|
|
496 |
|
|
len = file_info.st_size; |
497 |
|
|
|
498 |
|
|
printf("Loading RAW file '%s' at virtual address 0x%8.8x (size=%lu)\n", |
499 |
|
|
filename,vaddr,(u_long)len); |
500 |
|
|
|
501 |
|
|
while(len > 0) |
502 |
|
|
{ |
503 |
|
|
haddr = cpu->mem_op_lookup(cpu,vaddr,PPC32_MTS_DCACHE); |
504 |
|
|
|
505 |
|
|
if (!haddr) { |
506 |
|
|
fprintf(stderr,"load_raw_image: invalid load address 0x%8.8x\n", |
507 |
|
|
vaddr); |
508 |
|
|
return(-1); |
509 |
|
|
} |
510 |
|
|
|
511 |
|
|
if (len > PPC32_MIN_PAGE_SIZE) |
512 |
|
|
clen = PPC32_MIN_PAGE_SIZE; |
513 |
|
|
else |
514 |
|
|
clen = len; |
515 |
|
|
|
516 |
|
|
remain = MIPS_MIN_PAGE_SIZE; |
517 |
|
|
remain -= (vaddr - (vaddr & MIPS_MIN_PAGE_MASK)); |
518 |
|
|
|
519 |
|
|
clen = m_min(clen,remain); |
520 |
|
|
|
521 |
|
|
if (fread((u_char *)haddr,clen,1,bfd) != 1) |
522 |
|
|
break; |
523 |
|
|
|
524 |
|
|
vaddr += clen; |
525 |
|
|
len -= clen; |
526 |
|
|
} |
527 |
|
|
|
528 |
|
|
fclose(bfd); |
529 |
|
|
return(0); |
530 |
|
|
} |
531 |
|
|
|
532 |
|
|
/* Load an ELF image into the simulated memory */ |
533 |
|
|
int ppc32_load_elf_image(cpu_ppc_t *cpu,char *filename,int skip_load, |
534 |
|
|
m_uint32_t *entry_point) |
535 |
|
|
{ |
536 |
|
|
m_uint32_t vaddr,remain; |
537 |
|
|
void *haddr; |
538 |
|
|
Elf32_Ehdr *ehdr; |
539 |
|
|
Elf32_Shdr *shdr; |
540 |
|
|
Elf_Scn *scn; |
541 |
|
|
Elf *img_elf; |
542 |
|
|
size_t len,clen; |
543 |
|
|
char *name; |
544 |
|
|
int i,fd; |
545 |
|
|
FILE *bfd; |
546 |
|
|
|
547 |
|
|
if (!filename) |
548 |
|
|
return(-1); |
549 |
|
|
|
550 |
|
|
#ifdef __CYGWIN__ |
551 |
|
|
fd = open(filename,O_RDONLY|O_BINARY); |
552 |
|
|
#else |
553 |
|
|
fd = open(filename,O_RDONLY); |
554 |
|
|
#endif |
555 |
|
|
|
556 |
|
|
if (fd == -1) { |
557 |
|
|
perror("load_elf_image: open"); |
558 |
|
|
return(-1); |
559 |
|
|
} |
560 |
|
|
|
561 |
|
|
if (elf_version(EV_CURRENT) == EV_NONE) { |
562 |
|
|
fprintf(stderr,"load_elf_image: library out of date\n"); |
563 |
|
|
return(-1); |
564 |
|
|
} |
565 |
|
|
|
566 |
|
|
if (!(img_elf = elf_begin(fd,ELF_C_READ,NULL))) { |
567 |
|
|
fprintf(stderr,"load_elf_image: elf_begin: %s\n", |
568 |
|
|
elf_errmsg(elf_errno())); |
569 |
|
|
return(-1); |
570 |
|
|
} |
571 |
|
|
|
572 |
|
|
if (!(ehdr = elf32_getehdr(img_elf))) { |
573 |
|
|
fprintf(stderr,"load_elf_image: invalid ELF file\n"); |
574 |
|
|
return(-1); |
575 |
|
|
} |
576 |
|
|
|
577 |
|
|
printf("Loading ELF file '%s'...\n",filename); |
578 |
|
|
bfd = fdopen(fd,"rb"); |
579 |
|
|
|
580 |
|
|
if (!bfd) { |
581 |
|
|
perror("load_elf_image: fdopen"); |
582 |
|
|
return(-1); |
583 |
|
|
} |
584 |
|
|
|
585 |
|
|
if (!skip_load) { |
586 |
|
|
for(i=0;i<ehdr->e_shnum;i++) { |
587 |
|
|
scn = elf_getscn(img_elf,i); |
588 |
|
|
|
589 |
|
|
shdr = elf32_getshdr(scn); |
590 |
|
|
name = elf_strptr(img_elf, ehdr->e_shstrndx, (size_t)shdr->sh_name); |
591 |
|
|
len = shdr->sh_size; |
592 |
|
|
|
593 |
|
|
if (!(shdr->sh_flags & SHF_ALLOC) || !len) |
594 |
|
|
continue; |
595 |
|
|
|
596 |
|
|
fseek(bfd,shdr->sh_offset,SEEK_SET); |
597 |
|
|
vaddr = shdr->sh_addr; |
598 |
|
|
|
599 |
|
|
if (cpu->vm->debug_level > 0) { |
600 |
|
|
printf(" * Adding section at virtual address 0x%8.8x " |
601 |
|
|
"(len=0x%8.8lx)\n",vaddr,(u_long)len); |
602 |
|
|
} |
603 |
|
|
|
604 |
|
|
while(len > 0) |
605 |
|
|
{ |
606 |
|
|
haddr = cpu->mem_op_lookup(cpu,vaddr,PPC32_MTS_DCACHE); |
607 |
|
|
|
608 |
|
|
if (!haddr) { |
609 |
|
|
fprintf(stderr,"load_elf_image: invalid load address 0x%x\n", |
610 |
|
|
vaddr); |
611 |
|
|
return(-1); |
612 |
|
|
} |
613 |
|
|
|
614 |
|
|
if (len > PPC32_MIN_PAGE_SIZE) |
615 |
|
|
clen = PPC32_MIN_PAGE_SIZE; |
616 |
|
|
else |
617 |
|
|
clen = len; |
618 |
|
|
|
619 |
|
|
remain = PPC32_MIN_PAGE_SIZE; |
620 |
|
|
remain -= (vaddr - (vaddr & PPC32_MIN_PAGE_MASK)); |
621 |
|
|
|
622 |
|
|
clen = m_min(clen,remain); |
623 |
|
|
|
624 |
|
|
if (fread((u_char *)haddr,clen,1,bfd) < 1) |
625 |
|
|
break; |
626 |
|
|
|
627 |
|
|
vaddr += clen; |
628 |
|
|
len -= clen; |
629 |
|
|
} |
630 |
|
|
} |
631 |
|
|
} else { |
632 |
|
|
printf("ELF loading skipped, using a ghost RAM file.\n"); |
633 |
|
|
} |
634 |
|
|
|
635 |
|
|
printf("ELF entry point: 0x%x\n",ehdr->e_entry); |
636 |
|
|
|
637 |
|
|
if (entry_point) |
638 |
|
|
*entry_point = ehdr->e_entry; |
639 |
|
|
|
640 |
|
|
elf_end(img_elf); |
641 |
|
|
fclose(bfd); |
642 |
|
|
return(0); |
643 |
|
|
} |