26 |
#define PPC32_MIN_PAGE_IMASK (PPC32_MIN_PAGE_SIZE - 1) |
#define PPC32_MIN_PAGE_IMASK (PPC32_MIN_PAGE_SIZE - 1) |
27 |
#define PPC32_MIN_PAGE_MASK 0xFFFFF000 |
#define PPC32_MIN_PAGE_MASK 0xFFFFF000 |
28 |
|
|
29 |
|
/* Number of instructions per page */ |
30 |
|
#define PPC32_INSN_PER_PAGE (PPC32_MIN_PAGE_SIZE/sizeof(ppc_insn_t)) |
31 |
|
|
32 |
/* Starting point for ROM */ |
/* Starting point for ROM */ |
33 |
#define PPC32_ROM_START 0xfff00100 |
#define PPC32_ROM_START 0xfff00100 |
34 |
#define PPC32_ROM_SP 0x00006000 |
#define PPC32_ROM_SP 0x00006000 |
423 |
/* Breakpoints */ |
/* Breakpoints */ |
424 |
m_uint32_t breakpoints[PPC32_MAX_BREAKPOINTS]; |
m_uint32_t breakpoints[PPC32_MAX_BREAKPOINTS]; |
425 |
u_int breakpoints_enabled; |
u_int breakpoints_enabled; |
426 |
|
|
427 |
|
/* JIT host register allocation */ |
428 |
|
char *jit_hreg_seq_name; |
429 |
|
int ppc_reg_map[PPC32_GPR_NR]; |
430 |
|
struct hreg_map *hreg_map_list,*hreg_lru; |
431 |
|
struct hreg_map hreg_map[JIT_HOST_NREG]; |
432 |
}; |
}; |
433 |
|
|
434 |
#define PPC32_CR_FIELD_OFFSET(f) \ |
#define PPC32_CR_FIELD_OFFSET(f) \ |