1 |
/* |
/* |
2 |
* Cisco 7200 (Predator) simulation platform. |
* Cisco router simulation platform. |
3 |
* Copyright (c) 2005,2006 Christophe Fillot (cf@utc.fr) |
* Copyright (c) 2005,2006 Christophe Fillot (cf@utc.fr) |
4 |
*/ |
*/ |
5 |
|
|
38 |
#define MTS_ACC_U 0x00000006 /* Unexistent */ |
#define MTS_ACC_U 0x00000006 /* Unexistent */ |
39 |
|
|
40 |
/* Hash table size for MTS64 (default: [shift:16,bits:12]) */ |
/* Hash table size for MTS64 (default: [shift:16,bits:12]) */ |
41 |
#define MTS64_HASH_SHIFT 15 |
#define MTS64_HASH_SHIFT 12 |
42 |
#define MTS64_HASH_BITS 15 |
#define MTS64_HASH_BITS 14 |
43 |
#define MTS64_HASH_SIZE (1 << MTS64_HASH_BITS) |
#define MTS64_HASH_SIZE (1 << MTS64_HASH_BITS) |
44 |
#define MTS64_HASH_MASK (MTS64_HASH_SIZE - 1) |
#define MTS64_HASH_MASK (MTS64_HASH_SIZE - 1) |
45 |
|
|
47 |
#define MTS64_HASH(vaddr) (((vaddr) >> MTS64_HASH_SHIFT) & MTS64_HASH_MASK) |
#define MTS64_HASH(vaddr) (((vaddr) >> MTS64_HASH_SHIFT) & MTS64_HASH_MASK) |
48 |
|
|
49 |
/* Hash table size for MTS32 (default: [shift:15,bits:15]) */ |
/* Hash table size for MTS32 (default: [shift:15,bits:15]) */ |
50 |
#define MTS32_HASH_SHIFT 15 |
#define MTS32_HASH_SHIFT 12 |
51 |
#define MTS32_HASH_BITS 15 |
#define MTS32_HASH_BITS 14 |
52 |
#define MTS32_HASH_SIZE (1 << MTS32_HASH_BITS) |
#define MTS32_HASH_SIZE (1 << MTS32_HASH_BITS) |
53 |
#define MTS32_HASH_MASK (MTS32_HASH_SIZE - 1) |
#define MTS32_HASH_MASK (MTS32_HASH_SIZE - 1) |
54 |
|
|
73 |
u_int count; |
u_int count; |
74 |
}; |
}; |
75 |
|
|
76 |
/* Show the last memory accesses */ |
/* Record a memory access */ |
77 |
void memlog_dump(cpu_mips_t *cpu); |
void memlog_rec_access(cpu_gen_t *cpu,m_uint64_t vaddr,m_uint64_t data, |
78 |
|
m_uint32_t op_size,m_uint32_t op_type); |
79 |
|
|
80 |
/* Shutdown MTS subsystem */ |
/* Show the last memory accesses */ |
81 |
void mts_shutdown(cpu_mips_t *cpu); |
void memlog_dump(cpu_gen_t *cpu); |
82 |
|
|
83 |
/* Set the address mode */ |
/* Update the data obtained by a read access */ |
84 |
int mts_set_addr_mode(cpu_mips_t *cpu,u_int addr_mode); |
void memlog_update_read(cpu_gen_t *cpu,m_iptr_t raddr); |
85 |
|
|
86 |
/* Copy a memory block from VM physical RAM to real host */ |
/* Copy a memory block from VM physical RAM to real host */ |
87 |
void physmem_copy_from_vm(vm_instance_t *vm,void *real_buffer, |
void physmem_copy_from_vm(vm_instance_t *vm,void *real_buffer, |
103 |
/* Copy a 16-bit word to the VM physical RAM from real host */ |
/* Copy a 16-bit word to the VM physical RAM from real host */ |
104 |
void physmem_copy_u16_to_vm(vm_instance_t *vm,m_uint64_t paddr,m_uint16_t val); |
void physmem_copy_u16_to_vm(vm_instance_t *vm,m_uint64_t paddr,m_uint16_t val); |
105 |
|
|
106 |
|
/* Copy a byte from the VM physical RAM to real host */ |
107 |
|
m_uint8_t physmem_copy_u8_from_vm(vm_instance_t *vm,m_uint64_t paddr); |
108 |
|
|
109 |
|
/* Copy a 16-bit word to the VM physical RAM from real host */ |
110 |
|
void physmem_copy_u8_to_vm(vm_instance_t *vm,m_uint64_t paddr,m_uint8_t val); |
111 |
|
|
112 |
/* DMA transfer operation */ |
/* DMA transfer operation */ |
113 |
void physmem_dma_transfer(vm_instance_t *vm,m_uint64_t src,m_uint64_t dst, |
void physmem_dma_transfer(vm_instance_t *vm,m_uint64_t src,m_uint64_t dst, |
114 |
size_t len); |
size_t len); |