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dpavlin |
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/* |
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dpavlin |
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* Cisco router simulation platform. |
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dpavlin |
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* Copyright (C) 2005,2006 Christophe Fillot. All rights reserved. |
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* |
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* PLX PCI9060/PCI9054 - PCI bus master interface chip. |
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* |
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* This is very basic, it has been designed to allow the C7200 PA-POS-OC3 |
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* to work, and for the upcoming PA-MC-8TE1. |
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*/ |
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#include <stdio.h> |
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#include <stdlib.h> |
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#include <string.h> |
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dpavlin |
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#include "cpu.h" |
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#include "vm.h" |
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dpavlin |
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#include "dynamips.h" |
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#include "memory.h" |
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#include "device.h" |
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#include "pci_dev.h" |
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#include "dev_plx.h" |
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#define DEBUG_ACCESS 1 |
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/* PLX vendor/product codes */ |
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#define PLX_PCI_VENDOR_ID 0x10b5 |
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#define PLX9060_PCI_PRODUCT_ID 0x9060 |
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#define PLX9054_PCI_PRODUCT_ID 0x9054 |
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/* Number of Local Spaces (1 on 9060, 2 on 9054) */ |
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#define PLX_LOCSPC_MAX 2 |
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/* Local Space ranges */ |
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#define PLX_LOCSPC_RANGE_DEFAULT 0xFFF00000 |
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#define PLX_LOCSPC_RANGE_DECODE_MASK 0xFFFFFFF0 |
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/* Local space definition */ |
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struct plx_locspace { |
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m_uint32_t lbaddr; |
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m_uint32_t range; |
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struct vdevice *dev; |
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}; |
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/* PLX data */ |
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struct plx_data { |
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/* Device name */ |
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char *name; |
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/* Variant (9060, 9054) */ |
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u_int variant; |
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/* Virtual machine and object info */ |
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vm_instance_t *vm; |
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vm_obj_t vm_obj; |
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/* Virtual PLX device */ |
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struct vdevice plx_dev; |
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struct pci_device *pci_plx_dev; |
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/* Local spaces */ |
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struct plx_locspace lspc[PLX_LOCSPC_MAX]; |
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/* Doorbell registers */ |
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m_uint32_t pci2loc_doorbell_reg,loc2pci_doorbell_reg; |
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dev_plx_doorbell_cbk pci2loc_doorbell_cbk; |
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void *pci2loc_doorbell_cbk_arg; |
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}; |
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/* Log a PLX message */ |
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#define PLX_LOG(d,msg...) vm_log((d)->vm,(d)->name,msg) |
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/* Map a local space device */ |
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static void plx_map_space(struct plx_data *d,u_int id) |
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{ |
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struct plx_locspace *lspc; |
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lspc = &d->lspc[id]; |
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if (!lspc->dev) |
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return; |
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lspc->dev->phys_len = 1+(~(lspc->range & PLX_LOCSPC_RANGE_DECODE_MASK)); |
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vm_map_device(d->vm,lspc->dev,lspc->lbaddr); |
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PLX_LOG(d,"device %u mapped at 0x%llx, size=0x%x\n", |
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id,lspc->dev->phys_addr,lspc->dev->phys_len); |
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} |
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/* PLX device common access routine */ |
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dpavlin |
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void *dev_plx_access(cpu_gen_t *cpu,struct vdevice *dev, |
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dpavlin |
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m_uint32_t offset,u_int op_size,u_int op_type, |
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m_uint64_t *data) |
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{ |
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struct plx_data *d = dev->priv_data; |
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if (op_type == MTS_READ) |
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*data = 0; |
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switch(offset) { |
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/* Local Address Space 0 Range Register */ |
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case 0x00: |
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if (op_type == MTS_WRITE) { |
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d->lspc[0].range = *data; |
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plx_map_space(d,0); |
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} else { |
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*data = d->lspc[0].range; |
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} |
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break; |
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110 |
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/* PCI-to-Local Doorbell Register */ |
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case 0x60: |
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if (op_type == MTS_WRITE) { |
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d->pci2loc_doorbell_reg = *data; |
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if (d->pci2loc_doorbell_cbk != NULL) { |
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d->pci2loc_doorbell_cbk(d,d->pci2loc_doorbell_cbk_arg, |
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d->pci2loc_doorbell_reg); |
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} |
119 |
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} |
120 |
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break; |
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122 |
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/* Local-to-PCI Doorbell Register */ |
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case 0x64: |
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if (op_type == MTS_READ) |
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*data = d->loc2pci_doorbell_reg; |
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else |
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d->loc2pci_doorbell_reg &= ~(*data); |
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break; |
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130 |
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default: |
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if (op_type == MTS_READ) { |
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cpu_log(cpu,d->name, |
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"read from unhandled addr 0x%x, pc=0x%llx (size=%u)\n", |
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dpavlin |
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offset,cpu_get_pc(cpu),op_size); |
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dpavlin |
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} else { |
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cpu_log(cpu,d->name, |
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"write to handled addr 0x%x, value=0x%llx, " |
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dpavlin |
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"pc=0x%llx (size=%u)\n", |
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offset,*data,cpu_get_pc(cpu),op_size); |
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dpavlin |
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} |
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} |
142 |
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143 |
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return NULL; |
144 |
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} |
145 |
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146 |
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/* PLX9054 access routine */ |
147 |
dpavlin |
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void *dev_plx9054_access(cpu_gen_t *cpu,struct vdevice *dev, |
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dpavlin |
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m_uint32_t offset,u_int op_size,u_int op_type, |
149 |
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m_uint64_t *data) |
150 |
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{ |
151 |
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struct plx_data *d = dev->priv_data; |
152 |
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153 |
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if (op_type == MTS_READ) |
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*data = 0; |
155 |
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156 |
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switch(offset) { |
157 |
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/* Local Address Space 1 Range Register */ |
158 |
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case 0xF0: |
159 |
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if (op_type == MTS_WRITE) { |
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d->lspc[1].range = *data; |
161 |
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plx_map_space(d,1); |
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} else { |
163 |
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*data = d->lspc[1].range; |
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} |
165 |
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break; |
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default: |
168 |
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return(dev_plx_access(cpu,dev,offset,op_size,op_type,data)); |
169 |
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} |
170 |
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return NULL; |
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} |
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/* |
175 |
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* pci_plx_read() - Common PCI read. |
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*/ |
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dpavlin |
7 |
static m_uint32_t pci_plx_read(cpu_gen_t *cpu,struct pci_device *dev,int reg) |
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dpavlin |
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{ |
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struct plx_data *d = dev->priv_data; |
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#if DEBUG_ACCESS |
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PLX_LOG(d,"read PLX PCI register 0x%x\n",reg); |
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#endif |
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switch(reg) { |
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/* PLX registers */ |
186 |
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case PCI_REG_BAR0: |
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return(d->plx_dev.phys_addr); |
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/* Local space 0 */ |
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case PCI_REG_BAR2: |
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return(d->lspc[0].lbaddr); |
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default: |
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return(0); |
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} |
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} |
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/* |
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* pci_plx_write() - Common PCI write. |
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*/ |
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dpavlin |
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static void pci_plx_write(cpu_gen_t *cpu,struct pci_device *dev, |
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dpavlin |
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int reg,m_uint32_t value) |
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{ |
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struct plx_data *d = dev->priv_data; |
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#if DEBUG_ACCESS |
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PLX_LOG(d,"write 0x%x to PLX PCI register 0x%x\n",value,reg); |
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#endif |
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210 |
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switch(reg) { |
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/* PLX registers */ |
212 |
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case PCI_REG_BAR0: |
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vm_map_device(cpu->vm,&d->plx_dev,(m_uint64_t)value); |
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PLX_LOG(d,"PLX registers are mapped at 0x%x\n",value); |
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break; |
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217 |
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/* Local space 0 */ |
218 |
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case PCI_REG_BAR2: |
219 |
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d->lspc[0].lbaddr = value; |
220 |
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plx_map_space(d,0); |
221 |
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break; |
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} |
223 |
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} |
224 |
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225 |
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/* |
226 |
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* pci_plx9054_read() |
227 |
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*/ |
228 |
dpavlin |
7 |
static m_uint32_t pci_plx9054_read(cpu_gen_t *cpu,struct pci_device *dev, |
229 |
dpavlin |
4 |
int reg) |
230 |
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{ |
231 |
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struct plx_data *d = dev->priv_data; |
232 |
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233 |
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#if DEBUG_ACCESS |
234 |
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PLX_LOG(d,"read PLX PCI register 0x%x\n",reg); |
235 |
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#endif |
236 |
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switch(reg) { |
237 |
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/* Local space 1 */ |
238 |
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case PCI_REG_BAR3: |
239 |
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return(d->lspc[1].lbaddr); |
240 |
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241 |
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default: |
242 |
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return(pci_plx_read(cpu,dev,reg)); |
243 |
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} |
244 |
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} |
245 |
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246 |
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/* |
247 |
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* pci_plx9054_write() |
248 |
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*/ |
249 |
dpavlin |
7 |
static void pci_plx9054_write(cpu_gen_t *cpu,struct pci_device *dev, |
250 |
dpavlin |
4 |
int reg,m_uint32_t value) |
251 |
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{ |
252 |
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struct plx_data *d = dev->priv_data; |
253 |
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254 |
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#if DEBUG_ACCESS |
255 |
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PLX_LOG(d,"write 0x%x to PLX PCI register 0x%x\n",value,reg); |
256 |
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#endif |
257 |
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258 |
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switch(reg) { |
259 |
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/* Local space 1 */ |
260 |
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case PCI_REG_BAR3: |
261 |
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d->lspc[1].lbaddr = value; |
262 |
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plx_map_space(d,1); |
263 |
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break; |
264 |
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265 |
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default: |
266 |
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pci_plx_write(cpu,dev,reg,value); |
267 |
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} |
268 |
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} |
269 |
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270 |
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/* Shutdown a PLX device */ |
271 |
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void dev_plx_shutdown(vm_instance_t *vm,struct plx_data *d) |
272 |
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{ |
273 |
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int i; |
274 |
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275 |
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if (d != NULL) { |
276 |
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/* Unbind the managed devices */ |
277 |
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for(i=0;i<PLX_LOCSPC_MAX;i++) { |
278 |
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if (d->lspc[i].dev) |
279 |
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vm_unbind_device(vm,d->lspc[i].dev); |
280 |
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} |
281 |
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282 |
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/* Remove the PLX device */ |
283 |
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dev_remove(vm,&d->plx_dev); |
284 |
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285 |
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/* Remove the PCI PLX device */ |
286 |
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pci_dev_remove(d->pci_plx_dev); |
287 |
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288 |
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/* Free the structure itself */ |
289 |
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free(d); |
290 |
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} |
291 |
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} |
292 |
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293 |
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/* Create a generic PLX device */ |
294 |
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struct plx_data *dev_plx_init(vm_instance_t *vm,char *name) |
295 |
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{ |
296 |
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struct plx_data *d; |
297 |
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int i; |
298 |
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299 |
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/* Allocate the private data structure */ |
300 |
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if (!(d = malloc(sizeof(*d)))) { |
301 |
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fprintf(stderr,"PLX: unable to create device.\n"); |
302 |
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return NULL; |
303 |
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} |
304 |
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305 |
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memset(d,0,sizeof(*d)); |
306 |
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vm_object_init(&d->vm_obj); |
307 |
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d->vm_obj.name = name; |
308 |
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d->vm_obj.data = d; |
309 |
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d->vm_obj.shutdown = (vm_shutdown_t)dev_plx_shutdown; |
310 |
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311 |
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d->vm = vm; |
312 |
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d->name = name; |
313 |
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314 |
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for(i=0;i<PLX_LOCSPC_MAX;i++) |
315 |
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d->lspc[i].range = PLX_LOCSPC_RANGE_DEFAULT; |
316 |
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317 |
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dev_init(&d->plx_dev); |
318 |
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d->plx_dev.name = name; |
319 |
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d->plx_dev.priv_data = d; |
320 |
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d->plx_dev.phys_addr = 0; |
321 |
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d->plx_dev.phys_len = 0x1000; |
322 |
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d->plx_dev.handler = dev_plx_access; |
323 |
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return(d); |
324 |
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} |
325 |
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326 |
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/* Create a PLX9060 device */ |
327 |
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vm_obj_t *dev_plx9060_init(vm_instance_t *vm,char *name, |
328 |
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struct pci_bus *pci_bus,int pci_device, |
329 |
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struct vdevice *dev0) |
330 |
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{ |
331 |
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struct plx_data *d; |
332 |
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333 |
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/* Create the PLX data */ |
334 |
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if (!(d = dev_plx_init(vm,name))) { |
335 |
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fprintf(stderr,"PLX: unable to create device.\n"); |
336 |
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return NULL; |
337 |
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} |
338 |
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339 |
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/* Set the PLX variant */ |
340 |
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d->variant = 9060; |
341 |
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342 |
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/* Set device for Local Space 0 */ |
343 |
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d->lspc[0].dev = dev0; |
344 |
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345 |
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/* Add PLX as a PCI device */ |
346 |
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d->pci_plx_dev = pci_dev_add(pci_bus,name, |
347 |
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PLX_PCI_VENDOR_ID,PLX9060_PCI_PRODUCT_ID, |
348 |
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pci_device,0,-1,d, |
349 |
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NULL,pci_plx_read,pci_plx_write); |
350 |
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351 |
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if (!d->pci_plx_dev) { |
352 |
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fprintf(stderr,"%s (PLX9060): unable to create PCI device.\n",name); |
353 |
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goto err_pci_dev; |
354 |
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} |
355 |
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356 |
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vm_object_add(vm,&d->vm_obj); |
357 |
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return(&d->vm_obj); |
358 |
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359 |
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err_pci_dev: |
360 |
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free(d); |
361 |
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return NULL; |
362 |
|
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} |
363 |
|
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|
364 |
|
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/* Create a PLX9054 device */ |
365 |
|
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vm_obj_t *dev_plx9054_init(vm_instance_t *vm,char *name, |
366 |
|
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struct pci_bus *pci_bus,int pci_device, |
367 |
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struct vdevice *dev0,struct vdevice *dev1) |
368 |
|
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{ |
369 |
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struct plx_data *d; |
370 |
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371 |
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/* Create the PLX data */ |
372 |
|
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if (!(d = dev_plx_init(vm,name))) { |
373 |
|
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fprintf(stderr,"PLX: unable to create device.\n"); |
374 |
|
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return NULL; |
375 |
|
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} |
376 |
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|
377 |
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/* Set the PLX variant */ |
378 |
|
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d->variant = 9054; |
379 |
|
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d->plx_dev.handler = dev_plx9054_access; |
380 |
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381 |
|
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/* Set device for Local Space 0 and 1 */ |
382 |
|
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d->lspc[0].dev = dev0; |
383 |
|
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d->lspc[1].dev = dev1; |
384 |
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385 |
|
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/* Add PLX as a PCI device */ |
386 |
|
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d->pci_plx_dev = pci_dev_add(pci_bus,name, |
387 |
|
|
PLX_PCI_VENDOR_ID,PLX9054_PCI_PRODUCT_ID, |
388 |
|
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pci_device,0,-1,d, |
389 |
|
|
NULL,pci_plx9054_read,pci_plx9054_write); |
390 |
|
|
|
391 |
|
|
if (!d->pci_plx_dev) { |
392 |
|
|
fprintf(stderr,"%s (PLX9054): unable to create PCI device.\n",name); |
393 |
|
|
goto err_pci_dev; |
394 |
|
|
} |
395 |
|
|
|
396 |
|
|
vm_object_add(vm,&d->vm_obj); |
397 |
|
|
return(&d->vm_obj); |
398 |
|
|
|
399 |
|
|
err_pci_dev: |
400 |
|
|
free(d); |
401 |
|
|
return NULL; |
402 |
|
|
} |
403 |
|
|
|
404 |
|
|
/* Set callback function for PCI-to-Local doorbell register */ |
405 |
|
|
void dev_plx_set_pci2loc_doorbell_cbk(struct plx_data *d, |
406 |
|
|
dev_plx_doorbell_cbk cbk, |
407 |
|
|
void *arg) |
408 |
|
|
{ |
409 |
|
|
if (d != NULL) { |
410 |
|
|
d->pci2loc_doorbell_cbk = cbk; |
411 |
|
|
d->pci2loc_doorbell_cbk_arg = arg; |
412 |
|
|
} |
413 |
|
|
} |
414 |
|
|
|
415 |
|
|
/* Set the Local-to-PCI doorbell register (for Local device use) */ |
416 |
|
|
void dev_plx_set_loc2pci_doorbell_reg(struct plx_data *d,m_uint32_t value) |
417 |
|
|
{ |
418 |
|
|
if (d != NULL) |
419 |
|
|
d->loc2pci_doorbell_reg = value; |
420 |
|
|
} |